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Altera
manual

CPLD

QQ:906606596

Learning

board

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Table of Contents

A: development board intended use ................................. ..3

Two: development board hardware description ................................. ..4

Three: Hardware Circuit Description ....................................... ..5

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A: development board intended use

The development board using Altera's MAXII series EPM240T100C5N

chip design. Also compatible EPM570T100C5N ,. To help users reduce
costs and accelerate learning user quick access to the programmable logic
device design and development fields. Provides a hardware platform to
help users quickly learn programmable logic devices.
The development board using the JTAG interface for programming the
chip. Distribution ByteBlasterII download cable can download all FPGA /
CPLD chip Altera Corporation.
Development board has 65 I / O ports are cited by pin out, the board
has marked. Cited by pin out of the I / O user can configure the pin
assignment. Facilitate users to develop their own products. The maximum
development cost savings for the user to learn.

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Two: development board hardware description

1) MAXII U1 EPM240T100C5
2) 8 dynamic digital tube
3) 8 LED lights
4) BELL
5) five separate keys
6) JTAG download mode
7) Power mode: external 5V DC power supply
8) 50M active crystal

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Three: Hardware Circuit Description

1 Power supply

Using an external 5V DC power supply. Please note that the polarity of

the external 5V DC power supply. Positive with respect to the.

2 Active Crystals

Using 50M Hz to CPLD's P12 provides crystal clock frequency is

active.

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3 Digital tube

I / O ports are assigned as follows:

LED1:P86
LED2:P87
LED3:P96
LED4:P89
LED5:P97
LED6:P91
LED7:P92
LED8:P95
AH
LEDA : P85

LEDB : P84

LEDC : P83

LEDD : P82

LEDE : P81

LEDF : P78

LEDG : P77

LEDH : P76

When LED To LED8 LowLEDA To LEDDP For low

power

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Usually digital tube light

4 LED

I / O ports are assigned as follows:

D30 : P51
D31 : P52
D32 : P53
D33 : P54
D34 : P55
D35 : P56
D36 : P57
D37 : P58

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When the I / O port is low LED light

5 Keys to use.

I/O Port assigned as follows:

DEV_CLK

:P44

K1

:P29

K2

:P28

K3

:P27

K4

:P26

When key Is low when pressed

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6 BELL

BELL Use the I / O port, when P50 is low beep sounds

when the BELL

7 No use of I / O
No use of I / O are connected out, see the specific labeling
learning board, the board more cleary.

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