Phase I Interview

EE121DB
SEMICONDUCTOR DESIGN
Ulisses Barraza
Wei Zhao

MESH
GENERATION

DEVICE
CHARACTERISTICS

DISCUSSION &
EXPERIANCE

MESH
Gate Work Function=4.014eV

1.8m

0.34m

0.25m

0.34m

2m

4m

Device Characteristics
NMOS ID-VG

PMOS LOG(ID)-VG

VD=0.1V

Vth0.5V

VD=-0.1V

Device Characteristics
NMOS ID-VG

PMOS LOG(ID)-VG

VD=0.1V
VD=1.5V

VD0.9V

VD=1.5V

Device Characteristics
Simulation Extraction

At VD=0.1V:
Vth=0.5046V
0.1A/m at 0.4124V
At VD=1.5V:
0.1A/m at 0.4030V

DEVICE CHARACTERISTICS
TRANSCONDUCTANCE

DEVICE CHARACTERISTICS
Polysilicon Work Function and Doping
NMOS -Must Ensure that the Fermi-level is below the intrinsic Fermilevel in the polysilicon gate.
Eg-Si=1.1eV
(Ec-Ei)=(Ei-Ev)=Eg-Si/2
N-type EF,N Eg/2
P-type Gate
P-type equivalent Work Function= 4.05eV+( 4.05ev-4.014eV)
Vth=1.064 V

 P type Polysilicon work function: 5.195V

is larger than 1
2
Id vs Vg Characteristic:
Vd=-0.1V

When Vd=-1.5V

Using MOS.PARA function

At low Vd=-0.1V(no saturation)
S_lin (linear slope): 1.6385E-06 (A/um-V) at Vg= -0.8750 (V)
Vth (intercept) : -0.5784 (V) from Vg= -0.8750 (V)
Vth_sat (intercept) : -0.4544 (V) from Vg= -0.6125 (V)
S_sub (subthr slope): 87.58 (mV/dec) at Vg= -0.4250 (V)

Using TV2D to extract gate voltage

By using probe function, when Vd=-1.5V
Vg=-0.62V corresponding to 0.1A/m

When Vd=-0.1V, Vg=-0.62