Southern Polytechnic College and Kennesaw State University

Electrical Engineering Department

EE 2501 Laboratory Exercise No. 6: Programming at least a 22v10 PLD

Name: _______________________________

Date: ___________

Objective:
The main goal of this laboratory is to fully program and test the functionality a PLD for any of
your digital logic designs conducted so far in lab. In other words, use Lab 3 part V, Lab 4, or
Lab 5, to implement your design completely with a PLD. For this laboratory please use at least
the 22v10 PLD supplied by your instructor unless it has finally been included in your digital kit.
Introduction:
Before beginning, make certain you have the following equipment within reach,
22v10 PLD
Protoboard and wire along with typical EE2501 logic ICs
Pre-lab instructions (that means BEFORE lab!)
1. Acquire a print and/or digital copy of the pin-out and truth table for the 22v10 PLD.
2. Design a VHDL (or equivalent) program and then be sure to compile your code to create a
JEDEC file using ispLever from the Latticesemi.com website or any similar program.
3. Show a circuit diagram, or better yet, place your PLD design on a breadboard.

Instructions:
Use the GALEP programmer in the laboratory to place your JEDEC (.jed) file on your PLD part
and then test its functionality. Be careful to note the orientation of the PLD component on the
GALEP programmer. Also, make certain to GROUND all unused inputs as well as include pullup resistors as needed. Be sure to demonstrate all possible permutations to your lab instructor.
RESULTS
In the lab report, describe the progression of your design from the beginning to end,
documenting the problems encountered and how they were solved.
Approved by: ________________________ Date: ____________ Results due: _________
Formal ( x )

ECET 2501

Informal ( )

Laboratory Exercise No. 6

ECET 2501

Laboratory Exercise No. 6