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LAB 1 Transistor Level Schematic Design
LAB 1 Transistor Level Schematic Design
Introduction to IC Design
INTRODUCTION
The simplest complimentary MOS circuit is the inverter. nMOS and pMOS gates are connected
together as the input while their drains are connected together as the output. The sources are
connected to GND and VDD respectively. nMOS substrate is normally connected to GND for all
nMOS devices in the circuit meanwhile pMOS substrate is normally connected to VDD (most
positive voltage in circuit) for all pMOS devices.
TASK
In this experiment, you will need to design the transistor level schematic circuits of inverter,
NAND and NOR gates. Then, view and analyze the waveforms generated from your simulation
using MicroWind software.
EMT 243
Introduction to IC Design
PROGRESS FORM
Name & Matrix No. 1: ____________________________________________________
2: ____________________________________________________
3: ____________________________________________________
Date
: ____________________________________________________
CIRCUIT TYPE
SCORE
1.
INVERTER
12345
2.
NAND
12345
3.
NOR
12345
REMARKS
SIGNATURE