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Bai 001 VXL Pic Cautruc
Bai 001 VXL Pic Cautruc
CC C TNH NGOI VI
CC C TNH V TNG T
CC C TNH C BIT CA VI IU KHIN
CNG NGH CMOS
CU HNH PIC16F877A
S KHI BN TRONG PIC16F877A
S CHN V CHC NNG CC CHN PIC16F877A
Nguyen nh Phu
I.
II.
Hin nay c kh nhiu dng PIC v c rt nhiu khc bit v phn cng, nhng chng ta c th im
qua mt vi nt nh sau:
C cc khi Capture/Compare/PWM.
C h tr iu khin Ethernet.
Ch gm 35 lnh n.
Thi gian thc hin tt c cc lnh l 1 chu k my, ngoi tr lnh gi chng trnh con l 2.
Tc hot ng:
* DC- 20MHz ng vo xung clock.
* DC- 200ns chu k lnh.
CC C TNH NGOI VI
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CC C TNH TNG T
2.
3.
4.
Nguyen nh Phu
CU HNH PIC16F877A:
PIC16F877A c 40/44 chn vi cu trc nh sau:
C 5 port xut/ nhp.
C 8 knh chuyn i A/D.
C port giao tip song song.
C b nh gp i so vi PIC16F873A/PIC16F874A.
Bng 1-2 s tm tt c im PIC16F877A:
c im
Tn s hot ng
Reset (v Delay)
B nh chng trnh Flash (14-bit word)
B nh d liu (byte)
B nh d liu EEPROM (byte)
Cc ngun ngt
Cc port xut nhp
Timer
Cc module capture/compare/PWM
Giao tip ni tip
Giao tip song song
Module A/D 10bit
B so snh tng t
Tp lnh
S chn
PIC16F877A
DC- 20MHz
POR, BOR (PWRT, OST)
8K
368
256
15
Cc port A, B, C, D, E
3
2
MSSP, USART
PSP
8 knh ng vo
2
35 lnh
40 chn PDIP
44 chn PLCC
44 chn TQFP
44 chn QFN
Nguyen nh Phu
2.
3.
Nguyen nh Phu
Nguyen nh Phu
Nguyen nh Phu
Chn OSC1/CLKI (13): l ng vo kt ni vi dao ng thch anh hoc ng vo nhn xung clock
bn ngoi.
OSC1: ng vo dao ng thch anh hoc ng vo ngun xung bn ngoi. Ng vo c mch
Schmitt Trigger nu s dng dao ng RC.
CLKI: ng vo ngun xung bn ngoi.
Chn OSC2/CLKO (14): ng ra dao ng thch anh hoc ng ra cp xung clock.
OSC2: ng ra dao ng thch anh. Kt ni n thch anh hoc b cng hng.
CLKO: ch RC, ng ra ca OSC2, bng tn s ca OSC1 v chnh l tc ca chu
k lnh.
Chn RC0/T1OSO/T1CKI (15):
RC0: xut/nhp s.
T1OSO: ng ra ca b dao ng Timer1.
T1CKI: ng vo xung clock t bn ngoi Timer1.
Chn RC1/T1OSI/CCP2 (16):
RC1: xut/nhp s.
T1OSI: ng vo ca b dao ng Timer1.
CCP2: ng vo Capture2, ng ra compare2, ng ra PWM2.
Chn RC2/CCP1 (17):
RC2: xut/nhp s
CCP1: ng vo Capture1, ng ra compare1, ng ra PWM1
Chn RC3/SCK/SCL (18):
RC3: xut/nhp s.
SCK: ng vo xung clock ni tip ng b/ng ra ca ch SPI.
SCL: ng vo xung clock ni tip ng b/ng ra ca ch I2C.
Chn RD0/PSP0 (19):
RD0: xut/nhp s.
PSP0: d liu port song song.
Chn RD1/PSP1 (20):
RD1: xut/nhp s.
PSP1: d liu port song song.
Cc chn RD2/PSP2 (21), RD3/PSP3 (22), RD4/PSP4 (27), RD5/PSP5 (28), RD6/PSP6 (29),
RD7/PSP7 (30) tng t chn 19, 20.
Chn RB0/INT (33):
RB0: xut/nhp s.
INT: ng vo nhn tn hiu ngt ngoi.
Chn RB1 (34): xut/nhp s.
Chn RB2 (35): xut/nhp s.
Chn RB3/PGM:
RB3: xut/nhp s.
PGM: Chn cho php lp trnh in p thp ICSP.
Chn RB4 (37), RB5 (38): xut/nhp s.
Chn RB6/PGC (39):
RB6: xut/nhp s.
PGC: mch g ri v xung clock lp trnh ICSP.
Chn RB7/PGD (40):
RB7: xut/nhp s.
Bai giang: Cau truc vk PIC
Nguyen nh Phu
PORT E 3 BIT
RA0
RB0
RA1
RB1
RA2
RB2
RA3
RB3
RA4
RB4
RA5
RB5
RB6
RE0
RB7
RE1
RE2
RD0
RC0
RC2
RC3
RC4
RC5
RC6
RD1
RD2
RD3
RD4
RD5
RD6
PORT D 8 BIT
RC1
PORT C 8 BIT
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PORT B 8 BIT
PORT A 6 BIT
RD7
RC7
Hnh 1-5: PIC vi cc chn c chc nng l IO.
10
GIAO
TIP VI
PORT
SONG
SONG
SCK
PSP1
SDI
PSP2
SDO
PSP3
SS
PSP4
RX
PSP5
TX
Nguyen nh Phu
TRUYN D
LIU SPI
TRUYN D
UART
PSP6
PSP7
RD
DT
CK
TRUYN D
SART
USART
WR
AN0
CS
AN1
AN2/VREF-
CAPTURE
COMPARE
PWM - CCP
CCP1
AN3/VREF+
CCP2
AN4
AN5
TRUYN D
LIU I2C
COUNTER
SCL
AN6
SDA
AN7
T0CKI
T1OSO
T1CKI
T1OSI
B
CHUYN
I ADC
10 BIT A HP 8
KNH
TO DAO NG
CHO T1
Cc chc nng so snh, ngun cung cp, dao ng, np v g ri: xem hnh 1-7.
VPP
PGD
PGC
GIAO TIP
MCH NP
CHNG TRNH
V G RI
PGM
INT
IN P SO
SNH
NG RA MCH
SO SNH 1 V 2
INTERRUPT
CVREF
C1OUT
C2OUT
OSC1
OSC2
NI NGUN
DNG
VDD
NI GND
VSS
CLKI
VDD
VSS
CLKO
NI THCH
ANH TO DAO
NG
NHN CLC T
MCH DAO NG
BN NGOI
NG RA CP XUNG
CK CHO CC THIT
B KHC
11
12
Nguyen nh Phu