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Design of A 4.0-6.0 GHZ Cross-Coupled LC-VCO For Wireless Applications
Design of A 4.0-6.0 GHZ Cross-Coupled LC-VCO For Wireless Applications
Abstract
An integrated 4.0-6.0 GHz multiband cross-coupled Voltage Controlled
Oscillator (VCO) design has been reported in this paper. Design has used
0.18m UMC Technology. To improve the design parameters we have used
current mirror at the top and bottom in the present work. VCO is a key
component in multi-standard wireless communication systems. In addition we
have used an LC Tank and capacitors together in design. This makes a novel
approach for wideband VCOs based on the simulation. We have calculated
Figure of Merit (FOM) with the parameters such as phase noise, power
consumption and operating frequency with the tuning range of 1.91%. Main
advantage of this design is covering three frequency ranges (4.4 to 6.0 GHz).
Finally results have been compared with the previously published work and
got improvement in the present design parameters.
Keywords: Cadence, LC-VCO, Low Phase noise, Current mirror, Figure of
Merit, Low power consumption.
Introduction
The demands for wireless communication has been increasing today at the great
extend with the requirement of low power consumption, low phase noise, tunable and
reasonable area. Due to the popularity of communication systems in the GHz range
for many applications such as mobile phones, cordless phone, wireless data networks,
two ways paging etc. This needs made the circuit designer to moves towards more
compact and cost effective solutions. In turn this demand has imposed more stringent
requirement on the phase noise of the oscillators. (VCO) for higher quality receivers
an LC tank oscillator topology is taken i.e. the nature of the resonant tank in LC
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oscillator provide the lowest phase noise for the given amount of power. The phase
noise times the power consumption products primarily depend upon the Quality factor
of LC tank. It is still a challenge to achieve good performance with low power
consumption, low phase noise. The band width, FOM and tuning range are the key
parameters in VCO design. Therefore a tradeoff has to be maintaining among this
crucial requirement. To achieve low phase noise the oscillator amplitude must be
maximized this can be done by increasing the tank inductance. Paper is organized in
five sections: importance of the wireless communication and introduction is described
in section-1.
Section-2 presents the general view about LC VCO, architecture of the proposed
design with design flow is given in section-3, simulation results and discussion are
presented in section-4. Finally, conclusion is described in section-5.
LC-tank oscillator gives a good phase noise performance with low power
consumptions [5]. The phase noise performance of the LC oscillator depends upon the
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Quality factor of the on chip spiral inductor. The quality factor of tank is given by:
WL
(2)
Q= 0
R
Where,
W0 is the oscillation frequency [rad/s]
L is the value of the inductance [H]
R is inductors equivalent series resistance
Q is the Quality Factor.
The resonance tank consists of a high Q inductor. Resonance frequency of the
tank is expressed as:
1
Fosc =
(3)
2 LC
Where,
L is the inductor in Henry of LC tank and C is the capacitance. Due to their
relatively good phase noise, ease of implementation, and differential operation, crosscoupled inductance capacitance (LC) oscillators plays an important role in highfrequency circuit design [4]. Figure 2 has given a proposed design VCO in blocks
form.
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The core component of the figure 4 consists of cross coupled PMOS and NMOS
that is (M1, M2) and (M3, M4) from VCO core to generate a negative resistance to
cancel the loss in the LC tank. The active devices provide negative resistance to
cancel out the equivalent parallel resistance from the inductor, capacitor and device
resistances in order to provide sustained un-damped oscillations. Accurate modeling
of transconductance of the active devices therefore is very important for effective
cancellation of the equivalent parallel resistance in the cross coupled VCO
architecture [6]. The design consists of PMOS (M5, M6) and NMOS (M7, M8) to
form a current mirror confurigation to provide bias current in the design. The passive
element i.e. the on-chip spiral inductor L and capacitor form a LC-Tank. The two
capacitor forms the frequency tuning network and Vcon is the controlled voltage. We
have used current mirror in the VCO design. In order to reduce the power
consumption, phase noise, tuning range because they are the key parameter for the
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Phase noise is most important parameter in VCO design therefore phase noise
performance is optimized by using lessons formula [7].
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Namrata Prasad et al
f0
f
2 K T R K 2 vco
fK T
L ( F M ) = 1 0 lo g [1 + (
) 2 ](1 + c )
+
(4)
f m 2 Pa v
f 2m
2 fmQ
Where,
L (FM) phase noise in dBc/Hz, Fm is the frequency offset from the carrier in Hz,
f0 is central frequency in Hz, fc is flicker noise corner frequency in Hz, Q is the loaded
quality factor of the tuned circuit, F is noise factor, K is Boltzmann's constant in J/K,
T is temperature in K, Pav is average power at oscillator output, R is the equivalent
noise resistance of the varactor and Kvco is oscillator voltage gain in Hz/V.
From equation (4), Kvco dominates the phase noise performance in the modified
Lesson's formula, thus phase noise performance can be improved by reduction Kvco.
Maximum d. c. power dissipation = Vsupply x Ibias
(5)
W 0 max W 0 min
x1 00
W0
(6)
Where,
W0max is the maximum frequency of operation, W0min is the minimum frequency of
operation and W0 is the frequency of operation.
The Simple (FOM) to examine various performances can be expressed as:
FOM (dBF) = 20 log (freq) - phase noise - 10 log (power)
(7)
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Operating
Voltage
Technology
(CMOS)
Operating
Frequency
(GHz)
Power
Consumption
(mW)
Tuning
Range
Phase noise
dBc/Hz
Figure of
Merit
Bandwidth
(GHz)
3V
With
current mirror
Ref [2]
2V
This design
2V
0.18m
(TSMC)
2
0.18m
(UMC)
3.3
0.18m
(UMC)
4.0
0.18m
(UMC)
4.4
0.18m
(UMC)
6.0
15
5.68
6.6
6.9
3.0
10%
1.82%
1.91%
1.95%
1.91%
-131.9 @ 1MHz
offset
-148.59
-126.54 @
1MHz
offset
-126.7 @
1MHz
offset
340dBF
341dBF
-138.39
@
1MHz
offset
359dBF
4.31
3.89
3.71
3.17
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Namrata Prasad et al
147
Conclusion
Paper presents a novel methodology to design a LC-Tank VCO for low power, low
phase noise cross-coupled VCO using 0.18m UMC technology. This design
consume only 3.0 mW of power at 2V voltage supply and achieves the phase noise of
-138.39 dBc/Hz @ 1MHz offset with the center frequency of 6.0GHz. The result
shows that the power consumption has reduced by 2% as compared to the earlier
reported work. The reduced power consumption clearly, indicates the improvements
in the performance of the design. This design also gives better result with balancing
the impedance in the circuit. Finally we have concluded that the results have been
compared with earlier reported work and got improvement in the present results as
given in table.1. The result shows the low phase noise, low power consumption is
suitable for multi-standard wireless applications and mobile receivers where low
phase noise and low power requirement are the essential parameters.
Acknowledgment
This work has been carried out in SMDP VLSI laboratory of the Electronics and
Instrumentation Engineering department of Shri G. S. Institute of Technology and
Science, Indore, India. This SMDP VLSI project is funded by Ministry of Information
and Communication Technology, Government of India. Authors are thankful to the
Ministry for the facilities provided under this project.
References
[1] Peiming LU., Shizhen, H., Lianyi, S., Run, C., Design of A 2GHZ LOW
Phase Noise LC VCO, International Multi Conference of Engineers and
Computer scientists 2009 Vol. 2. IMECS 2009, March 18-20, Hong Kong,
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