CMOS Analog Design

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CMOS ANALOG DESIGN USING

ALL-REGION MOSFET MODELING
Mrcio Cherem Schneider and Carlos Galup-Montoro
Federal University of Santa Catarina, Brazil

Compact

MOSFET model

Circuit examples:
MOSFET sizing in amplifiers
Self-biased current reference

MOS-AK/Baltimore, 2009

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COMPACT MOSFET MODEL

Definitions:

oxide capacitance per unit area

Cox
QI inversion charge per unit area

surface potential

VFB

flat-band potential

QB bulk charge per unit area

VG gate-to-bulk voltage

Charge sheet approximation of the inversion charge

(VG VFB s ) QB
QI = Cox

For constant VG, it follows that

d s dQ B = ( C ox
+ C b ) d s = nC ox
ds
dQ I = C ox
Cb (VG )
n = 1+
= n(VG )

Cox

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UNIFIED CHARGE CONTROL MODEL (UCCM)-1

VS
n+

VG

VD

Cox + Cb = nCox

n+

n = n(VG )
d s
dQI = nCox
Ci =

d s
Ci
=
+ Cb
dVC Ci + Cox

QI


< 1 WI

nCoxt

1

QI

t =

kT
q

SI

1
t

dVC = dQI

nCox QI

VS VC VD
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CMOS Analog Design

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UNIFIED CHARGE CONTROL MODEL (UCCM)-2

1
t

Integrating dVC = dQI

between VC and VP
nCox QI
yields UCCM

QI
QI
QIP
VP VC =
+ t ln

nCox
Q
IP
= nCox t
QIP
QI
qI =
nCox t

Thermal charge
Normalized inversion charge density

Normalized UCCM

VP VC = t (qI 1 + ln qI )
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CMOS Analog Design

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CHARGE-SHEET MODEL (CSM)

drift

diffusion

I D = WQI

d s
dQI
+ W t
dy
dy

ds
dQI = nCox

ID =

drift

diffusion

2
W QIS 2 QID

)
t ( QIS QID

2nCox

W
S=
L

Normalization (specific) current

I S = Cox n

t2
2

t2

Sheet (or square) normalization I SH = Cox n

2
current

I D = I F I R = I S i f ir = SI SH i f ir
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CMOS Analog Design

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WEAK, MODERATE, STRONG INVERSION

I D = I F I R = I S i f ir

i f ( r ) = qIS ( D ) 2 + 2qIS ( D ) qIS ( D ) = 1 + i f ( r ) 1

WI

MI

SI

if <1

1 < i f < 100

100 < i f

qI < 0.4

0.4 < qI < 9

9 < qI

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CMOS Analog Design

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FORWARD AND REVERSE CURRENTS

Long-channel MOSFET I D = I F I R = I (VG ,VS ) I (VG ,VD )
IR: reverse current
IF: forward current
(Forward) Saturation
ID = IF IR IF

IR=
IF=

Triode
ID = IF IR
Triode for VDS0
I F I R ; I D = I F I R << I F

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UNIFIED I-V RELATIONSHIP (UICM)

VP VS = t 1 + i f 2 + ln

1+ i f 1

VD

1,00E-03

10-3

VD = VG

ID (A)

ID

SI

1,00E-04

VS = 0 V

1,00E-05

0.5

MI

VG

1.0

10-6

1,00E-06

VS

1.5
2.0

1,00E-07

2.5

WI

3.0

1,00E-08

-9
1,00E-09
10
0,00E+00
0

5,00E-01

1,00E+00

1,50E+00

2,00E+00

2,50E+00

3,00E+00

3,50E+00

4,00E+00

4 4,50E+00
VG (V)

Common-source characteristics
MOS-AK/Baltimore, 2009

I D = I S i f ir I S i f
since i f >> ir

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PINCH-OFF VOLTAGE AND SLOPE FACTOR

VP VS = 0 = 1 + 3 2 + ln

if=3 at pinch-off

VP

1 + 3 1

VG VT 0
n

VP[V]

Pinch-off voltage and slope factor as functions of VG [0.18 m CMOS technology].

MOS-AK/Baltimore, 2009

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TRANSCONDUCTANCES
I D = g mg VG g ms V S + g md V D + g mb V B
g mg g ms + g md + g mb = 0
Calculation of gms

I D = I F I R = I S i f ir

i f (r )

= qIS ( D ) + 2qIS ( D )

VP VC = t ( qI 1 + ln qI )
g ms

di f

2I S
W
= IS
= QIS =
dVS
L
t
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1 + i f 1

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TRANSCONDUCTANCE-TO-CURRENT RATIO
Transconductance
-to-current ratio

g ms ( d )t
I F (R)

2
1 + i f (r) + 1

2
i f (r )

102
100

g mg

gms/IF

WI (if <1)

g ms g md
=
n

Seqncia1

101
10

in saturation:

tox = 28 nm (IS = 26 nA)

Seqncia2

tox = 5.5 nm (IS = 111 nA)

Seqncia3

g mg

model
1

10010-4
1,00E-04

1,00E-03

10-2

1,00E-02

1,00E-01

100

1,00E+00

1,00E+01

102

1,00E+02

if

1,00E+03

104

1,00E+04

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SI (if >>1)

g ms
=
n

CMOS Analog Design

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COMMON-SOURCE STAGE

gm
vo
vi
jCL
for >> b
GBW

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EXAMPLE: GBW = 10 MHz, CL = 10 pF

Cox = 8010-6 A/V2, n = 1.35
g m = 2 GBW C L = 628 A/V
W/L

500
100
50
10

IDsi (
A)1
0
6.6
33.2
66.4
332

ID (
A)2
22
28.6
55.2
88.4
354

Strong inversion model

Accurate all-region MOSFET model

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ALL-REGION MOSFET MODEL

I D = IWI + I Dsi
IWI = ng mt = 1.35 628 106.26 103 = 22 A

I D = IWI + I Dsi
I D = IWI

gm
= ng mt 1 +

2 Cox t (W / L )

(W / L )th
1 +

(W / L )

g m = (W / L )th ( 2Cox t )

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ASPECT RATIO VS. CURRENT EXCESS

I D = IWI

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(W / L )th
1 +

(W / L )

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SELF-CASCODE MOSFET (SCM)

Sat.

Triode

I S 2 i f 2 = NI x

I2=NIx

I S 1 (i f 1 i f 2 ) = ( N + 1) I x

if1

S2
1
= 1 +
1 + i f 2 = i f 2
S1
N

Applying UICM to both M1 & M2

1+ i f 2 1
VX

= 1 + i f 2 1 + i f 2 + ln
1 + i f 2 1
t

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V-I CHARACTERISTICS OF SCM

I2=NIx

Sat.

Triode
= 1+

S2
S1

1
+

VX

t
In WI:

= 1+if 2 1+ if 2

VX = t ln
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1 + if 2 1

+ ln
1 + i f 2 1

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VOLTAGE FOLLOWING (NMOS)

CURRENT MIRROR (PMOS)1

In WI:
1 B.

Vref = VS 9 + t ln( JK )

Gilbert, AICSP vol. 38, pp. 83-101, Feb. 2004

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SELF-BIASED CURRENT SOURCE

(SBCS)

VFCM

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DESIGN OF A SBCS
VX

= 1+ i f 2 1+ i f 2

Output current: Iref=10 nA

ISHn-channel100 nA, ISHp-channel40 nA

1 + i f 2 1

+ ln
1 + i f 2 1

=1

Let us choose

M1 &M2 in MI: if2 = 10

= 1+

S2= S1, N = 1

=10 nA

S2
1
1 + = 1 + 1 + 1 = 3
S1 N

1 + 30 1
= 1 + 30 1 + 10 + ln
= 2.93
t
1
+
10

VX

VFCM

M3 &M4 in WI: if3(4) <<1

VX

ln = e 2.93 18.7

18.7 = 1 +

S4 1
S4
= 8.85
1 +
S3 1
S3

I S 2i f 2 = 10 nA I S 2 = 1 nA S2 = S1 = 0.01
Let us choose if3=0.187 i f 4 = i f 3 / [1 + 2 S4 / S3 ] = 0.01
S
S3 = 4 = 1.13
8.85

I S 4i f 4 = 10 nA I S 4 = 1 A S 4 = 10

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DESIGN OF A SBCS - Summary

S

if

ir

M1

0.01

30

10

M2

0.01

10

M3

1.13

0.187

0.01

M4

10

0.01

M8, M8(a)

0. 1

M9, M9(a)

0. 1

MP (all)

2.5

0.1

=1

=10 nA

S 4 = 10

S 2 = 0.01
VX = 2.93t
S1 = 0.01

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VFCM

VX = 2.93t
S3 = 1.13

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SBCS: IOUT vs. VDD AT CONSTANT TEMPERATURE1

1E.

M. Camacho-Galeano et al. pp 2230-2233, ISCAS 2008

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REFERENCE

MOS-AK/Baltimore, 2009