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A Sequence of Power Electronics Experiments
A Sequence of Power Electronics Experiments
CHAPTER 19 -- A SEQUENCE OF
POWER ELECTRONICS EXPERIMENTS
19.1 Introduction
19.1.1 Overview
This Chapter lists a series of experiments, with explanatory material, suitable for
exploring power electronics in depth. Four sets of experiments are included: a set of
rectifier experiments that includes a laboratory orientation sequence, a set of dc-dc
converter experiments, inverter experiments, and component experiments. An additional
set, directed toward a dc-dc converter design project, is included as well. The Chapter
in many ways stands alone as a Laboratory Manual; its inclusion here in the text helps
provide a complete context for work in power electronics.
19.1.2 Safety information
The experiments discussed here are designed for relatively low power levels of
about 100 W and below. They therefore can be performed with a minimum investment
in special instrumentation and equipment, and safety concerns are minimized. However,
the risks are not negligible, and it is important to make proper preparations and use due
care in performing the work. Safe lab practice is the responsibility of the experimenter.
It is not possible to perform completely benign power electronics experiments; damaged
components or expensive repairs will be necessary if basic safety rules are not addressed.
It is especially important to be careful when working with spinning motors, and
parts which become hot from power dissipation. Even if rugged equipment is chosen,
many instruments can be damaged when driven beyond ratings. Please follow the safety
precautions listed to avoid injury, discomfort, and lost lab time.
GROUND. Be aware of which connections are grounded, and which are not.
The most common cause of equipment damage is unintended shorts to ground.
Remember that most oscilloscopes are designed to measure voltage relative to
ground, not between two arbitrary points.
RATINGS. Before applying power, check that the voltage, current, and power
levels you expect to see do not violate any ratings. What is the power expected
in a given resistor or other component? Does the device have polarity, and is it
connected in the proper direction?
HEAT. Small parts can become hot enough to cause burns with as little as one
watt applied to them. Even large resistors will become hot if five watts or so are
applied.
19-1
Neckties and loose clothing should not be worn when working with motors.
Be sure motors are not free to move about or come in contact with circuitry.
2.
3.
4.
5.
6.
7.
FET and SCR control circuits as discussed in Chapter 18, along with
transformers described there.
8.
Leads, connectors, various parts, and a breadboard system for circuit prototypes.
19-2
2.
Digital wattmeter.
3.
4.
5.
6.
7.
Diagrams of all circuits used in the lab. The important factors are to be able to
reproduce a setup and check for possible errors.
Procedures and actions. The idea is to provide enough information so that the
experiment could be repeated.
All experiment data. Be sure to include units and scale settings. It is generally
good practice to record data in its most primitive form to avoid errors. Scaling
or other calculations can be done later.
19-3
A self-contained SCR control unit. The suggested design contains three silicon
controlled rectifiers (SCRs) and time delay circuits to produce turn-on control
signals. The anodes and cathodes are isolated.
An isolated power FET control box. The FET provides switch action for almost
any type of dc-dc converter. A complete pulse-width modulation block creates
a PWM switching function, with adjustable frequency and duty ratio. As in the
SCR circuit, this means that the terminals of the FET can be connected to any
voltage level up to the device ratings.
The function of these circuits is to support tests of useful power converters. The internal
operation is important and well worth exploring. The circuits will be considered as "blue
boxes" rather than black boxes, meaning that their function is not hidden away.
19.2.2 Demonstration circuits
For this demonstration, both the SCR and the FET will be used in simple
converter circuits. The SCR set will be used in a controlled full-wave rectifier circuit,
19-4
while the FET unit will be used to form a basic dc-dc converter. These circuits are
typical power electronics applications, not too far removed from simple commercial
products.
There are two major ways to form a full-wave rectifier. One is the rectifier
bridge circuit, which converts a single ac voltage source into a full-wave rectified
waveform. The second involves a center-tapped transformer as a two-phase ac source.
This second form requires a more expensive transformer, but needs only two rectifiers.
Both are shown in Figure 19.1. As shown in the Figure, SCRs can be substituted for the
diodes in a full-wave rectifier. The SCRs are operated half a cycle apart, with an
adjustable phase angle delay.
5.
6.
Remove the diodes, and substitute SCRs labelled A and B from the SCR unit.
Set up the SCR box for two-phase operation. Use a 25 load in this case.
What should the power rating be?
Turn the phase delay control to the lowest setting. Double check all connections,
then turn the power on.
Observe the voltage waveform across the resistor. Notice how the waveform
changes with changes in the control setting. Again measure RMS voltage, RMS
current, power, and average voltage, and consider the relevance of each.
Observe the drain-to-source voltage. Turn the unit on. Adjust the output for
50% duty ratio and about 50 kHz.
Connect a voltage source of 20 to 30 V to the input. Observe the output
waveform and average voltage. Adjust the duty ratio and notice the change.
Adjust the frequency and notice the change. Explain the results.
19-6
A rectifier diode (1N4004) is to be tested on the curve tracer. Since the defining
characteristics are forward voltage and current, the device should be connected
as if its anode were a collector and cathode were an emitter.
2.
With the curve tracer socket off, set up the unit for limits of about 1 A and 1 W.
The 1N4004 can handle up to 400 V in its off state.
3.
Check your connections. Apply power to the socket and observe the diode
waveform. Notice that the typical model of a constant 0.7 V drop has limited
accuracy. A better model would also include a resistor to model the upward
slope of the curve. What resistance and forward voltage provide the most
accurate model for your device?
4.
A BJT is to be tested on the curve tracer. Let us assume that the device is a
generic, unknown part. To be conservative, limit current to 0.1 A, power to 0.5
W, and voltage to 20 V. Connect the part with the socket off.
5.
Double check connections. Allow base current of 0.1 mA per step to be applied.
Turn on the socket. Adjust as necessary to observe the curves. Keep power
levels below 0.5 W in any case if a small device is being tested. Which portions
of the curves are useful for switching action? How much base current will be
needed if the device is to be used to switch 0.5 A?
6.
A power FET is to be tested on the curve tracer. This power part should be
limited to 5 A, 1 W, and 50 V. Connect the part with power off. The drain
terminal should be connected as the collector, source should be connected as
emitter, and gate should be connected as base.
7.
8.
When ready, apply power to the socket and observe the curves which result.
Which portions are relevant for switch action? As with the diode, a resistance
is often used to model the slope of the curves. What value of resistance provides
a good model when the gate-source voltage is 10 V?
9.
The SCR can be thought of as a diode with an extra gate terminal. When
sufficient gate current flows, the device operates as a diode. Without it, the
device is off. For the SCR here, limits of 10 A, 2 W, and 100 V are appropriate.
To test it, associate the anode with a BJT collector, the cathode with an emitter,
and the gate with a base.
10.
Double check connections. The gate current can be made as high as 0.2 A
without damage, but try values around 50 mA to best see the device curves.
11.
Consider what curves are expected (e.g. diode when on), then apply power. Are
the results what you anticipated? Is there a family of curves, as for the
transistors?
19.2.4 Study questions
In each experiment, a set of questions to guide further study and reports will be
provided.
19-8
1.
2.
For the simple dc-dc converter tested in Part 1 of the above procedures, explain
how to predict the average value of output voltage from the input voltage, the
switching frequency, and the switch duty ratio (the fraction of the time during
which the switch is on).
3.
Which portion of the curve tracer device characteristics would you expect to use
in a switching application? What would the curve tracer display if a currentcontrolled ideal switch were to be measured?
19.3
19.3.1 Introduction
The objective of this experiment is to provide additional practice with power
electronics measurement techniques. These will be studied in the context of simple
controlled and uncontrolled rectifier circuits. Properties of simple R-C, R-L, and R-L-C
circuits are studied in introductory circuit analysis courses. Properties of D-C circuits
(diode-capacitor circuits) are less well known. Similarly, D-L, D-L-C, and various D-R-x
circuits are not widely studied. The behavior of these circuits provides a practical look
at power electronic converters, both from the standpoint of energy conversion applications
and from the standpoint of laboratory measurements. This is the focus of the Basic
Rectifier Circuits experiment. The operation of the SCR will be examined briefly as well.
An R-C timing circuit for adjusting the phase delay of an SCR will be constructed and
tested.
19.3.2 Basic theory
Consider the simple half-wave rectifier shown in Figure 19.5. The state of the
diode depends on the input voltage polarity -- and also on the load. With no information
about the load, it is not possible to predict either the load current or voltage. With a
resistive load, the load voltage is zero whenever the diode is off. One simple way to find
the circuit action (even though we already know what the circuit does), is to take a trial
method approach as in Chapter 2. Since an off diode cannot block forward voltage, the
diode will be on if and only if the input voltage is positive. The current is given in
Figure 19.6. All currents and voltages in a diode circuit must be consistent with the
restrictions imposed by the diodes. Even a complicated diode circuit combination can be
understood quickly with the trial method.
Now, look at the inductive load of Figure 19.7. Assume that the inductor is
large. If current is initially flowing in the inductor, the diode is on. Inductor voltage VL
will be positive or negative, depending on the input voltage and the inductor current.
19-9
Dc voltage
Ac voltage
Dc current
Ac current
Resistanc
e
Measurem
ent
range
1 mV - 1
kV average
1 mV - 750
V RMS
1 A - 10 A
average
1 A - 10 A
RMS
1 - 20
M
Valid
frequencie
s
0 Hz
(rejects ac
above 45
Hz)
45 Hz - 50
kHz (rejects
dc)
0 Hz
(rejects ac
above 45
Hz)
45 Hz - 20
kHz (rejects
dc)
---
Error
0.1% of
reading, 1
digit
0.5% of
reading 2
digits
0.5% of
reading, 2
digits
1% of
reading, 2
digits
0.5% of
reading,
1 digit
Figure l9.10 -- Front panel view of digital power meter, with function block.
19.10. The voltage is sensed across the input. The output connection forces the current
to flow through the sensing resistor. An input signal at 0 Hz or 40 Hz-10 kHz will give
a true RMS display.
Low-impedance sense resistors can be used for complete current waveforms, but
they can introduce grounding problems in a circuit. Industrial laboratories specializing
in power electronics make extensive use of Hall-effect current probes that sense the
magnetic fields around conductors. One major drawback is that the probes have an
internal dc offset which might drift as the temperature changes.
19-12
Timing is critical in the operation of most power converters. Since switches are
the only means of control, the exact moment when a switch operates is a key piece of
information. The SCR provides a typical example. Consider the waveforms in Figure
19.11. A sinusoidal waveform (perhaps the input voltage to a rectifier) serves as a timing
reference. It is straightforward to measure the time shift between this waves zero
crossing and the turn-on rise of the switched signal below it. The example in the Figure
shows two 60 Hz waveforms. The time delay d can be measured directly from the graph
as about 1.25 ms. Since a full 360 degree period lasts 16.667 ms, an angle d can be
calculated from d as
(l9.1)
One important detail in making this measurement is to make sure both oscilloscope traces
are triggered simultaneously. The chop mode of the scope is useful for this purpose.
3.
rectifiers, or similar.
Be careful with ground connections. Set the waveform generator for
approximately 1 kHz output at about 10 V peak. Observe Vout with the scope.
6.
7.
Sketch the output waveform under no load conditions (the scope probe gives
a slight load).
Load the bridge with a 500 resistor (compute the necessary power rating first).
Observe and sketch the output voltage waveform. Use a current probe or place
a 10 resistor in series with the transformer output to observe the current out
of the transformer. Sketch the current waveform.
Connect an inductor (a reasonable value is about 25-50 mH) in series with the
resistor. Observe and sketch the resistor voltage waveform and the current into
the bridge. Measure the average resistor voltage with a multimeter.
Remove the R-L load. Instead, attach a 47 resistor in series with an 0.1 F
capacitor. Place a 10 k resistor across the capacitor terminals. Observe and
sketch the capacitor voltage waveform and the bridge input current waveform.
Also measure the average capacitor voltage.
19-14
Use a resistor substitution box or other variable resistor for Rc. Observe the Vg
and Vload waveforms for Rc values of 0, 200, 400, 600, 800, and 1000 .
Sketch the two waveforms for two or three values of Rc. Measure the turn-on
delay by comparing Vg or the gate current with Vload with the oscilloscope set
for line triggering. Also, use a multimeter to measure the average value of Vload
in all cases.
19.3.5 Study questions
1.
2.
3.
4.
5.
6.
For part 1, what waveforms would you expect for R, R-L, and R-C loads? Hint:
think in terms of simple filtering.
Compare the actual waveforms with those expected. Compute the actual circuit
time constants, and discuss how they might affect the waveforms.
The R-L and R-C cases of part 1 represent different output filter arrangements
for a rectifier circuit. Discuss the circumstances under which each of these will
be effective and appropriate.
Comment on how the diode forward voltage drop (about 1V) affects the
waveforms.
From part 2 data, tabulate and plot the average load voltage vs. the value of Rc.
Compute the SCR gate circuit R-C time constants. Is the turn-on delay governed
by R-C?
19-15
19.4
19.4.1 Introduction
This experiment examines the properties of single-phase controlled rectifiers.
Converter concepts such as source conversion and switch types will be illustrated.
Popular applications such as battery chargers and dc motor drives will be tested. In
Section 19.3, you had a chance to become familiar with the basic action of the SCR, and
also studied a number of non-resistive rectifier load circuits. Now, the SCR boxes
described in Chapter 18 will be used to study controlled-rectifier action in more depth.
19.4.2 Basic theory
In a switched converter network, KVL will not allow us to connect the utility ac
voltage source directly to a dc voltage source, so a dc current source is needed. Consider
some of the loads studied in Section 19.3. A resistive load is a crude example of current
conversion: the incoming voltage produces a proportional resistor current. This is a far
cry from an ideal current source, but it does result in a conversion function. An inductive
load is a better conversion example: the inductor voltage VL = L(di/dt) resists any change
in current. If L is very large, any reasonable voltage will not alter the inductor current,
and a current source is realized. A capacitive load has the opposite behavior. The
capacitor current iC = C(dv/dt) responds whenever an attempt is made to change the
capacitor voltage. If C is very large, no amount of current will change the voltage, and
a voltage source is realized. Many electrical loads, especially motors, are inductive. As
a result, most circuits behave in such a way that current does not change much over very
short periods of time. In power electronics practice, this behavior, along with the desired
source conversion function, means that most loads are treated as short-term current
sources.
The basic single-phase controlled rectifier is shown in Figure 19.15. If the load
is inductive, there is a KCL problem: the switch cannot be turned off. To see that this
is so, observe what happens to L(di/dt) when an attempt is made to turn the switch off.
The current must approach zero almost instantaneously. The value of L(di/dt) is a huge
negative voltage. In practice, this voltage will likely exceed the blocking capabilities of
the switch, which will be damaged. A simple solution is to provide a second switch
across the load, as shown in Figure 19.16. In simple ac-dc converters, this switch can be
a diode, or it can be a second bidirectional-blocking forward-conducting device.
Two typical loads for ac-dc converters are the dc motor and the rechargeable
battery. The dc motor has an inductive model, as shown in Figure 19.17. The motor
looks rather like a voltage source, but its windings provide a significant series inductance.
A battery is intended as a good dc voltage source. To provide the desired energy
conversion function, something must be placed in series with the battery for current
conversion. A resistor can be used with a loss in efficiency. Alternatively, an inductor
can be used, as in the circuit of Figure 19.18. Analysis of this circuit is not trivial. The
controlled switch is on whenever Vin is positive. When it is on, the output current is
given by
19-16
(l9.2)
When the controlled switch is off, inductor current is
(l9.3)
If L is large, the current is approximately constant. These differential equations can be
solved to give actual values of current. Charging current is controlled by the resistor
value and also by the phase delay used to operate the SCR.
19-17
Since the output is a dc current source, average power exists only at dc, and is simply
IoutVout(ave).
19.4.3 Procedure
19-18
3.
4.
Set the SCR turn-on for zero delay (i.e. set it to act as a diode). Observe the
output and load voltage waveforms (see the figure). Measure the following
output parameters and sketch the voltage waveform: Vout(ave), Vout(rms).
Repeat #2 for delays of approximately 30, 60, 90, 120, and 150. Sketch just
one or two typical waveforms, rather than the whole series.
Place an inductor, for example 25 mH, in series with the resistor, as shown in
Figure 19.22. Observe the resistor voltage waveform. Repeat #2 and #3 above
for this new circuit, and also record the average and rms values of Vload.
2.
3.
4.
5.
19.5
For the simple loads of Part 1, tabulate and plot Vout(ave) and Vout(rms) vs. the
SCR phase delay angles. Compute a theoretical result, and compare it to the
data. Do these agree?
For the battery load in Part 2, tabulate and plot Iout(ave) and Iout(RMS) vs. the
SCR phase delay angle. Again consider whether your results are consistent with
theoretical expectations.
Why is the flyback diode included in these circuits?
Compute the efficiency of the battery charger studied here.
Comment on how the diode and SCR forward voltage drops affect your results.
Experiment -- Polyphase rectifiers
19.5.1 Introduction
This experiment will examine the properties of ac-dc converters with polyphase
input voltage sources. The midpoint converter will be the focus of this experiment, and
will be tested with inductive loads including a dc motor. In the preceding experiment, the
circuits had a single SCR in a half-wave rectifier configuration. A flyback diode was
needed to provide a current path when the SCR turned off. The simple half-wave circuit
transferred energy to the load no more than half of the time. The half-wave circuit seems
19-20
Basic theory
When multiple input sources are available for ac-dc converters, it is natural to
use all of them. The circuit of Figure 19.24 shows the most general such converter -- an
m-phase to dc converter. The experiment here considers a simplified version of this
converter -- the one in which there is a common neutral connection between input and
output. This is called a midpoint converter, and appears in Figure 19.25.
In the midpoint converter, the KVL and KCL restrictions require that no more
than one switch may be on at any time, and one switch must be on if the load current is
not zero. This implies that qi 1. If the load is a current source, qi = 1. We want
19-21
(l9.7)
19-22
(l9.8)
This, in turn, can be simplified to give
(l9.9)
Notice that Vout(ave) depends on , where is defined as the delay angle between any
voltage and the switching function associated with it. The result is a controlled rectifier.
19.5.3 Procedure
Part 1: Two-phase converter
1.
Set up the 25 V 60 Hz supply for two-phase output. Remember to connect the
output neutral.
2.
Connect the SCRs labelled A and B in the SCR box with a resistive load,
as shown in Figure 19.26. Estimate the required resistor power rating, and abide
by it. Set the SCR box for two-phase control.
4.
Set the SCR turn-on for zero delay (i.e. set it to act as a diode). Observe the
output voltage waveform. Record Vout(rms) and Vout(ave) and sketch the output
voltage waveform.
Repeat #3 for delays of approximately 30, 60, 90, 120, and a delay close to
180. Sketch just one typical waveform, rather than the whole series.
6.
Repeat #3 with a dc motor as the converter load, except set the delay at about
90 initially. Observe and sketch the motor current and voltage waveforms with
no motor shaft load.
Add a moderate shaft load, and observe how the current and voltage waveforms
change. Record your observations.
19.5.4 Study questions
1.
2.
3.
4.
19.6
For each of the load and source combinations, tabulate and plot Vout(ave) and
Vout(rms) vs. the SCR phase delay angle. What would you expect in theory?
How well do your results agree with the theory?
For one phase delay angle (pick 60, for instance), plot Vout(ave) and Vout(rms) vs.
the number of input phases (you have data for one, two, and three). What do
you expect to happen when more phases are used?
Why is the flyback diode not included in these circuits?
A bridge converter implements the full switch matrix of Fig. 19. . How would
Vout(ave) be affected by the use of a bridge rather than a midpoint converter?
Experiment -- One-Quadrant Dc-Dc Conversion
19.6.1 Introduction
The average value of this series is simply D1Vin. Unwanted Fourier components appear
at the switching frequency fswitch and its multiples. The largest unwanted component is
19-25
In general, as switching frequencies increase, the values of dv/dt and di/dt values also
increase, and smaller inductors and capacitors can be used without sacrifice in
performance.
capacitor shown across the input power supply. The capacitor should be placed
as close to the FET box as possible so that the inductance of the wires to the
FET will be very low.
Set the power supply current limit for about 3 A, and the voltage to 12 V. Set
the duty ratio to about 50%. Observe the load voltage, Vload, and the output
voltage Vout.
Turn on the FET box and the input power supply.
Set fswitch to about 100 kHz. Notice that Vout allows easy measurement of
3.
4.
fswitch.
5.
Confirm that the duty ratio is close to 50%. Sketch the Vout and Vload
waveforms.
6.
Use the oscilloscope to measure the peak-to-peak ripple on Vload at duty ratios
of 10%, 50%, and 90%. The ripple measurement can be performed by setting the
oscilloscope input coupling to ac, and expanding the voltage scale.
7.
Measure average values of Vload and Iin at duty ratios of 10%, 30%, 50%, 70%,
and 90%. Use your multimeter for Vload(ave). Record the input and output RMS
voltage and current as well as the power.
8.
Change fswitch to 5 kHz. Try to measure the waveform time constant during the
voltage fall. Recall that this will be the time for Vload to fall from its peak value
to 36.8% of that value.
Part 2 -- Buck-boost converter
1.
Set up the FET control box as a buck-boost dc-dc converter, as shown in Figure
19.32.
2.
Set the power supply current limit for about 3 A, and the voltage to 12 V. Set
the duty ratio to zero. Connect oscilloscope leads across the load resistor and
across the inductor.
3.
Turn on the FET box and the input power supply. Set fswitch to about 100 kHz.
4.
Confirm that the duty ratio is set to about 50%. Sketch the inductor voltage
19-27
5.
waveform. Use the current probe to sketch the inductor current waveform.
Observe and sketch the load voltage waveform.
Measure average and RMS values of Vload and Iin at duty ratios of 20%, 40%,
50%, 60%, and 70%. Record power readings as well. The output voltage
becomes high quickly with D>60%, so be careful.
19.6.4 Study questions
1.
2.
3.
4.
Tabulate your data in an organized fashion. Compare the RMS readings from
the wattmeters with the various average readings. Do they agree?
Compute and tabulate ratios of Vload(ave)/Vin for these converters for your data.
Are the results consistent with duty ratio settings?
Estimate the average input and output power from the average readings of Vload
and Iin for each operating condition. Compare these results to the wattmeter
readings. Calculate efficiency, Pout/Pin, from the wattmeter readings.
Estimate the inductor value from the measurements of fall time in the buck
converter. Use this value to compute an expected load voltage ripple at 100
kHz. How do your results compare with the data? If the inductor value were
to double, how would this affect the behavior of these circuits?
Large dc motor drives have energy considerations beyond those we have seen so
far: the rotating kinetic energy of a large motor is quite considerable, and in a braking
situation, this energy must be removed. The energy can be converted to heat and lost, as
it is in gasoline engine vehicles, or it can be directed back to the energy source for
recovery. This regeneration energy can be controlled only with multi-quadrant circuits.
waveforms.
4.
5.
6.
Set the power supply current limit for about 5.0 A, and the voltage to 24 V
(depending on the motor ratings). Set the duty ratio dial to zero. Connect an
oscilloscope lead across the motor. Set up the current probe to measure the
motor armature current.
Turn on the FET box and the input power supply. Set fswitch to about 20 kHz
(a period of 50 s). Monitor and record the power supply current and voltage
levels and shut down if anything unexpected appears.
Sketch the motor terminal voltage waveform and current waveform with a duty
ratio setting of about 50%. If there are intervals during which Ia = 0, take
special care to record the value of voltage during such intervals. Measure the
peak-to-peak ripple on Ia.
Observe and sketch the motor voltage and current waveforms, and measure the
motor average voltage and current, at: (a) the lowest duty ratio for which the
19-33
7.
motor runs steadily, and (b) a duty ratio of about 90%. In each case, observe
qualitatively the effects of shaft load on the current waveform.
Change fswitch to 2 kHz. Measure the time constant of Vt during its fall. This
will allow you to estimate La later.
5.
1.
2.
3.
4.
5.
19.8
During intervals when Ia = 0, the motor voltage is not necessarily zero. Interpret
its value during such intervals. (Hint: Since Ia = 0, this is an open-circuit
voltage.)
Compute average power into the motor for each operating condition.
Estimate the motor series inductance value from the buck converter data. Use
this to estimate the voltage ripple at 20 kHz. Does this match your
measurements?
Is the average motor voltage determined by the duty ratio?
Why is the class-A chopper incapable of regeneration? What will happen in
such a converter if Vt is suddenly lowered?
Dc-Ac Conversion -- Voltage-Sourced Inverters
19.8.1 Introduction
3.
19-36
(l9.12)
Output current and power depend on the load, in a manner which is actually easy to
calculate. Consider that Vout = RIout +L(dIout/dt). In steady state, Iout is periodic at the
same frequency as Vout, and has a Fourier series
(l9.13)
This series can be differentiated easily. Let Xn = nL. Then we can solve for Iout term
by term, obtaining
(l9.14)
19.8.3 Procedure
Part 1: Voltage-sourced inverter, R-L and R-L-C loads
1.
Set up two FET control boxes in a master-slave configuration, to form a halfbridge inverter. Be sure to include the capacitors and resistors shown with the
power supply input. Refer to Figure 19.48.
3.
4.
5.
6.
7.
Set the power supply current limit, if there is one, for about 2.0 A, and the
voltage to zero. Set the master and slave duty ratio dials for 50 %. Connect
oscilloscope leads and wattmeters across the load resistor and across the
converter output, as shown in Figure 19.48.
Turn on the FET boxes and the input power supply. Set fswitch to 10 kHz. Set
the supply to 24 V.
Measure the output average voltage. Adjust the duty ratio and fine-tune the input
supplies to get 50% duty and zero average output. Small average offsets can
swing the current to the power supply current limits.
Sketch the load resistor voltage and the output voltage waveforms. Record the
RMS voltage, current, and power from the wattmeter. Measure the average input
current from the supply.
Compute the series capacitance needed for resonance with the inductor at the
switching frequency. Add this capacitor in series with the inductor. Adjust the
frequency as needed to obtain near-resonant operation.
Sketch the resistor voltage waveform with the R-L-C load. Record the RMS
value of the load resistor voltage, the output power, and the average input current
from the supplies.
Measure the average output voltage of this circuit. Sketch the waveform.
Place a 1 F capacitor across the output terminals. Again measure the average
output voltage. Also measure the average input current from each source by
taking advantage of the series resistors.
19.8.4 Study questions
1.
2.
3.
4.
How do you expect waveforms for an R-L load to change with frequency?
An alternate method for control of Vout(wanted) is to add a third switch across the
output combination. This allows zero as a possible output value. The duty ratios
can then be adjusted so that Vout changes. Assuming that the dc component
remains at zero, find Vout(wanted) as a function of D for this control scheme.
What is the effect of a resonant load, such as that in Part I?
What is the efficiency of the converter circuits tested above?
19-40
In practice, implementing this slow variation of pulse width is exactly the same
as designing a dc-dc converter. The only issue is to place Vout in two quadrants. And,
in fact, the full-bridge inverter operating under PWM is identical to a two-quadrant buck
converter. The pulse width is intentionally varied, rather than held nearly constant as in
the dc-dc case.
Convenient speed control for ac motors has been a desired goal almost since such
machines were invented. The ac induction motor, for example, is mechanically simple
and rugged, requires no electrical connections between stationary and rotating parts, and
is inexpensive. Unfortunately, the induction motor lacks the easy control of a dc motor.
Ac motor speed control in general requires adjustment of the motor input frequency. The
speed depends on frequency in a direct manner, and the ability to vary f solves much of
the problem. Unfortunately, it is not entirely trivial to vary the frequency applied to a
motor. Ac motors are basically inductive, and have a frequency-dependent impedance.
As the frequency is lowered, input current and internal magnetic flux rise. To counteract
these effects, the voltage must change along with frequency. If the voltage is altered in
the correct manner as a function of frequency, an ac motor can be made to look almost
like a dc motor in terms of speed and torque control.
Until PWM converters were feasible, the process of altering fout and Vout
together was exceedingly difficult. Ac motor controllers were almost unknown twenty
years ago, and those which did exist were expensive, complicated, and used additional
motors for energy conversion. Today, ac motor drives are beginning to displace dc
motors in some applications. These drive units are nearly always based on PWM.
19.9.2 Basic Theory
The half-bridge inverter in Figure 19.51 has output Vout = (2q1 - 1)Vin. If the
duty ratio is varied with time as some modulating function M(t), Vout becomes
(l9.15)
Remember that D must be between 0 and 1. With [kcos(outt)+1] for M(t), Vout is
(l9.16)
Notice that this is not in the form of a Fourier series -- time appears in several places, as
does sin[ncos(outt)]. This can be decomposed into a Fourier series by using properties
of Bessel functions. The necessary relations appear among the trigonometric identities
in the Appendix. The Fourier components appear at frequencies of nswitch mout.
The components drop in amplitude quickly for increasing m, but slowly for increasing n.
It is easy to use a series R-L load as a low-pass filter (just as in the dc-dc buck converter)
in order to separate fout from the unwanted components. This function can be performed
by a deliberate R-L load, or by a motor winding or transformer. The experiment
procedure below illustrates both PWM and the filtering process.
19-42
Set the power supply current limit, if there is one, for about 1.5 A, and the
voltage to zero. Set the master duty ratio to about 50 % and the slave to 100 %.
19-43
3.
4.
5.
6.
7.
8.
For this type of converter, how do you expect waveforms for an R-L load to
change with switching frequency? With modulating frequency?
Why is PWM advantageous in ac motor control?
Draw the full-bridge inverter for PWM. What relationships would you expect
among the various switching functions?
Compute and tabulate the converters efficiency from your part 1 data.
Compare PWM with the simpler inverter scheme of the previous experiment.
19-44
Ac-Ac Conversion
19.10.1 Introduction
19-45
Simple ac regulators can be realized with TRIACs, since they will perform phase
control or integral cycle control on a resistive load without trouble.
The TRIAC is difficult to use when dc currents or voltages are involved, since
conditions needed for turn-off may not appear.
A TRIAC of given size does not use semiconductor material very effectively,
and has much lower ratings than two SCRs which are half as big.
TRIACs are common in consumer products which benefit from simple ac regulators.
Some such devices are used in certain ac motor control applications, particularly those
which resemble phase controlled ac regulators. TRIACs have limitations on levels of
externally applied dv/dt and di/dt. The devices are also relatively slow to turn off. These
limitations confine them mainly to power mains frequencies.
The TRIAC is a very limited bilateral switch. An alternative is to combine
multiple switches of other types to form a true bilateral device. For example, two
switches of type
can be placed in inverse series to form an equivalent
. The
gates of the two sub-units are operated from the same switching function. Possible
implementations appear in Figure 19.54. It is actually relatively convenient to implement
the FET version shown in the Figure, since the gate drive can be used without change in
most cases. The BJT version is more problematic, since applied base current must
support both devices without any balance troubles.
19-46
This is phase modulation, since phase is a function of time. Phase modulation reduces
trivially to the form fswitch = fin fout if M(t) is set to outt. This form of switching
function is easy to implement, and is referred to as linear phase modulation since M(t)
is a linear function of time. The choice M(t) = +outt is given the special name
Universal Frequency Converter (UFC) since it works for any choice of fin or fout. The
choice M(t) = -outt gives rise to a Slow-Switching Frequency Converter (SSFC), and
has the constraint that fin fout. Both of these types are statements of the simplest choices
of switching frequencies. Other choices of M(t) can be made. These are nonlinear phase
modulation methods, with almost unlimited possibilities. Many nonlinear phase
modulation techniques allow control of power flow even with passive loads.
It should be pointed out that phase modulation is not the only way to perform
ac-ac conversion. Pulse-width modulation can also be used, since PWM allows the
creation of nearly any Fourier component, given a fast switching frequency. PWM
methods are being discussed for use in ac output converters which allow ac or dc input.
19.10.4 Procedure
Set up a two-phase to one-phase ac-ac converter based on dual FET bilateral switches, as
shown in Figure 19.55. Apply a switching function at some frequency, and observe
results at the output terminals. Record your observations.
Pay special attention to the waveforms which appear when the switching
frequency is exactly equal to the input frequency. This case is particularly easy to
simulate and study.
19-47
wires to allow application of voltage, insulation which physically supports and separates
the conductors, and a protective package to prevent damage. This naturally complicates
the real behavior.
There are two common classes of commercial capacitors. The first consists of
two flat metal conductors, separated by a dielectric layer. The second type, known as the
electrolytic capacitor, consists of an oxidized metal conductor and a nonmetallic
conductor. Both types can be modelled with a parallel-plate geometry, shown in Figure
19.56. The capacitance value depends on the plate spacing d, the plate area A, and the
dielectric constant of the insulator, ,
according to the relation C = A/d.
A large value of capacitance requires
large plates, small spacings, and high
dielectric constants.
The nonideal effects are
Figure l9.56 -- Parallel-plate capacitor.
relatively clear: the wires and plates
introduce series inductance and
resistance, and an imperfect dielectric could allow some current flow between the plates.
A candidate circuit model emerges, given in Figure 19.57.
Voltage drop across the ESR, which reduces the stored charge relative to
expected values.
The resonant effect of the series R-L-C circuit means that a plot of impedance
vs. frequency will fall at first (capacitive impedance), reach a minimum, and then
rise (inductive impedance).
Any current flow produces loss in the ESR. The higher the frequency of the
applied voltage, the higher the current and losses.
The circuit does not model real behavior well at very low frequencies. For
instance, the original circuit of Figure 19.57 shows that some leakage current will
flow when a dc voltage is applied. Real capacitors show this effect, but the
standard model does not include it.
The ESR mainly represents the dielectric properties. Dielectrics do not usually
act in accordance with Ohms Law. Because of this, the ESR is generally a kind of
nonlinear resistance; for example, it varies with frequency. One traditional way to
characterize such materials is with the loss tangent. The loss tangent, also called tan
or dissipation factor (df), is defined as the ratio of resistance to reactance for a series
R-X circuit. For the standard model of the capacitor, tan = RC. The loss tangent has
a characteristic value for a given capacitor dielectric material, regardless of the plate
geometry. Many dielectric materials are characterized by a loss tangent which is roughly
constant over a wide frequency range. For these reasons, loss tangent or df is often given
in capacitor specification sheets. The ESL is related to packaging and lead structure,
since wire inductance is the most important factor.
In electrolytic capacitors, the insulating layer is formed through an
electrochemical reaction between the two conductors. If voltage of the wrong polarity is
applied, the reaction reverses, and the insulating layer is destroyed. The device becomes
a resistor, and usually overheats and fails quickly. When the correct polarity is applied,
the electrolytic capacitor shows the same general properties as the simple dielectric
version, with two changes: the leakage current levels are much higher, which means ESR
is smaller and df is higher; and the effective plate surface area is very high, which allows
high values of capacitance per unit volume.
19.11.3 Basic theory, inductors
Inductors are formed simply by wrapping a coil around a magnetic material.
Current in the coil creates magnetic flux in the material. If the material is linear, the flux
is proportional to current, so that = Li. The constant of proportionality in this case
defines inductance. By Faradays Law, if this flux varies with time, it gives rise to a
voltage vL = L di/dt. Magnetic materials in general are not linear; these effects will be
studied in more detail in the next later experiment.
19-50
metals, the variation is approximately linear. In power electronics, heat loss and
temperature effects are almost always significant. Since resistance values change with
heating, it can be hard to predict the actual value of a given resistor.
There are several major types of resistors:
Composition and metal oxide resistors are formed as a block (or cylinder) of
nonmetal. The material resistivity and stability are important considerations.
Carbon composition resistors were once the most common. Most materials of this
type are relatively sensitive to temperature shifts.
Wirewound resistors are common at high power levels. A coil of wire, usually
nichrome, is wrapped around a ceramic rod or tube in the simplest arrangement.
While this is a convenient way to spread out heat, it adds a significant
inductance. Special versions which are double wound to avoid excess inductance
can be obtained. These non-inductive versions are substantially more costly
than the simple types.
5.
Part 3: Power resistor tests (these can be performed during frequency sweeps)
1.
Connect a wirewound resistor to a variable dc supply.
2.
Adjust the voltage and current to draw about 10% of the rated power, or 1 W,
whichever is less. Record the voltage and current, then let the part warm up for
at least 5 minutes. Record the voltage and current again.
3.
Adjust the voltage and current to draw about 50% of rated power, or 10 W,
whichever is less. Wait at least five minutes, then record the voltage and
current.
4.
Repeat step 3 for 100% of rated power.
19.11.6 Study questions
Use data for Vin, Vc, and phase to compute the impedance for each tested
capacitor and inductor.
2.
Plot impedance magnitude and phase vs. frequency for each capacitor and
inductor.
3.
Plot resistance vs. power for the wirewound resistor.
4.
Calculate ESL for each capacitor based on the resonant frequency you measured.
5.
Calculate ESR at 1000 Hz and at a frequency near resonance for each capacitor
and inductor from your frequency sweep data. Compare the 1000 Hz results to
the RLC meter data.
6.
Discuss how your data conform to the proposed simple models.
19.12 Magnetics
1.
19-53
examine candidate designs for inductors and transformers. Any real magnetic material
exhibits a maximum value of B, called the saturation flux density Bsat, beyond which it
displays permeability close to that of vacuum. Since the flux in a material is found as
Ni/, where is reluctance, the current ultimately determines whether the saturation flux
density has been reached. Alternatively, the flux is given by /N, or v dt/N. The
integral of voltage (volt seconds) determines the flux, within some integration constant.
In a transformer, saturation must be avoided so that leakage flux stays low. For
ac applications, this means that only the volt second integral is relevant. If a dc current
is imposed on a transformer, an additional flux contribution will appear. In most powerfrequency transformers, the number of turns is high, and dc current must be avoided. In
an inductor, dc current is almost always needed, so that a net energy can be stored.
Inductors must be designed to tolerate high levels of dc current, while providing
consistent, linear, inductance. These two requirements are in conflict with the need for
inductors of substantial value.
Another important issue in modern magnetics design is the current capacity of
the wire used to wind the magnetic device. For instance, a design might call for a great
many turns and a small core. While this is possible when small wire is used, the wire
might melt if the intended currents are applied. It is not uncommon to require hundreds
or even thousands of windings in power frequency devices, and the temptation to use
ever-smaller wire is great. To realize a design, it is helpful to realize that only a fraction
of any core opening can actually be filled with wire (some must be allowed for insulation
and for air spaces around loose windings). It is also helpful to have some guidance about
current capabilities of copper. While no absolute rules can exist, it is often safe to impose
currents of up to 500 A/cm on a copper wire. This number gives some rough assistance
in picking the wire sizes needed.
A transformer design procedure might be as follows:
Identify a magnetic core with low losses over the intended frequency range, and
proper , A, and winding opening size to support the necessary flux.
Compute winding and core losses to see if they are at acceptable levels.
1.
2.
3.
4.
5.
6.
7.
You will be assigned several test cores of various types. Use a ruler to obtain
geometric data for each one, or use manufacturers data.
Wrap approximately 25 turns of wire around each toroid test core, and 40 turns
around each pot core.
Measure the inductance of each device with the bridge or equivalent instrument,
if available.
Place each core, in turn, in the circuit shown in the figure 19.64, with proper
choices of R and C. Be sure to include the 50 resistor Rs.
Use the oscilloscope in the X-Y mode to observe the hysteresis loop at some
frequency. Sketch the loop in your notebook. Measure the slope of either side
of the loop near the origin (B=0 and H=0). Dont forget to make note of the
slope units.
Decrease the applied frequency until a saturation effect is obvious. Again, sketch
the waveforms. Measure the slope of the loop as far into saturation as possible.
Also record the vc value at saturation.
Apply a small dc offset from the input supply, and observe the change in the
loop. Record your observations. Keep in mind that vc measures the integral of
voltage, and not directly.
1.
2.
Use a 1N4004 diode in series with 50 as a load, and repeat your observations.
19.12.4 Study questions
Calculate the permeability of each core at 1000 Hz. Do your numbers agree
with bridge or equivalent measurements?
Calculate Bsat from your hysteresis curves. What volt second rating do you
19-56
3.
4.
19.13
expect for your 25 turn inductors? How do the converter and transformer results
compare to your expectations?
How would a dc current load affect the output of a transformer?
How many turns would be required to create a 10 mH inductor with each of your
cores? What would the dc current rating be, based on saturation limits?
19.13.1 Introduction
The intent of the last experiment (normally conducted over a period of about a
month) is to provide overall experience with a converter design problem. Each group will
design, build, and test a different dc-dc converter. The initial effort tests a basic design
with lab boxes, and considers effects of capacitor ESR and switch forward voltage drop.
The first consideration is to create a paper design as the basis for starting the
project:
Begin with one of the specification sets listed at the end of this Section.
For a dc-dc converter, start with a switching frequency of 100 kHz.
Given your specifications, find the switching frequency for which L >
Lcrit.
In the final experiment, our previous work will culminate in the design of an
actual converter. The first activity will test the basic design values, with the objective of
developing a tentative circuit. Effects of capacitor ESR and switch voltage drops will be
examined. The second activity will concern implementation of the actual switches, along
with their switching functions. The last effort will examine power loss and heat transfer
considerations, and will include tests of the finished converter.
19.13.2 Refining the models
Voltage drops can be integrated into converter design in a straightforward
manner. Consider the circuit shown in Figure 19.64, in which an ideal diode and a
voltage source have been used to model a real diode. The output voltage Vout can be
written in terms of switching functions as:
19-57
Figure l9.64 -- Buck converter with simple model for real diode.
If Vfor is assumed to be roughly 1 V, the average value of Vout can be found as
Vout(ave) = D1Vin + D1 - 1
The input current is still Iin = q1Iout, so Pin(ave) = D1VinIout. But now,
Pout(ave) = D1VinIout - D2VforIout,
which gives an efficiency of
= 1 - (D2Vfor)/(D1Vin).
This is certainly less than 100 %, and represents the loss in the real diode while it is on.
A series resistor could also have been included as part of the diode or transistor models.
Capacitor ESR means that capacitors do not really show any ideal voltage
characteristics. For example, an electrolytic capacitor with tan = 0.10 and C = 200 F
would have ESR of 4 m at 20 kHz. Consider the effect in the boost converter shown
19-58
in Figure 19.65. When switch #1 is on, the output current charges the capacitor, but there
is a voltage drop across the ESR which appears at the output. As switch #1 turns off, the
internal capacitor voltage Vc stays quite constant, but the capacitor current changes
abruptly, which in turn reverses the voltage drop across the ESR, and causes an abrupt
shift in Vout. The output voltage for this converter can be calculated without too much
trouble, if the capacitor voltage is assumed to change in a linear manner. The Vout
waveform is shown in Figure 19.66.
Figure l9.66 -- Output voltage waveform for boost converter of Figure 19.66.
As indicated in Figure 19.66, the ESR voltage drop can be a significant fraction
of the output voltage ripple. If a maximum output ripple is specified, the value of ESR
at the switching frequency will have to be taken into account when designing the
converter. For example, the above converter displays output ripple of about 240 mV,
although a ripple of less than 160 mV would have been expected if the capacitor were a
perfect 200 F device.
1.
2.
3.
4.
5.
1.
2.
3.
4.
5.
detail.
In the next part of the design project, you will select actual FET and diode parts,
in place of the FET box. Be sure you have collected all data needed for models
of your devices and for the capacitors. Also, observe inductor current to confirm
the critical inductance value.
19.13.4 Study questions -- part I
Model the on condition of the FET as a 0.3 resistor, and the on condition of
the diode as a 1 V drop. What value of Vout vs. duty ratio would be expected
for your converter? Does this agree with measured data?
Will you need an FET with lower resistance to meet the requirements?
Compute the ESR of your capacitors from the waveform data.
Find the peak currents and voltages in your inductor and capacitor.
Two common problems in dc-dc converters are: (a) the user accidently connects
the input voltage in the reverse direction, and (b) a short circuit is accidently
connected at the output. Would the converter you are designing be able to
handle these faults? If not, how might it be altered?
is essentially zero, and the gate voltage determines switch operation. The SCR, as a
typical thyristor requires only a pulse at the gate in order to turn on. Gate turn-off
thyristors (GTOs) also require only pulses, although a substantial negative gate current
must be applied to turn the devices off.
The basic requirements are simple enough, but details add great complexity. Let
us first examine the FET, which has relatively simple gate characteristics. To turn the
FET on, the gate region must be charged. The region represents a capacitance, and the
gate drive must be designed to charge this capacitance sufficiently. The channel will
invert when the gate voltage exceeds a threshold level, Vth. In fact, the gate voltage must
be maintained at a level considerably greater than Vth, so that enough charge will be
present in the channel for low effective channel resistance. The gate drive must therefore
apply an overdrive gate voltage, for switching.
To turn the FET off, the gate region must be discharged, and the gate voltage
must be maintained below Vth. Real devices have wide error tolerances on Vth. For
example, the MTM15N35 FET can have any Vth between 1.5 and 4.5, depending on the
device and the operating temperature.
Some gate drive design considerations are apparent:
For turn-on, the drive must rapidly charge the gate to a voltage much
higher than Vgs, while not exceeding the dielectric breakdown limit of
the gate insulator. Typical gate-source capacitance values range from
several hundred to several thousand picofarads.
For turn-off, the drive must rapidly discharge the gate to a voltage
lower than Vth, again without exceeding dielectric limits.
Several device specifications are important in the FET gate drive design. Referring to the
IRF521, a typical power FET, notice the following relevant information:
The gate drive must provide a voltage between the gate and source of about 10
19-61
The gate drive can be designed so that current is drawn only in a brief pulse.
In principle, most of the CV energy in the gate can be recovered, so that
power requirements are very low.
A typical high-performance gate drive circuit appears in Figure 19.68.
19-62
(a)
(b)
Figure l9.69 -- The buck converter with FET switch.
The main drawback of FET gate drives is the need to apply a substantial voltage
between the gate and source as long as the device is to be on. In many converters, this
is not a trivial manner. The familiar buck dc-dc converter is shown in Figure 19.69. For
the unit of Figure 19.69 to work, a voltage equal to Vin + 10 V must be applied to the
FET gate whenever switch #1 is to be on. This second voltage source, higher than the
available source, can be a major stumbling block in building a converter. If the switch
is relocated as in Figure 19.69b, the problem of higher voltage level is alleviated, but the
output is no longer referred to ground potential. The voltage requirements of FETs
sometimes make them difficult to use in many situations.
Bipolar transistors need only a fraction of a volt on the gate (base) terminal. The
base behavior is far more complicated than the FETs gate behavior. A BJT base drive
must supply enough current to guarantee that the transistor will be fully on. This means
that Ib must be chosen to be larger than the expected collector current Ic/. In power
transistors, can be quite low -- values of 5 or less are not unusual for devices rated over
ten amps. Furthermore, in order to operate the device at the highest possible speed, an
overdrive current pulse should be applied at turn-on. This pulse is usually chosen to be
nearly equal to Ic. Such high currents are difficult to achieve, since they call for
impedance levels well under 1 .
The 2N3055 can serve as a guide for base drive design. This device allows a
base current as high as 7 A. The voltage at the base terminal will not exceed roughly 1.5
V. The gain value can be as low as 5, so that base current of about 3 A might be
needed if Ic approaches the maximum value of 15 A. A candidate base drive circuit is
shown in Figure 19.70. The major difference between this and the FET drive is that it
involves much lower impedances. Many base drive circuits include transformers to obtain
high currents and low impedances.
Thyristors, as latching devices, are much different from transistors. A signal
must be applied to the gate only until sufficient anode current flows. Then the gate signal
can be removed. For example, the 2N6508 requires a gate signal of 75 mA or more at
a voltage of up to 1.5 V. The gate signal will not be needed once the anode current
reaches a "holding current" of 40 mA. This can occur as little as 2 s after the start of
the gate pulse. A pulse transformer can serve as a suitable driver for such requirements.
19-63
extreme this negative voltage. In an FET switching 10 A in 100 ns, even with a circuit
inductance as low as 1.0 H, a voltage of 100 V will be generated, independent of the
converter voltage levels. This voltage will appear across the switch as it turns off,
causing commutation loss and possibly approaching the switch voltage limits.
This effect is detrimental, since it leads to extra losses and even switch failure.
It is necessary to minimize the circuit inductance, and to keep di/dt sufficiently small.
Leads should be short and of proper size. Loops or other features which enhance
magnetic field coupling must be avoided. It is desirable to act upon the switching
trajectory itself. After all, the problem here is a switching trajectory which reaches
voltages much higher than any circuit voltage when current is still high.
Circuits which act directly on the switching trajectory are called snubbers. The
function of a snubber is to shape the switching trajectory and hence protect the switching
device. For this reason, most snubbers are wired directly to a switch, and would be
considered an actual part of the switch itself for purposes of converter design. For
example, a capacitor can be placed across the semiconductor, so that some of the energy
needed by the load during commutation is provided by the capacitor. A resistor might be
used to discharge the capacitor one the switch has reached the new operating state.
A simple RC snubber causes the switch voltage to change relatively slowly
(beginning at about zero) during turn-off. Unfortunately, the opposite occurs during turnon. In this case, the transistor voltage changes slowly, beginning at Vin, during switching.
The switching power loss will actually increase. It is apparent that a turn-off snubber and
a turn-on snubber have different requirements. To avoid this difficulty, it is necessary to
add circuitry so that the simple RC snubber discussed above will operate only during
transistor turn-off. A switch is needed! This switch needs to carry current only during
commutation, so that its ratings can be based on momentary performance, rather than on
continuous capabilities. A possible snubber circuit is shown in Figure 19.72. During
turn-off, it causes voltage to change relatively slowly. While the transistor is off, the
snubber capacitor charges up to Voff. But at transistor turn-on, the snubber circuit diode
prevents current flow from the snubber capacitor. The second resistor, R2, discharges C
during the transistors on-time so that the snubber will again be ready for turn-off.
adding a lossy snubber. Lossless snubbers, which use only switches and energy storage
elements, are feasible, and have been discussed in the literature.
1.
2.
5.
6.
Insert the FET and diode into your converter circuit. Pay attention to grounds
and to isolation requirements for voltage sources.
Observe the FET voltage and current, and the gate voltage. Choose a reasonable
value of frequency and duty ratio, based on your converter requirements. Sketch
the waveforms. What are the turn-on and turn-off times of your switches?
Vary the duty ratio and frequency. Again observe the FET signals. Take data
necessary to find effects of D and f on rise and fall times. Be sure to observe
the effect of very high switching frequency.
Use the X-Y mode of your oscilloscope to observe and sketch the switching
19-66
7.
1.
2.
3.
4.
19-67
the simplest is called output voltage control. Here, the output voltage is sensed and
subtracted from a given reference value. The result is amplified, and applied to the duty
ratio input of a PWM circuit. A block diagram is shown in Figure 19.74. In a buck
converter which uses this circuit, the input-output relationship can be written:
Vout = k(Vref - Vout)Vin.
Simplifying this,
Vout(1 + kVin) = kVrefVin.
If k is large so that kVin >> 1, then both sides can be divided by kVin to give
Vout = Vref.
It is easy to show that this result applies even when residual switch voltages are included:
a large gain will produce output equal to the reference value, in spite of changes in
supply, load, or other uncontrolled parameters, as long as the converter duty ratio is within
the allowed limits.
While this style of proportional gain feedback is simple and appealing, it has two
important drawbacks. The first is that the output is not exactly equal to the input, even
in steady state, because k cannot be infinite. This should be clear when you consider that
the converter duty ratio D is given by D = k(Vref - Vout). Since we expect D to have
some value greater than zero, the value Vref - Vout must also be greater than zero. A
second drawback is that if k is too large, then any slight disturbance will drive D to the
limits 0 or 1, and the converter output will jump around almost at random. One
alternative is to add an integrating element D = k(Vref - Vout) + kivref - vout to the
control. This eliminates steady-state error without requiring extreme gain.
Converter control can also be implemented with series regulators for output
filtering. Consider the regulator circuit below. The zener diode has been used to provide
19-68
a reference signal for the series regulator. The output transistor exhibits a small voltage
drop (typically less than 1 V) between the base and the emitter. If the base is set to 6 V,
for example, we might expect about 5 V at the emitter. Consider the effect of an external
load change which attempts to decrease Ve. Then more current will flow into the base,
and Ic will increase since it is given by Ib. The emitter current will rise, which would
be expected to result in an increase in Ve. Similarly, an attempt to increase Ve will
produce lower emitter current.
This simple circuit will work as long as the output pass transistor is in its active
state. The transistor must not act as a switch. This, in turn, requires that there be
sufficient voltage at the collector so that saturation is always avoided, and that there be
sufficient base current to avoid cutoff. One way to assure both of these is to keep Vc >
Vout + 2 V, and to use a high-gain transistor with a high bias current through the zener
diode. For a pass transistor with = 25, and Iout < 2 A, the required bias current is 80
mA. The zener diode thus requires power of 0.08 6, or about W. A final circuit,
designed for Vout + 2 < Vc < Vout + 5, is given in Figure 19.76. With a 10 W load, this
regulator is about 68 % efficient with 7 V input and 43 % efficient with 10 V input.
Even though the efficiency is not good, the output quality is very high.
emissivity
0.05
0.10
0.90
A flat black heat sink with temperature of 50C and e = 0.9 will transfer 0.04 W/m to
surroundings at 20C. In many situations, radiation heat transfer can be neglected.
In the case of both conduction and convection, heat flux depends linearly on a
temperature difference. The thermal conductivity can be used to define a thermal
resistance, analogous to electrical resistance. The total heat flow in watts can be
multiplied by the thermal resistance to give the temperature difference, so that the
temperature of a semiconductor Tj is equal to Ploss(ja) + Ta, where ja is the thermal
resistance in K/W between the semiconductor and the surrounding ambient, and Ta is the
ambient temperature. (Please realize that only temperature difference is involved, so that
units of K become equivalent to units of C. Most manufacturers give in C/W.)
19.13.13 Procedure -- part III
Converter checkout (open loop):
1.
Operate your converter over its specification range. Measure its efficiency under
several operating conditions.
2.
Check the operation of your converter over its full range. Make note of any
combinations of Vin and Pout for which you could not meet the specifications,
and determine the issues associated with the limitations.
19-70
3.
3.
Measure and record the temperatures of the switching devices under conditions
of maximum load and minimum Vin. Let the circuit stabilize for about ten
minutes, but shut it down if your measured values go beyond 120C. If the
temperature reaches steady state, record it and record electrical information to
allow you to calculate power loss in the FET and the diode.
Take temperature measurements at two other combinations of Pout and Vin.
6.
7.
1.
2.
J.
Input Voltage Range:
3 V to
Output Voltage:
5 V 1 %
Output Load Range:
0 W to
(battery powered)
25
8 V to
V %
0 W to
15
20
25
35
40
18
K.
Input Voltage Range:
Output Voltage:
6
Output Load Range:
L.
M.
100
N.
V
100
O.
Input Voltage Range:
25 VRMS, 50-60 Hz
Output Voltage:
13 V adjustable 1 V, with current limited to 5 A
Output Load Range:
0 W to
70 W
P.
Input Voltage Range:
25 V to
Output Voltage:
12 V 1 %
Output Load Range:
50 W to
50
V RMS, 60 Hz
100
Q.
Input Voltage Range:
22 V to
26 V
Output Voltage:
12 2 cos(120t) V 0.2 V
Output Load:
50 W
R.
Input Voltage Range:
5 V to
12 V
Output Voltage:
1 to 2 V 0.02 V (mean is adjustable)
Output Load:
20 to 40 A
19-73
Symbol
VDSS
VGS
ID
TJ
Maximum limit
100 V (520), 60 V (521)
20 V
8 A continuous, 32 A peak
150C
Characteristic
Thermal resistance, junction-case
junction-ambient
Residual current, VGS=0, VDS=max
Gate threshold voltage
On-state resistance, VGS=10
Input capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Symbol
JC
JA
IDSS
VGS(th)
RDS(on)
Ciss
td(on)
tr
td(off)
tf
Typical value
3.12 K/W
62.5 K/W (no sink)
0.2 mA
2 to 4 V
0.3
600 pF
40 ns
70 ns
100 ns
70 ns
Rating
Drain-source voltage
Gate-source voltage
Drain current
Junction temperature
Symbol
VDSS
VGS
ID
TJ
Maximum limit
350 V
20 V
15 A continuous, 60 A peak
150C
Characteristic
Thermal resistance, junction-case
junction-ambient
Residual current, VGS=0, VDS=max
Gate threshold voltage
On-state resistance, VGS=10
Input capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Symbol
JC
JA
IDSS
VGS(th)
RDS(on)
Ciss
td(on)
tr
td(off)
tf
Typical value
0.83 K/W
30 K/W (no sink)
0.25 mA
2 to 4.5 V
0.3
3000 pF
35 ns (351), 60 ns (15N35)
65 ns (351), 180 ns (15N35)
150 ns (351), 450 ns(15N35)
75 ns (351), 180 ns (15N35)
19-74
2N3055A (BJT):
Rating
Collector-emitter voltage
Base-emitter voltage
Collector current
Base current
Junction temperature
Symbol
VCE0
VBE
IC
IB
TJ
Maximum limit
60 V
-7 V
15 A continuous
7A
200C
Characteristic
Thermal resistance, junction-case
Residual current, IB=0, VCE=30
Dc current gain
Collector-emitter saturation voltage
Turn-on delay time
Rise time
Storage time
Fall time
Symbol
JC
ICE0
hFE
VCE(sat)
td(on)
tr
ts
tf
Typical value
1.52 K/W
0.7 mA
40 (IC=4 A), 5 (IC=10 A)
1.1V (IC=4A), 3V (IC=10A)
0.1 s
2 s
2 s
2 s
Rating
Blocking voltage (forward or backward)
Peak gate current
Forward current
Symbol
VAK(off)
IGM
IT
Junction temperature
TJ
Maximum limit
600 V
2A
25 A RMS, 16 A ave,
300 A cycle surge
125C
Characteristic
Thermal resistance, junction-case
Residual current, IG=0, VAK=max
Gate trigger current
Gate trigger voltage
Holding current
On-state residual voltage
Turn-on time
Turn-off time
Critical rate of rise of off-state voltage
Symbol
JC
IT(off)
IGT
VGT
IH
VAK(on)
tgt
tq
dv/dtC
Typical value
1.5 K/W
2 mA
25 mA (75 mA worst case)
1V
35 mA
1V (IT=3A), 1.8V (IT=50A)
1.5 s
35 s
50 V/s
2N6508 (SCR):
19-75
Symbol
VR
IF(ave)
TJ
Maximum limit
400 V
15 A, 150 A cycle surge
175C
Characteristic
Thermal resistance, junction-case
junction-ambient
Reverse current, VR=max
Forward voltage, IF = 15 A
Reverse recovery time
Symbol
JC
JA
IR
VF
trr
Typical value
1.5 K/W
40 K/W
500 A
1.2 V
60 ns (max)
Rating
Supply voltage
Logic input voltage (pins 5, 8, 12)
Analog input voltage (pins 1, 2, 6, 7)
Junction temperature
Symbol
VS
Vin
Vin
TJ
Maximum limit
40 V (max), 7 V (min)
-0.3 to +5.5 V
-0.3 V to VS
150C
Characteristic
Thermal resistance, junction-ambient
Frequency range
f
Reverse current, VR=max
Forward voltage, IF = 15 A
Reverse recovery time
Symbol
JA
IR
VF
trr
19-76
Typical value
66 K/W
1 Hz to 500 kHz
500 A
1.2 V
60 ns (max)
SG3526 Operation
19-77
19.14 References
S. B. Dewan, G. R. Slemon, A. Straughen, Power Semiconductor Drives. New York:
John Wiley, 1984.
Donald M. Trotter, Jr., Capacitors, Scientific American, vol. 259, no. 1, July, 1988, pp.
86-90B.
Data sheets are summarized from various Motorola Semiconductor Corporation Data
Books (IRF 500, 2N3055, 2N6508, MUR3040PT).
SG3256 data sheets are summarized from Signetics, Inc. data books.
IRF 351 data sheets are summarized from HEXFET Databook, 3rd edition, International
Rectifier Corp., El Segundo, Calif., 1985, pp. D-67 - D-72.
B. Williams, Power Electronics: Devices, Drivers and Applications. New York: Wiley,
1987, pp. 90-108.
J. Kassakian, G. Verghese, M. Schlecht, Principles of Power Electronics. New York:
Addison-Wesley, 1991, pp. 693-710.
19-78