Worksheet of the student

Date of Performance: 1/FEB/15

NAME:BACHU SAIRAM
Registration No: 11309165
Roll No. A21
Exp No. 1
Aim: Implementation of Half/Full Adder/Subtractor.
Programme code:
HalfAdder:
module halfadder(sum,ca,a,b);
output sum,ca;
input a,b;
xor a1(sum,a,b);
and(ca,a,b);
endmodule
Half Sub:
module halfsub(diff,borrow,a,b);
output diff,borrow;
input a,b;
xor a1(sum,a,b);
not a2(a,e);
and a3(ca,a,b);
endmodule
FullAdder:
Modulefulladder(sum,ca,a,b,c);
output sum,ca;
input a,b,c;
wire p,q,r;
xor x1(p,b,c);
xor x2(sum,a,p) ;
and x3(q,a,p); and x4(r,b,c);
or x5(ca,q,r);
endmodule
Full Sub:
Module fullsu(diff,borrow,a,b,c);
output diff,borrow;
input a,b,c;
wire p,q,r;
xor x1(p,b,c);
xor x2(diff,a,p);
and x3(q,~a,p);

and x4(r,b,c); or
x5(borrow,q,r);
endmodule
Graphs:
Half Adder:

Half Sub:

Full Adder:

Full Sub:

Learning Outcomes:
After this exp. We learnt the implementation of half adder, full adder, half subtractor and full subtractor and learnt
to run them on Xilinx software and study the output waveforms and also came fimilar with ISE simulator .

To be filled by Faculty
S.No.

Parameter (Scale from 1-10, 1 for very poor and Max. Marks

Marks Obtained

10 excellent)

Understanding of the student about

the procedure/apparatus.

20

Observations and analysis

including learning Outcomes

20

Completion* of experiment,
Discipline and Cleanliness

Signature of Faculty Total marks

Obtained

10

Total marks obtained