cascode_biasing.

mcd

9/1/2009

High-Swing Cascode Biasing

IS

Assume M1, M2, M4 are in saturation, and M3 in triode region.

Vds1 is set to slightly above Vov1 by controlling Vds3 (sizing M3).
Also assume square-law behavior and ignore CLM effect.

IS
B

M2

M4
X

M1
--> Cox (W1/L1), Vov1 = Vgs1 - Vth1
M2, M4 --> , Vov2
M3
--> n, Vov3

Sizing:

M1
M3

Vgs2 Vds1 = Vgs4 Vds3 = Vgs3

KVL:

Is =

1
2

1 Vov1 =

1
2

2 Vov2 =

Vov3 Vds3

1
2

Vds3

The goal is to establish the gate

voltages of M1 and M2 properly.

If M2 and M4 are matched devices of the same size, Vgs2 = Vgs4, and we have,
Vds1 = Vds3
Vds3 Vgs4 = Vgs3

Also,

Vov3 = Vov4 Vth4 Vds3 Vth3 = Vov2 Vds1 Vth

So,

where, Vth is the threshold voltage difference between the cascode (M4) and bottom device (M3)

So,

1
n

Let,

Solve to obtain

1
2

Vov1 Vds1 Vth Vds1

Vth

So,

Vov1

1
n

Vds1 = Vds3 =

Vds1

2
= 1 Vov1
2

Vov1 Vds1 Vds1

1
2

Vds1

= 1 Vov1
2

2 n V = V

ov1
ov1

Conclusion

If

Vth
Vov1

is small compared to

1
2

, then =

1
2

1
2

is largely determined by sizing only,

i.e., Vds1 will track Vov1.

E.x., for = 1.25 and = 1, we obtain n ~ 4. Usually, n is set by SPICE simulation due to CLM and
other second-order effects.