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  • NAND Gate Implementation:: Verification of AND Function

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    Tamoor Ramzan
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    The document describes the implementation and verification of basic logic gates like NAND, NOR, and NOT. It shows the truth tables for each gate function and how different combinations of inputs map to the expected outputs. Alternate symbols for representing these logic gates are also presented along with their equivalent functions. Boolean logic equations are written for two functions, F1 and F2, in terms of minterms and maxterms using the inputs A, B, C, and D.

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    Gate representations in digital logic design

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    13005065148

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    The document describes the implementation and verification of basic logic gates like NAND, NOR, and NOT. It shows the truth tables for each gate function and how different combinations of inputs map to the expected outputs. Alternate symbols for representing these logic gates are also presented along with their equivalent functions. Boolean logic equations are written for two functions, F1 and F2, in terms of minterms and maxterms using the inputs A, B, C, and D.

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    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as docx, pdf, or txt
    12 views10 pages

    NAND Gate Implementation:: Verification of AND Function

    Uploaded by

    Tamoor Ramzan
    The document describes the implementation and verification of basic logic gates like NAND, NOR, and NOT. It shows the truth tables for each gate function and how different combinations of inputs map to the expected outputs. Alternate symbols for representing these logic gates are also presented along with their equivalent functions. Boolean logic equations are written for two functions, F1 and F2, in terms of minterms and maxterms using the inputs A, B, C, and D.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
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    of 10

    NAND gate implementation :

    Verification of AND function:-

    Inputs

    Output
    A

    0
    0
    1
    1

    Verification of OR function:-

    0
    1
    0
    1

    Desired
    x=A.B
    0
    0
    0
    1

    Observed
    0
    0
    0
    1

    Inputs

    Output
    A
    0
    0
    1
    1

    Desired
    x=A+B
    0
    1
    1
    1

    B
    0
    1
    0
    1

    Verification of NOT function:-

    Inputs

    Output
    A
    0
    1

    Desired
    X=A'
    1
    0

    Observed
    1
    0

    Observed
    0
    1
    1
    1

    NOR gate implementation of Boolean


    Function :
    Verification of AND function:-

    Inputs

    Output
    A
    0
    0
    1
    1

    B
    0
    1
    0
    1

    Desired
    x=A.B
    0
    0
    0
    1

    Observed
    0
    0
    0
    1

    Verification of OR function:Inputs

    Output
    A
    0
    0
    1
    1

    B
    0
    1
    0
    1

    Desired
    x=A+B
    0
    1
    1
    1

    Observed
    0
    1
    1
    1

    Alternate Logic Gate Representation :


    Verification of Alternate Logic Gate Symbols:

    Output

    Inputs
    A
    0
    0
    1
    1

    Observed

    B
    0
    1
    0
    1

    1
    0
    0
    0

    Inputs
    A
    0
    0
    1
    1

    Output
    Observed

    B
    0
    1
    0
    1

    1
    1
    1
    0

    Above mentioned alternate logic gate is equivalent to NOR gate

    Above mentioned alternate logic gate is equivalent to NAND gate

    Inputs
    A
    0
    1

    Output
    Observed
    0
    1

    Above mentioned alternate logic gate is equivalent to Not gate

    Output

    Inputs
    A
    0
    0
    1
    1

    Above mentioned alternate logic gate is equivalent to NAND gate

    Output

    Inputs
    A
    0
    0
    1
    1

    Observed

    B
    0
    1
    0
    1

    1
    0
    0
    0

    Above mentioned alternate logic gate is equivalent to NOR gate

    Truth Table:

    Observed

    B
    0
    1
    0
    1

    1
    1
    1
    0

    A
    0
    0
    0
    0
    0
    0
    0
    0
    1
    1
    1
    1
    1
    1
    1
    1

    B
    0
    0
    0
    0
    1
    1
    1
    1
    0
    0
    0
    0
    1
    1
    1
    1

    C
    0
    0
    1
    1
    0
    0
    1
    1
    0
    0
    1
    1
    0
    0
    1
    1

    D
    0
    1
    0
    1
    0
    1
    0
    1
    0
    1
    0
    1
    0
    1
    0
    1

    F1
    0
    1
    1
    1
    1
    0
    1
    0
    1
    1
    1
    1
    1
    1
    1
    1

    F2
    0
    1
    0
    1
    1
    1
    1
    1
    0
    1
    0
    1
    0
    1
    0
    1

    MINTERM OF F1
    F1=m1+m2+m3+m4+m6+m8
    F1= (A+B+C+D)+ (A+B+C+D)+ (A+B+C+D)+ (A+B+C+D)+
    (A+B+C+D)+ (A+B+C+D)
    MAXTERM of F1
    F1=M0.M5.M7
    F1=(A+B+C+D).(A+B+C+D).(A+B+C+D)
    2) Write the Boolean Logic equation in term of minterms of sum and
    maxterms of products for function F2 in terms of the inputs A, B, C, D
    MINTERM OF F2
    F2= m1+m3+m4+m5+m6+m7+m9+m11+m13+m15
    F2= (A+B+C+D)+ (A+B+C+D)+ (A+B+C+D)+ (A+B+C+D)+
    (A+B+C+D)+ (A+B+C+D)+ (A+B+C+D)+ (A+B+C+D)+ (A+B+C+D)+
    (A+B+C+D)

    MAXTERM OF F2
    F2= M0.M2.M8.M10.M12.M14
    F2=(A+B+C+D).(A+B+C+D).(A+B+C+D).(A+B+C+D).(A+B+C+D).
    (A+B+C+D)

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