Ref:(i) An Introduction to Logic Circuit Testing by parag

lala- chapter 3
(ii) VLSI Test Principles and Architectures: Design for
Testability by Laung-Terng Wang, Cheng-Wen Wu,
Xiaoqing Wen

Built-In Self Test (BIST)

1. Introduction

Built-In Self Test (BIST)

1. Introduction

Built-In Self Test (BIST)

2. Pattern Generation

Built-In Self Test (BIST)

2. Pattern Generation

Pseudo-Random Generation using LFSR

Built-In Self Test (BIST)

2. Pattern Generation

Pseudo-Random Generation using LFSR

Example of a 4-bit LFSR as a Pattern Generator.

Pseudorandom states generated by the LFSR.

Built-In Self Test (BIST)

1. Introduction
2. Pattern Generation
3. Signature Analysis
4. BIST Architectures
5. Summary

Built-In Self Test (BIST)

3. Signature Analysis
Serial

n-Bit (Internal XOR) Signature Generator.

Built-In Self Test (BIST)

3. Signature Analysis
Serial

n-Bit (External XOR) Signature Generator.

Built-In Self Test (BIST)

3. Signature Analysis

Serial

Example of a 4-bit (External) Signature Generator.

Q.1.

Sol.1.

Built-In Self Test (BIST)

3. Signature Analysis

Parallel

r-Bit (Internal XOR)

Parallel Signature Generator.

r-Bit (External XOR)

Parallel Signature Generator.

Built-In Self Test (BIST)

3. Signature Analysis
Modular LFSR Serial Compacter Example

Built-In Self Test (BIST)

3. Signature Analysis
Modular LFSR Parallel Compacter Example

Built-In Self Test (BIST)

1. Introduction
2. Pattern Generation
3. Signature Analysis
4. BIST Architectures
5. Summary

Built-In Self Test (BIST)

4. BIST Architectures
Built-In Logic Block Observer (BILBO)

Built-In Self Test (BIST)

4. BIST Architectures

Built-In Self Test (BIST)

4. BIST Architectures
Built-In Logic Block Observer (BILBO)

Modular Bus-Oriented Design with BILBO.

General Form of a BILBO

maximallengthsequence
=2n1

BIST- Scan path Technique