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74LS74 PDF
74LS74 PDF
74LS74 PDF
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LOW
POWER
SCHOTTKY
OUTPUTS
OPERATING MODE
Set
Reset (Clear)
*Undetermined
Load 1 (Set)
Load 0 (Reset)
*
SD
SD
L
H
L
H
H
H
L
L
H
H
X
X
X
h
l
H
L
H
H
L
L
H
H
L
H
14
1
PLASTIC
N SUFFIX
CASE 646
Both outputs will be HIGH while both SD and CD are LOW, but the output
states are unpredictable if SD and CD go HIGH simultaneously. If the levels
at the set and clear are near VIL maximum then we cannot guarantee to meet
the minimum level for VOH.
X = Dont Care
l, h (q) = Lower case letters indicate the state of the referenced input
SOIC
D SUFFIX
CASE 751A
i, h (q) = (or output) one set-up time prior to the HIGH to LOW clock transition.
ORDERING INFORMATION
Parameter
Supply Voltage
Min
Typ
Max
Unit
Device
Package
Shipping
4.75
5.0
5.25
SN74LS74AN
14 Pin DIP
2000 Units/Box
25
70
SN74LS74AD
14 Pin
TA
Operating Ambient
Temperature Range
IOH
0.4
mA
IOL
8.0
mA
SN74LS74A
LOGIC DIAGRAM (Each Flip-Flop)
SET (SD)
4 (10)
Q
5 (9)
CLEAR (CD)
1 (13)
CLOCK
3 (11)
Q
6 (8)
D
2 (12)
LOGIC SYMBOL
4
10
D SD Q
CP
CD Q
12
D SD Q
11
CP
CD Q
13
VCC = PIN 14
GND = PIN 7
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2
SN74LS74A
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol
Parameter
VIH
VIL
VIK
VOH
VOL
O
IIH
Min
Typ
Max
Unit
2.0
0.8
0.65
2.7
1.5
3.5
ICC
IOL = 4.0 mA
0.35
0.5
IOL = 8.0 mA
20
40
mA
0.4
0.8
mA
100
mA
VCC = MAX
8.0
mA
VCC = MAX
0.1
0.2
IOS
0.4
Data, Clock
Set, Clear
Input LOW Current
Data, Clock
Set, Clear
0.25
IIL
Test Conditions
20
Note 1: Not more than one output should be shorted at a time, nor for more than 1 second.
Parameter
fMAX
tPLH
tPHL
Clock Clear
Clock,
Clear, Set to Output
Min
Typ
25
33
Max
Unit
MHz
13
25
ns
25
40
ns
Max
Unit
Test Conditions
Figure 1
Figure 1
VCC = 5.0
50V
CL = 15 pF
F
Parameter
Min
Typ
Test Conditions
tW (H)
Clock
25
ns
Figure 1
tW (L)
Clear, Set
25
ns
Figure 2
20
ns
ts
20
ns
th
Hold Time
5.0
ns
Figure 1
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3
Figure 1
VCC = 5.0 V
SN74LS74A
AC WAVEFORMS
1.3 V
D*
1.3 V
th(H)
th(L)
ts(L)
ts(H)
tW(H)
tW(L)
1.3 V
1.3 V
CP
tPHL
Q
1
fMAX
tPLH
1.3 V
1.3 V
tPHL
tPLH
1.3 V
1.3 V
*The shaded areas indicate when the input is permitted to change for predictable output performance.
tW
SET
1.3 V
1.3 V
tW
CLEAR
1.3 V
tPLH
tPHL
1.3 V
1.3 V
tPHL
1.3 V
tPLH
1.3 V
1.3 V
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4
SN74LS74A
PACKAGE DIMENSIONS
N SUFFIX
PLASTIC PACKAGE
CASE 64606
ISSUE M
14
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
A
F
T
SEATING
PLANE
K
H
D 14 PL
0.13 (0.005)
M
M
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5
DIM
A
B
C
D
F
G
H
J
K
L
M
N
INCHES
MIN
MAX
0.715
0.770
0.240
0.260
0.145
0.185
0.015
0.021
0.040
0.070
0.100 BSC
0.052
0.095
0.008
0.015
0.115
0.135
0.290
0.310
10_
0.015
0.039
MILLIMETERS
MIN
MAX
18.16
18.80
6.10
6.60
3.69
4.69
0.38
0.53
1.02
1.78
2.54 BSC
1.32
2.41
0.20
0.38
2.92
3.43
7.37
7.87
10_
0.38
1.01
SN74LS74A
PACKAGE DIMENSIONS
D SUFFIX
PLASTIC SOIC PACKAGE
CASE 751A03
ISSUE F
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
A
14
B
1
P 7 PL
0.25 (0.010)
R X 45 _
T
SEATING
PLANE
D 14 PL
0.25 (0.010)
T B
K
S
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6
DIM
A
B
C
D
F
G
J
K
M
P
R
MILLIMETERS
MIN
MAX
8.55
8.75
3.80
4.00
1.35
1.75
0.35
0.49
0.40
1.25
1.27 BSC
0.19
0.25
0.10
0.25
0_
7_
5.80
6.20
0.25
0.50
INCHES
MIN
MAX
0.337
0.344
0.150
0.157
0.054
0.068
0.014
0.019
0.016
0.049
0.050 BSC
0.008
0.009
0.004
0.009
0_
7_
0.228
0.244
0.010
0.019
SN74LS74A
Notes
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7
SN74LS74A
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. Typical parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be
validated for each customer application by customers technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable
attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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8
SN74LS74A/D