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  • 30 Fault Tolerant Parallel Filters Based On Error Correction Codes

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    Thahsin Thahir
    16 views6 pages
    This document describes a fault tolerant parallel filter project based on error correction codes. The project implements a fault tolerant FIR filter on a Xilinx Artix-7 FPGA and utilizes less than 1% of device resources including 514 look-up tables and 111 registers. Simulation results and synthesis reports are provided to analyze the timing constraints, utilization, and performance of the designed filter. Contact information is given to obtain more details on the block diagram, schematic, or simulation results.

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    Original Title

    30 Fault Tolerant Parallel Filters Based on Error Correction Codes (3)

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    This document describes a fault tolerant parallel filter project based on error correction codes. The project implements a fault tolerant FIR filter on a Xilinx Artix-7 FPGA and utilizes less than 1% of device resources including 514 look-up tables and 111 registers. Simulation results and synthesis reports are provided to analyze the timing constraints, utilization, and performance of the designed filter. Contact information is given to obtain more details on the block diagram, schematic, or simulation results.

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    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
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    Download as docx, pdf, or txt
    16 views6 pages

    30 Fault Tolerant Parallel Filters Based On Error Correction Codes

    Uploaded by

    Thahsin Thahir
    This document describes a fault tolerant parallel filter project based on error correction codes. The project implements a fault tolerant FIR filter on a Xilinx Artix-7 FPGA and utilizes less than 1% of device resources including 514 look-up tables and 111 registers. Simulation results and synthesis reports are provided to analyze the timing constraints, utilization, and performance of the designed filter. Contact information is given to obtain more details on the block diagram, schematic, or simulation results.

    Copyright:

    © All Rights Reserved
    Download as DOCX, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as docx, pdf, or txt
    of 6

    Fault Tolerant Parallel Filters Based

    on Error Correction Codes


    Screenshot Results
    Block diagram:

    Further Details Contact: A Vinay, Ph- 9030333433, 08772261612


    Email: takeoffstudentprojects@gmail.com | www.takeoffprojects.com

    RTL Schematic:

    Further Details Contact: A Vinay, Ph- 9030333433, 08772261612


    Email: takeoffstudentprojects@gmail.com | www.takeoffprojects.com

    View schematic:

    Further Details Contact: A Vinay, Ph- 9030333433, 08772261612


    Email: takeoffstudentprojects@gmail.com | www.takeoffprojects.com

    Design summary:

    fault_tolerent_top Project Status (06/19/2015 - 04:07:01)

    Project File:

    Fault_tolerent_fir.xise

    Parser Errors:

    No Errors

    Module Name:

    fault_tolerent_top

    Implementation State:

    Synthesized

    Target Device:

    xc7a200t-3sbg484

    Errors:

    No Errors

    Product
    Version:

    ISE 14.3

    Warnings:

    17 Warnings (17
    new)

    Design Goal:

    Balanced

    Routing Results:

    Design
    Strategy:

    Xilinx Default
    (unlocked)

    Environment:

    System Settings

    Timing
    Constraints:

    Final Timing
    Score:

    Device Utilization Summary (estimated values)

    Logic Utilization

    Used

    Available

    [-]

    Utilization

    Further Details Contact: A Vinay, Ph- 9030333433, 08772261612


    Email: takeoffstudentprojects@gmail.com | www.takeoffprojects.com

    Number of Slice Registers

    111

    269200

    0%

    Number of Slice LUTs

    514

    134600

    0%

    Number of fully used LUT-FF pairs

    60

    565

    10%

    Number of bonded IOBs

    69

    285

    24%

    Number of BUFG/BUFGCTRLs

    32

    3%

    Number of DSP48E1s

    740

    1%

    Simulation results:

    Further Details Contact: A Vinay, Ph- 9030333433, 08772261612


    Email: takeoffstudentprojects@gmail.com | www.takeoffprojects.com

    Further Details Contact: A Vinay, Ph- 9030333433, 08772261612


    Email: takeoffstudentprojects@gmail.com | www.takeoffprojects.com

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