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DEE6113 - Practical Work5 PDF
DEE6113 - Practical Work5 PDF
Practical Work 5
No
Name
Practical
Work Report
(Cognitive)
Practical Skill
Marks
(Psychomotor)
Total
Marks
1.
/ 30
/ 70
/ 100
2.
/ 30
/ 70
/ 100
CLASS
LECTURER NAME
DATE SUBMITTED
(Note: Submit this page along with the practical skill rubric after each Practical Work is completed)
/4
2.
Result
/ 14
3.
Discussion
/8
4.
Conclusion
/4
TOTAL :
/ 30
PRACTICAL WORK 5
5.1 TITLE :
5.3 EQUIPMENT/TOOLS
PC Set & Microwind 2.6a software
5.4 THEORY
1. The output of XOR gate is high when either of inputs A or B is high, but the output is
low if both A and B are low/high.
5.5 PROCEDURE
Part A : Designing the layout of 2-input XOR gate
1. Based on the Boolean equation of XOR gate, draw the CMOS static logic diagram of XOR
gate.
Page | 1
Page | 2
4. Produce a truth table of 2-input XOR gate based on the timing diagram produced in step 3.
5. Measure the optimized area of the layout (the unit is lambda2).
5.6 RESULTS
In your report, include the results for the following:
1. the CMOS static logic diagram of 2-input XOR gate (show all the steps how to get the logic
diagram).
(2 marks)
2.
the stick diagram of 2-input XOR gate using Eulers path (show all the steps how to get the
stick diagram).
(2 marks)
3.
(2 marks)
4.
(2 marks)
5.
a truth table of 2-input XOR gate based on the timing diagram produced.
(2 marks)
(2 marks)
(2 marks)
Page | 4
5.7 DISCUSSION
1.
2.
Draw an equivalent circuit for 2-input XOR using only three basic gates ( NAND, OR and
NOT gate).
(4 marks)
3.
5.8 CONCLUSON
Write TWO (2) conclusions for the practical work that you have done.
(4 marks)
Page | 5
Class :
Date :
Student ID# :
ASPECTS
A.
Technology feature
B.
Design rule
C.
Transistor size
D.
Metal layers
E.
F.
No DRC error
display
Layout Design
input / output /
floorplan
EXCELLENT
4-5
Use correct technology feature
for ALL parts of the layout.
Follow lambda design rule for
minimum width and spacing for
ALL polygons.
Use correct PMOS and NMOS
transistor size.
Use correct number of metal
layers and width.
Able to produce No DRC error
display for ALL layouts.
SCORE DESCRIPTION
MODERATE
2-3
Use correct technology feature
for parts of the layout.
POOR
1
SCALE
x1
x1
Layout simulation
H.
TOTAL
SCORE
x2
x2
x2
x2
x2
x2
/ 70
..
Supervisor Name & Signature