EEE 41 Emitter follower

DC 8 output impedance
+12V • Q: Find the small-signal
BJT small-signal
output impedance.
Common emitter amplifiers 1K
Ebers-Moll and Hybrid π models
VO
Vi = 2V

Luis G. Sison 500

Department of Electrical and Electronics Engineering
University of the Philippines - Diliman
EEE 41 DC 8 1 EEE 41 DC 8 2
EEE Department, UP Diliman EEE Department, UP Diliman

Small signal models Complete Hybrid-pi model

1
Ebers-Moll Hybrid π gm =
re • More in Lec 16
αiE
Ccb
rπ = βre vBE g m vBE
iE re Cbe rπ vBE g m vBE ro Cce

kT 26mV
re = ≈ at room temp
qI C IC
Note: all quantities • Ignores the bulk resistances
are small-signal EEE 41 DC 8 3 EEE 41 DC 8 4
EEE Department, UP Diliman EEE Department, UP Diliman
 CE amp revisited Designing a CE amplifier
• Q: Use the simple fwd- VCC • Q: If we want the small-
+12V active model to solve for signal Zin to be 100K, and
RB = 190 K the operating point vo,DC the small-signal gain AV to
RC
RC = 1K
when the input is left be -5, compute RE and
open. +1 vO RC?
vO • Q: Use the Ebers-Moll vi
• Q: What should VEE be so
vi and hybrid π small- that the amplifier can
−1
signal models to find the RE accept the input shown
small signal voltage gain without entering cut-off?
∆vo/∆vi
EEE 41 DC 8
VEE EEE 41 DC 8
5 6
EEE Department, UP Diliman EEE Department, UP Diliman

Designing a CE amplifier… Designing CE amps…

VCC • Use values already computed
in previous slide • Hard to design single stage amp with many
• Q: For the input shown, what constraints, e.g.
RC
should the output voltages be – Input impedance
so that the transistor stays out – Output impedance
+1 vO of saturation?
vi – Gain
Assume VCE,SAT = 1V.
– Supply voltages
−1 • Q: Compute VCC that will yield
RE the desired output voltage • Easier to design high gain multistage amp
swing. and then use feedback to control the gain.
– Op-amps!
VEE EEE 41 DC 8 EEE 41 DC 8
7 8
EEE Department, UP Diliman EEE Department, UP Diliman