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ƥ Timing problems require a mechanism to
synchronize the transmitter and receiver
ƥ Two solutions
ƜAsynchronous
ƜSynchronous
j   
ƥ Data transmitted on character at a time
Ɯ5 to 8 bits
ƥ Timing only needs maintaining within each
character
ƥ Resynchronize with each character
j     
j      
ƥ In a steady stream, interval between characters
is uniform (length of stop element)
ƥ In idle state, receiver looks for transition 1 to 0
ƥ Then samples next seven intervals (char length)
ƥ Then looks for next 1 to 0 for next char

ƥ Simple
ƥ Cheap
ƥ Overhead of 2 or 3 bits per char (~20%)
ƥ Good for data with large gaps (keyboard)
     

ƥ Block of data transmitted without start or stop
bits
ƥ Clocks must be synchronized
ƥ Can use separate clock line
ƜGood over short distances
ƜSubject to impairments
ƥ Embed clock signal in data
ƜManchester encoding
ƜCarrier frequency (analog)
    
 

ƥ Need to indicate start and end of block
ƥ Use preamble and postamble
Ɯe.g. series of SYN (hex 16) characters
Ɯe.g. block of 11111111 patterns ending in 11111110

ƥ More efficient (lower overhead) than async

    
  ! 
ƥ An error occurs when a bit is altered between
transmission and reception
ƥ Single bit errors
Ɯ One bit altered
Ɯ Adjacent bits not affected
Ɯ White noise
ƥ Burst errors
Ɯ Length B
Ɯ Contiguous sequence of B bits in which first and last and any
number of intermediate bits in error
Ɯ Impulse noise
Ɯ Fading in wireless
Ɯ Effect greater at higher data rates
 
 " 
 
 
ƥ Additional bits added by transmitter for error
detection code
ƥ Parity
ƜValue of parity bit is such that character has even
(even parity) or odd (odd parity) number of ones
ƜEven number of bit errors goes undetected

#
ƥ For a block of k bits transmitter generates n bit
sequence
ƥ This n bit sequence is also called Ơframe check
sequence (FCS)ơ
ƥ Transmit k+n bits which is exactly divisible by
some number
ƥ Receive divides frame by that number
ƜIf no remainder, assume no error
ƜFor math, see Stallings p.180
   
ƥ Correction of detected errors usually requires
data block to be retransmitted (see chapter 7)
ƥ Not appropriate for wireless applications
ƜBit error rate is high
ƥ Lots of retransmissions
ƜPropagation delay can be long (satellite) compared
with frame transmission time
ƥ Would result in retransmission of frame in error plus many
subsequent frames
ƥ Need to correct errors on basis of bits received
   "  


   " 
ƥ Each k bit block mapped to an n bit block (n>k)
Ɯ Codeword
Ɯ Forward error correction (FEC) encoder
ƥ Codeword sent
ƥ Received bit string similar to transmitted but may
contain errors
ƥ Received code word passed to FEC decoder
Ɯ If no errors, original data block output
Ɯ Some error patterns can be detected and corrected
Ɯ Some error patterns can be detected but not corrected
Ɯ Some (rare) error patterns are not detected
ƥ Results in incorrect data output from FEC
|   !   
ƥ Add redundancy to transmitted message
ƥ Can deduce original in face of certain level of
error rate
ƥ E.g. block error correction code
ƜIn general, add (n ƛ k ) bits to end of block
ƥ Gives n bit block (codeword)
ƥ All of original k bits included in codeword
ƜSome FEC map k bit input onto n bit codeword such
that original k bits do not appear
ƥ Example, p.188
  !  
ƥ Topology
Ɯ Physical arrangement of stations on medium
Ɯ Point to point
Ɯ Multi point
ƥ Computer and terminals, local area network
ƥ Half duplex
Ɯ Only one station may transmit at a time
Ɯ Requires one data path
ƥ Full duplex
Ɯ Simultaneous transmission and reception between two stations
Ɯ Requires two data paths (or echo canceling)
  
 !  
K! 
ƥ Data processing devices (or data terminal
equipment, DTE) do not (usually) include data
transmission facilities
ƥ Need an interface called data circuit terminating
equipment (DCE)
Ɯe.g. modem, NIC
ƥ DCE transmits bits on medium
ƥ DCE communicates data and control info with
DTE
ƜDone over interchange circuits
ƜClear interface standards required

    
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    !K!
ƥ Mechanical
ƜConnection plugs
ƥ Electrical
ƜVoltage, timing, encoding
ƥ Functional
ƜData, control, timing, grounding
ƥ Procedural
ƜSequence of events
„
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ƥ ITU-T v.24
ƥ Only specifies functional and procedural
ƜReferences other standards for electrical and
mechanical
ƥ EIA-232-F (USA)
ƜRS-232
ƜMechanical ISO 2110
ƜElectrical v.28
ƜFunctional v.24
ƜProcedural v.24
: 
 !  

 
 !  
ƥ Digital signals
ƥ Values interpreted as data or control, depending
on circuit
ƥ More than -3v is binary 1, more than +3v is
binary 0 (NRZ-L)
ƥ Signal rate < 20kbps
ƥ Distance <15m
ƥ For control, more than-3v is off, +3v is on
$ 
 !  
ƥ Circuits grouped in categories
ƜData
ƜControl
ƜTiming
ƜGround
ƥ One circuit in each direction
ƜFull duplex
ƥ Two secondary data circuits
ƜAllow halt or flow control in half duplex operation
ƥ (See table in Stallings chapter 6)
 
#  %
" 
 !  
ƥ E.g. Asynchronous private line modem
ƥ When turned on and ready, modem (DCE) asserts DCE
ready
ƥ When DTE ready to send data, it asserts Request to
Send
Ɯ Also inhibits receive mode in half duplex
ƥ Modem responds when ready by asserting Clear to send
ƥ DTE sends data
ƥ When data arrives, local modem asserts Receive Line
Signal Detector and delivers data


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&' 
Ë

: 
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ƥ Connection between terminal equipment (c.f.
DTE) and network terminating equipment (c.f.
DCE)
ƥ ISO 8877
ƥ Cables terminate in matching connectors with 8
contacts
ƥ Transmit/receive carry both data and control
K
Ë
 
 !  
ƥ Balanced transmission
Ɯ Carried on two lines, e.g. twisted pair
Ɯ Signals as currents down one conductor and up the other
Ɯ Differential signaling
Ɯ Value depends on direction of voltage
Ɯ Tolerates more noise and generates less
Ɯ (Unbalanced, e.g. RS-232 uses single signal line and ground)
Ɯ Data encoding depends on data rate
Ɯ Basic rate 192kbps uses pseudoternary
Ɯ Primary rate uses alternative mark inversion (AMI) and B8ZS or
HDB3
$  # 
ƥ Stallings chapter 6
ƥ Web pages from ITU-T on v. specification
ƥ Web pages on ISDN