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Electronics and Communication Engineering (Lecture Plan) : Subject-Digital System Design
Electronics and Communication Engineering (Lecture Plan) : Subject-Digital System Design
Engineering
(Lecture Plan)
Subject-Digital System Design
Hardware 2
description
languages,
introduction to
VHDL
data objects, 3
classes data
types
Operators, 4
Overloading
logical 5
operators,
Types of delays
Entity 6
declaration with
example
Architecture 7
declaration with
example
Introduction to 8
behavioral
Introduction to 9
dataflow
modeling
Introduction to 10
structural
models
2 nd
VHDL Assignment 11
Statements statements,
sequential
statements
Process 12
Statements
conditional 13
statements,
case statement,
concurrent 14
statements
Array and loops,
resolution 15
functions
Packages and 16
Libraries
Subprograms: 17
Application of
Functions
Application of 18
Procedures
Intro to Structural 19
Modeling
component 20
declaration with
example
structural layout 21
and generics
3rd Combinational VHDL Models 22
Circuit Design and Simulation
of
combinational
circuits such as
Multiplexers,
Demultiplexers, 23
encoders
decoders, code 24
converters
comparators, 25
implementation
of Boolean
functions etc
4th Sequential VHDL Models 26
Circuit Design and Simulation
of Sequential
Circuits filp-
flops
VHDL Models 27
and Simulation
of Sequential
Circuits Shift
Registers
VHDL Models 28
and Simulation
of Sequential
Circuits
counters etc
5th Design of Basic 29
Microcomputer components of
a computer
Specifications of 30
a computer
architecture of a 31
simple
microcomputer
system
implementation 32
of a simple
microcomputer
system using
VHDL
6th Design with Programmable 33
CPLDs & logic devices :
FPGAs ROM
PLAs, PALs 34
GAL, PEEL 35