By

y.Srinivas rao M.Sc(TECH)Embedded systems & digital signal

processing
In the worldwide everything is in physical quantity
Temperature
Pressure
Velocity
Humidity
No.of bits no.of steps step size(mv)
8-bits 256 19.53
10-bits 1024 4.88
12-bits 4096 1.2
16-bits 65,536 0.076
PARALLEL ADC
- number of output lines

SERIAL ADC
- single output line
10-bit successive approximation analog to digital
converter
Input multiplexing among 6 or 8 pins(ADC0 and
ADC1)
Power-down mode
Measurement range 0v to Vref
10-bit conversion time 2.44micro seconds
Burst conversion mode for single or multiple inputs
ADC0
-AD0.7:6 & AD0.4:1
ADC1
-AD1.7:0
Vref -PIN no. 63
VDDA -PIN no. 7
VSSA -PIN no. 52
ADCR
-7:0bits select(which pin used for convert)
-15:8bits CLKDIV (PCLK is divided by to produce
the clock for A/D converter)
-16bit burst (when this bit=1 conversion will not
completed)
-19:17bits CLKS (selects the no. of clocks used for
each conversion in burst mode)
-20bit reserved
-21bit PDN (powerdown mode)
-23:22bit reserved
-26:24bits START(when the burst is zero)
-27bit EDGE (raising or falling)
-31:28bits reserved
ADGDR
-5:0bits reserved
-15:6bits RESULT
-23:16bits reserved
-26:24bits channel
-29:27 reserved
-30bit OVERRUN
-31bit DONE
ADGSR
-15:0bits reserved
-16bit BURST
-23:17bits reserved
-26:24bits START
-27bits EDGE
-31:28bits reserved
ADSTAT
-7:0bits DONE7 : DONE0
-15:8bits OVERRUN7 : OVERRUN0
-16bit ADINT(A/D interrupt flag)
-31:17bits reserved
ADINTEN
-8:0bits (0-end of a conversion on ADC
Channel 0 will not generate an interrupt)

Remaining bits reserved

ADDR –(ADDR0 to ADDR7)
-5:0bits reserved
-15:6bits RESULT
-29:16bits reserved
-30bit OVERRUN
-31bit DONE