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    Resume Akansha

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    Kanhaiya Mishra
    Abhishek Kumar Singh is seeking a challenging position where he can enhance his skills. He has experience imparting training on VHDL, Verilog, and System Verilog. He completed a 6-month internship in VLSI design at DUCAT NOIDA, where he learned digital design and verification using Verilog, VHDL, and System Verilog. His projects include an 8-bit RISC processor and a traffic light controller designed and verified using Verilog. He has an aggregate of 70% from his engineering studies and scores of 59.6% and 59.8% in class 12 and 10, respectively. He is proficient with EDA tools like Modelsim and Xilinx I

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    Resume Akansha

    Uploaded by

    Kanhaiya Mishra
    26 views3 pages
    Abhishek Kumar Singh is seeking a challenging position where he can enhance his skills. He has experience imparting training on VHDL, Verilog, and System Verilog. He completed a 6-month internship in VLSI design at DUCAT NOIDA, where he learned digital design and verification using Verilog, VHDL, and System Verilog. His projects include an 8-bit RISC processor and a traffic light controller designed and verified using Verilog. He has an aggregate of 70% from his engineering studies and scores of 59.6% and 59.8% in class 12 and 10, respectively. He is proficient with EDA tools like Modelsim and Xilinx I

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    Abhishek Kumar Singh is seeking a challenging position where he can enhance his skills. He has experience imparting training on VHDL, Verilog, and System Verilog. He completed a 6-month internship in VLSI design at DUCAT NOIDA, where he learned digital design and verification using Verilog, VHDL, and System Verilog. His projects include an 8-bit RISC processor and a traffic light controller designed and verified using Verilog. He has an aggregate of 70% from his engineering studies and scores of 59.6% and 59.8% in class 12 and 10, respectively. He is proficient with EDA tools like Modelsim and Xilinx I

    Copyright:

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    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as doc, pdf, or txt
    26 views3 pages

    Resume Akansha

    Uploaded by

    Kanhaiya Mishra
    Abhishek Kumar Singh is seeking a challenging position where he can enhance his skills. He has experience imparting training on VHDL, Verilog, and System Verilog. He completed a 6-month internship in VLSI design at DUCAT NOIDA, where he learned digital design and verification using Verilog, VHDL, and System Verilog. His projects include an 8-bit RISC processor and a traffic light controller designed and verified using Verilog. He has an aggregate of 70% from his engineering studies and scores of 59.6% and 59.8% in class 12 and 10, respectively. He is proficient with EDA tools like Modelsim and Xilinx I

    Copyright:

    Attribution Non-Commercial (BY-NC)
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    of 3

    2143528

    19shulka

    2143528
    CURRICULUM VITAE

    Name: ABHISHEK KUMAR SINGH


    Contact: +91-9368050453
    Email Id: abhisheksingh1618@yahoo.com

    Career Objective:

    Seeking a challenging position in an organization where I can enhance my skills and apply my
    knowledge.

    Responsibilities:-

    1) Imparting training on VHDL, Verilog, System Verilog.


    2) Project handling for students.

    Internship:

    6 months training at DUCAT NOIDA, in VLSI Design. Training programme includes:

     Digital Design and Verification.


     Verilog/VHDL.
     System Verilog.
     CMOS Basics.
     FPGA Concepts.

    Projects:

     8 bit R.I.S.C. Processor (Designed, implemented and verified using VERILOG).


     Traffic Light Controller (designed verified using verilog and implemented on fpga).
     Hardware design of digital design clock.
    Qualifications:

    Higher Qualification:

    SIR CHOTTU RAM INSTITUTE OF ENGGINEERING AND TECHNOLOGY MEERUT


    Aggregate: 70% Till 7th Semester

    Basic Qualifications:

    12th Class, Non Medical


    ICSE BOARD
    Aggregate:59.6%

    10th Class
    ICSE BOARD
    Aggregate:59.8%

    EDA Tools:

     Modelsim se 6.2.
     Xilinx ise.

    Computer Skill Sets:

     Verilog/VHDL.
     Programming languages : c,c++.

    Strengths:

     Ability to work under pressure


     Team player
     Decision maker

    Interests/ Hobbies:

     Internet surfing
     Listening music
     Travelling
    Personal Details:

    Father’s Name: Mr. Ashok Kumar Singh.


    Nationality: Indian
    Date of Birth: 16th Sept. 1989
    Marital Status: Single
    Languages Known: English , Hindi
    Permanent Address: Bunglow no. 40 Cantt Varanasi
    Temporary Address: 31 Block 2nd floor patel nagar,new delhi

    Date: Signature

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