B.E. (I.T.

) 4th Sem
Computer Architecture & Organization
PART-A
Q1. a) What do you understand by Stored Program Organization? (7)

b) Differentiate between register reference and input-output reference

instructions and discuss a possible instruction format for these. (7)

c) Differentiate between direct and indirect addressing mode with the help of
an example. (6)

Q2. Briefly discuss the following:

a) Address Sequencing (6)

b) Conditional Branching (4)

c) Mapping of Instruction (4)

d) Microinstruction format (6)

Q3. a) Explain General Register Organization and compare it with Stored Program
Organization. (12)

b) An instruction is stored at location 300 with its address field at location

301. The address field has the value 400. A processor register R1 contains the
number 200. Evaluate the effective address if the addressing mode of the
instruction is i) Direct ii) Immediate iii) Relative

iv) Register Indirect v) Index with R1 as the index

register. (8)

Q4. What do you understand by processor level design? What are processor level
components? Discuss in detail. (20)
 PART-B
Q5. a) What is the purpose of input-output interface? What are control, status,
data output and data input commands? (10)

b) What do you understand by priority interrupt? What is polling procedure?

(6)

c) Differentiate between burst transfer and cycle sealing. (4)

Q6. What is associative memory? Explain its working with the help of its block
diagram and hardware organization. Also explain match logic in detail. (20)

Q7. a) What are interconnection structures? Discuss any one scheme for
establishing an interconnection network along with pros and cons. (10)

b) Differentiate between loosely coupled and tightly coupled

microprocessors. (5)

c) Differentiate between address space and memory space. (5)

Q8. Write short notes on:

a) Memory management hardware (10)

b) Input-Output Processor (10)

Disclaimer: Well this looks a little stupid but we are not responsible if any portion of this paper
is not relevant with today’s syllabus. Due care has been taken to make this paper error free, but
there always remains a chance of error so please ignore any typographical error if present..