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  • PROGRAM 1 Cascode

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    neetubansal
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    The document describes a SPICE simulation of a NMOSFET cascade stage circuit. The aim is to study the DC transfer sweep analysis. The circuit contains two NMOS transistors (M1 and M2) with resistors and voltage sources. A SPICE netlist is written and .DC analysis is run to obtain the voltages at nodes in, out and Vx as the input voltage vin is swept from 0-5V in steps of 0.1V.

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    Tanner design analysis of cascode circuit.

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    The document describes a SPICE simulation of a NMOSFET cascade stage circuit. The aim is to study the DC transfer sweep analysis. The circuit contains two NMOS transistors (M1 and M2) with resistors and voltage sources. A SPICE netlist is written and .DC analysis is run to obtain the voltages at nodes in, out and Vx as the input voltage vin is swept from 0-5V in steps of 0.1V.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
    Flag for inappropriate content
    Download as doc, pdf, or txt
    17 views2 pages

    PROGRAM 1 Cascode

    Uploaded by

    neetubansal
    The document describes a SPICE simulation of a NMOSFET cascade stage circuit. The aim is to study the DC transfer sweep analysis. The circuit contains two NMOS transistors (M1 and M2) with resistors and voltage sources. A SPICE netlist is written and .DC analysis is run to obtain the voltages at nodes in, out and Vx as the input voltage vin is swept from 0-5V in steps of 0.1V.

    Copyright:

    Attribution Non-Commercial (BY-NC)
    Download as DOC, PDF, TXT or read online from Scribd
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    of 2

    PROGRAM - 1

    AIM: To study the dc transfer sweep analysis of the NMOSFET in Cascade Stage.

    * SPICE netlist written by S-Edit Win32 7.00

    * Written on Apr 18, 2011 at 23:24:13

    * Waveform probing commands

    .probe

    .options probefilename="cascade.dat"

    + probesdbfile="D:\microelectronics\HWamsdlab\cascade.sdb"

    + probetopmodule="Module0"

    * Main circuit: Module0

    M1 Vx in Gnd Gnd NMOS L=2u W=22u AD=66p PD=24u AS=66p PS=24u

    M2 out N3 Vx Gnd NMOS L=2u W=22u AD=66p PD=24u AS=66p PS=24u

    R3 N1 out 1k TC=0.0, 0.0

    v4 N3 Gnd 1.2

    v5 N1 Gnd 3.3
    .include "C:\Tanner\TSpice70\models\ml2_125.md"

    vin in GND PULSE (0 5)

    .print dc v(in) v(out) v(Vx)

    .dc lin source vin 0 5V 0.1

    * End of main circuit: Module0

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