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Synthesis P
Course: SoC Design & Verification using System Verilog Topics: SoC Design Methodology SoC Design Flow SoC Architecture System Level Verific ation & Synthesis Design for Reuse & Integration System Verilog Design Hierarchy IP Integration Data Types Assertions Interfaces Verification Constructs Testbench Structures
Course: Design of CMOS Digital Integrated Circuits Topics: Circuit Analysis using both Analytical & CAD tools Testbench Design Combina tional & Sequential Logic AOI Logic Verification using NC Verilog Design Flow to Design CMOS Ci rcuits Course: High Speed Communication Network Topics: Packet Delay Modeling Network of Queues QoS in Broadband Networks & Bandwid th Allocations Architecture of High Speed Switches & Routers Multicast Protocols VPN s Overlay Networks Multi-Protocol Label Switching Broadband Network Architectures Course: Microprocessor Based System Design Topics: Microprocessor Architecture Memory & I/O system interfacing with Microproc essor Interrupt interface of Microprocessor Flash Memory Design Programmable interface controlle rs & Programmable timers Assembly Language Programming (MASM) Machine Language Coding I/O int erfaces Circuits