DVLSI Stage II Sample Questions

1) Implement the following function using a 4x1 multiplexer and gates. F(A,B,C,D) = (0, 2, 6, 11, 13, 14) 2) Design a 2-bit binary counter with asynchronous reset using D F/Fs. The counter should have a count_enable input. The counter increments on the rising edge of the clock, if count_enable is high. The counter has to be purely synchronous. You should not use gates in the clock path. 3) Design a circuit that takes a serial data stream from data in input. The output of the circuit is high if data in on previous four clocks has even number of ones. E.g. the output on nth clock is high if the data in on clocks (n-1), (n-2), (n-3) and (n-4) has even number of ones. 4) Design a sequence detector whose output is asserted when it detects either 0010 or 1010 on its serial input. Draw the state diagram and write the state table. 5) An 8-bit microprocessor has the following signals: D0-D7, A0-A15, /RD , /WR, IO_notM (high indicates IO operation and low indicates memory operation). You have to interface a 2kx8 memory to the microprocessor at address 2000h. There may be other devices at other addresses. Draw the circuit diagram. 6) Implement the following function using a 2x1 multiplexer and minimum additional logic. F(x,y) = x and y 7) Convert a D flip-flop to a J/K flip-flop using an additional 4x1 multiplexer. 8) Convert a T filp-flop to J/K flip-flop using some additional required gates if any. 9) Convert a J/K flip-flop to T flip-flop using some additional required gates if any. 10) Convert a J/K flip-flop to D flip-flop using some additional required gates if any. 11) Vcc

x(0) x(1) x(2) x(3)

Y(0) Y(1) Y(2) Y(3) Y(4) Y(5)

Gnd X is a 4 bit vector. Y is a 6 bit vector. Design the internals of the above box. Y = (4X + 1). "+" indicates addition Hint: This is not a sequential circuit.

12) The following figure shows a 2-bit binary counter, which has an asynchronous reset, a synchronous reset and a synchronous count enable input. Y0 and Y1 are the outputs of the counter. Derive the state machine from the circuit shown.