Professional Documents
Culture Documents
Ms Ti Crane SCH Revb
Ms Ti Crane SCH Revb
Ms Ti Crane SCH Revb
CraneBoard SCHEMATIC
D
VERSION HISTORY
VER #
DESCRIPTION
1.00
AUTHOR
RELEASED
DATE
06-DEC-2010
B
1.00
NATURE OF CHANGE
REV NO.
APPROVED BY
DATE
Title
COVER PAGE
Drawn by:
Date:
Approved by:
Date
SIVARAM
Thursday, December 09, 2010
D:\MS_TI_CRANE_SCH_REVB.DSN
Size
B
Date:
Document Number
MS_TI_CRANE_SCH_REVB
Wednesday, December 08, 2010
Rev
B
Sheet
1
of
14
TABLE OF CONTENTS
D
PAGE NO
CONTENTS
01
COVER PAGE
02
TABLE OF CONTENTS
03
BLOCK DIAGRAM
04
DDR2 INTERFACE
05
NAND INTERFACE
06
POWER MANAGEMENT
07
ETHERNET INTERFACE
08
09
10
EXPANSION CONNECTOR
11
USB HOST
12
13
14
NATURE OF CHANGE
REV NO.
APPROVED BY
DATE
Title
TABLE OF CONTENTS
Drawn by:
Date:
Approved by:
Date
SIVARAM
Thursday, December 09, 2010
D:\MS_TI_CRANE_SCH_REVB.DSN
Size
B
Date:
Document Number
MS_TI_CRANE_SCH_REVB
Wednesday, December 08, 2010
Rev
B
Sheet
1
of
14
NATURE OF CHANGE
REV NO.
APPROVED BY
DATE
Title
BLOCK DIAGRAM
Drawn by:
Date:
Approved by:
Date
SIVARAM
Thursday, December 09, 2010
D:\MS_TI_CRANE_SCH_REVB.DSN
Size
B
Date:
Document Number
MS_TI_CRANE_SCH_REVB
Wednesday, December 08, 2010
Rev
B
Sheet
1
of
14
VDDS_1V8
VDDS_1V8
CS#
RAS#
CAS#
WE#
MT47H64M16HR-25
C14
E14
B14
A13
B13
A2
E2
DDR2_RAS#
DDR2_CAS#
DDR2_WE#
R40
10E_1% DDR2_CK
R39
10E_1% DDR2_CK#
NC1
NC2
VREF
L8
K7
L7
K3
DDR2_CS#
DDR2_RAS#
DDR2_CAS#
DDR2_WE#
J2
DDR2_VREF
DDR2_DQS0P
DDR2_DQS0N
F7
E8
DDR2_DM1
DDR2_DM0
B3
F3
DDR2_A14
R3
R7
G9
G7
G3
G1
E9
C9
C7
C3
C1
A9
R1
M9
J9
E1
A1
VDD5
VDD4
VDD3
VDD2
VDD1
DDR2_CKE
DDR2_CK
DDR2_CK#
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
DDR2_ODT
K2
J8
K8
B7
A8
J1
G9
G7
G3
G1
E9
C9
C7
C3
C1
A9
J1
RFU1
RFU2
K9
DDR2_DQS1P
DDR2_DQS1N
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
BA0
BA1
BA2
UDQS
UDQS#/NU
ODT
LDQS
LDQS#/NU
CKE
CK
CK#
UDM
LDM
CS#
RAS#
CAS#
WE#
RFU1
RFU2
MT47H64M16HR-25
A2
E2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
NC1
NC2
VREF
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
DDR2_A0
DDR2_A1
DDR2_A2
DDR2_A3
DDR2_A4
DDR2_A5
DDR2_A6
DDR2_A7
DDR2_A8
DDR2_A9
DDR2_A10
DDR2_A11
DDR2_A12
DDR2_A13
L2
L3
L1
DDR2_BA0
DDR2_BA1
DDR2_BA2
K9
DDR2_ODT
K2
J8
K8
DDR2_CKE
DDR2_CK
DDR2_CK#
L8
K7
L7
K3
DDR2_CS#
DDR2_RAS#
DDR2_CAS#
DDR2_WE#
J2
DDR2_VREF
VSS5
VSS4
VSS3
VSS2
VSS1
R3
R7
UDM
LDM
DDR2_BA0
DDR2_BA1
DDR2_BA2
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
P9
N1
J3
E3
A3
DDR2_A14
CKE
CK
CK#
L2
L3
L1
DDR2_D0
DDR2_D1
DDR2_D2
DDR2_D3
DDR2_D4
DDR2_D5
DDR2_D6
DDR2_D7
DDR2_D8
DDR2_D9
DDR2_D10
DDR2_D11
DDR2_D12
DDR2_D13
DDR2_D14
DDR2_D15
VSSQ10
VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1
B3
F3
ODT
LDQS
LDQS#/NU
DDR2_A0
DDR2_A1
DDR2_A2
DDR2_A3
DDR2_A4
DDR2_A5
DDR2_A6
DDR2_A7
DDR2_A8
DDR2_A9
DDR2_A10
DDR2_A11
DDR2_A12
DDR2_A13
H8
H2
F8
F2
E7
D8
D2
B8
B2
A7
DDR2_DM3
DDR2_DM2
BA0
BA1
BA2
UDQS
UDQS#/NU
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
VDDL
F7
E8
VDD5
VDD4
VDD3
VDD2
VDD1
DDR2_DQS2P
DDR2_DQS2N
VDDQ10
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
B7
A8
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
VSSDL
DDR2_BA2
DDR2_BA1
DDR2_BA0
DDR2_DQS3P
DDR2_DQS3N
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
J7
SDRC_nRAS
SDRC_nCAS
SDRC_nWE
SDRC_CLK
SDRC_nCLK
D13
C13
A12
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
VSS5
VSS4
VSS3
VSS2
VSS1
SDRC_BA2
SDRC_BA1
SDRC_BA0
DDR2_D16
DDR2_D17
DDR2_D18
DDR2_D19
DDR2_D20
DDR2_D21
DDR2_D22
DDR2_D23
DDR2_D24
DDR2_D25
DDR2_D26
DDR2_D27
DDR2_D28
DDR2_D29
DDR2_D30
DDR2_D31
U2
P9
N1
J3
E3
A3
SDRC_CKE0
SDRC_nCS1
SDRC_nCS0
SDRC_DM3
SDRC_DM2
SDRC_DM1
SDRC_DM0
SDRC_DQS3P
SDRC_DQS2P
SDRC_DQS1P
SDRC_DQS0P
SDRC_DQS3N
SDRC_DQS2N
SDRC_DQS1N
SDRC_DQS0N
SDRC_ODT0
SDRC_STREN0
SDRC_STREN_DLY0
SDRC_STREN1
SDRC_STREN_DLY1
DDR_PADREF
VREFSSTL
U1
J7
VDDS_1V8
D14
A14
E13
D1
E8
B15
C21
A2
A6
B17
B20
B2
B6
A17
A20
C8
A19
A18
A5
A4
B12
F14
DDR2_D31
DDR2_D30
DDR2_D29
DDR2_D28
DDR2_D27
DDR2_D26
DDR2_D25
DDR2_D24
DDR2_D23
DDR2_D22
DDR2_D21
DDR2_D20
DDR2_D19
DDR2_D18
DDR2_D17
DDR2_D16
DDR2_D15
DDR2_D14
DDR2_D13
DDR2_D12
DDR2_D11
DDR2_D10
DDR2_D9
DDR2_D8
DDR2_D7
DDR2_D6
DDR2_D5
DDR2_D4
DDR2_D3
DDR2_D2
DDR2_D1
DDR2_D0
VSSQ10
VSSQ9
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1
DDR2_DM3
DDR2_DM2
DDR2_DM1
DDR2_DM0
DDR2_DQS3P
DDR2_DQS2P
DDR2_DQS1P
DDR2_DQS0P
DDR2_DQS3N
DDR2_DQS2N
DDR2_DQS1N
DDR2_DQS0N
DDR2_CS#
R43
10E_1%
R146
10E_1%
R36
10E_1%
R150
10E_1%
R33
10E_1%
R35
10E_1%
R37
10E_1%
R31
10E_1%
R32
10E_1%
R34
10E_1%
R29
10E_1%
R30
10E_1%
DDR2_ODT
SDRC_STREN0
SDRC_STREN_DLY0
SDRC_STREN1
SDRC_STREN_DLY1
DDR_PADREF
C1
B1
D2
C2
C3
B3
A3
B4
C5
B5
D6
C6
E7
D7
B7
A7
A15
A16
B16
C16
D16
C17
D17
B18
B19
C19
D19
E19
C20
D20
A21
B21
H8
H2
F8
F2
E7
D8
D2
B8
B2
A7
DDR2_CKE
SDRC_D31
SDRC_D30
SDRC_D29
SDRC_D28
SDRC_D27
SDRC_D26
SDRC_D25
SDRC_D24
SDRC_D23
SDRC_D22
SDRC_D21
SDRC_D20
SDRC_D19
SDRC_D18
SDRC_D17
SDRC_D16
SDRC_D15
SDRC_D14
SDRC_D13
SDRC_D12
SDRC_D11
SDRC_D10
SDRC_D9
SDRC_D8
SDRC_D7
SDRC_D6
SDRC_D5
SDRC_D4
SDRC_D3
SDRC_D2
SDRC_D1
SDRC_D0
VDDL
SDRC_A14
SDRC_A13
SDRC_A12
SDRC_A11
SDRC_A10
SDRC_A9
SDRC_A8
SDRC_A7
SDRC_A6
SDRC_A5
SDRC_A4
SDRC_A3
SDRC_A2
SDRC_A1
SDRC_A0
VSSDL
D8
B8
A8
B9
A9
E10
D10
C10
B10
A10
E11
D11
C11
B11
A11
DDR2_A14
DDR2_A13
DDR2_A12
DDR2_A11
DDR2_A10
DDR2_A9
DDR2_A8
DDR2_A7
DDR2_A6
DDR2_A5
DDR2_A4
DDR2_A3
DDR2_A2
DDR2_A1
DDR2_A0
R1
M9
J9
E1
A1
U8A
R134
C70
0.1uF
XAM3517AZCN
1K_1%
DDR2_VREF
R135
B
1K_1%
C71
0.1uF
VDDS_1V8
R138
R38
10E_1%
Length = avg DQS0-1 length+CLK
R20
10E_1%
Length = avg DQS2-3 length+CLK
49.9E_1%
SDRC_STREN0
SDRC_STREN_DLY0
SDRC_STREN1
SDRC_STREN_DLY1
DDR_PADREF
C69
0.1uF
C62
0.1uF
VDDS_1V8
C79
0.1uF
C66
C76
0.1uF
0.1uF
C78
0.1uF
C83
0.1uF
C82
0.1uF
C85
C77
10UF
0.1uF
C84
0.1uF
C68
0.1uF
C72
0.1uF
C67
0.1uF
C75
0.1uF
C73
0.1uF
C74
0.1uF
C86
C64
10UF
10UF
NATURE OF CHANGE
REV NO.
APPROVED BY
DATE
Title
DDR2 INTERFACE
Drawn by:
Date:
Approved by:
Date
SIVARAM
Thursday, December 09, 2010
D:\MS_TI_CRANE_SCH_REVB.DSN
Size
B
Date:
Document Number
MS_TI_CRANE_SCH_REVB
Wednesday, December 08, 2010
Rev
B
Sheet
1
of
14
VDD_NAND_3V3
FL1
VDDSHV_3V3
U8B
600E
D
14
14
F2
F3
F4
F6
F7
E1
E2
MMC1_CD
MMC1_WP
11
#USB3320_RESET
USB1_OVER_CURRENT
USB0_OVER_CURRENT
11
USB1_HOST_EN
11
11
TP7
10
10
SMD
INPUT_GPIO1
INPUT_GPIO2
ETHERNET_nRST
ETHERNET_nRST
N1
M4
M3
M2
M1
N5
N4
T4
T5
U1
T1
GPMC_D0
GPMC_D1
GPMC_D2
GPMC_D3
GPMC_D4
GPMC_D5
GPMC_D6
GPMC_D7
GPMC_D8/GPIO_44
GPMC_D9/GPIO_45
GPMC_D10/GPIO_46
GPMC_D11/GPIO_47
GPMC_D12/GPIO_48
GPMC_D13/GPIO_49
GPMC_D14/GPIO_50
GPMC_D15/GPIO_51
GPMC_A8/GPIO_41
GPMC_A7/GPIO_40
GPMC_A6/GPIO_39
GPMC_A5/GPIO_38
GPMC_A4/GPIO_37
GPMC_A3/GPIO_36
GPMC_A2/GPIO_35
GPMC_CLK/GPIO_59
GPMC_nCS2/GPT9_PWM_EVT/GPIO_53
GPMC_nCS3/SYS_nDMAREQ0/GPT10_PWM_EVT/GPIO_54
GPMC_nCS4/SYS_nDMAREQ1/GPT9_PWM_EVT/GPIO_55
GPMC_nCS5/SYS_nDMAREQ2/GPT10_PWM_EVT/GPIO_56
GPMC_nCS6/SYS_nDMAREQ3/GPT11_PWM_EVT/GPIO_57
GPMC_nCS7/GPMIC_IO_DIR/GPT8_PWM_EVT/GPIO_58
GPMC_WAIT1/UART4_TX/GPIO_63
GPMC_WAIT2/UART4_RX/GPIO_64
GPMC_WAIT3/SYS_nDMAREQ1/UART3_CTS_RCTX/GPIO_65
GPMC_nBE1/GPIO61
GPMC_nCS0
GPMC_nBEO_CLE/GPIO_60
GPMC_nADV_ALE
GPMC_nWE
GPMC_nOE
GPMC_nWP/GPIO62
G5
G4
G3
G2
G1
H2
H1
J5
J4
J3
J2
J1
K4
K3
K2
K1
GPMC_D0
GPMC_D1
GPMC_D2
GPMC_D3
GPMC_D4
GPMC_D5
GPMC_D6
GPMC_D7
GPMC_D8
GPMC_D9
GPMC_D10
GPMC_D11
GPMC_D12
GPMC_D13
GPMC_D14
GPMC_D15
L2
R4
R1
R3
R2
T2
GPMC_nCS0
GPMC_CLE
GPMC_ALE
GPMC_nWE
GPMC_nOE
GPMC_nWP
T3
GPMC_WAIT0
C153
C2
0.1uF
0.1uF
0.1uF
VDD_NAND_3V3
VDD_NAND_3V3
U9
R80
GPMC_D15
GPMC_D14
GPMC_D13
GPMC_D7
GPMC_D6
GPMC_D5
GPMC_D4
GPMC_D12
10K
GPMC_WAIT0
C3
XAM3517AZCN
GPMC_D11
GPMC_D3
GPMC_D2
GPMC_D1
GPMC_D0
GPMC_D10
GPMC_D9
GPMC_D8
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
GND4
I/O15
I/O14
I/O13
I/O7
I/O6
I/O5
I/O4
I/O12
VCC4
23-NC
VCC3
GND3
22-NC
VCC2
I/O11
I/O3
I/O2
I/O1
I/O0
I/O10
I/O9
I/O8
GND2
ONFI
NC-1
NC-2
NC-3
NC-4
NC-5
NC-6
R/B
RE
CE
NC-7
NC-8
VCC
GND1
NC-9
NC-10
CLE
ALE
WE
WP
NC-11
NC-12
NC-13
NC-14
NC-15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
GPMC_WAIT0
GPMC_nOE
GPMC_nCS0
GPMC_CLE
GPMC_ALE
GPMC_nWE
GPMC_nWP
SMD
SMD
TP10
TP9
MT29F2G16AADWP:D
NATURE OF CHANGE
REV NO.
APPROVED BY
DATE
Title
NAND INTERFACE
Drawn by:
Date:
Approved by:
Date
SIVARAM
Thursday, December 09, 2010
D:\MS_TI_CRANE_SCH_REVB.DSN
Size
B
Date:
Document Number
MS_TI_CRANE_SCH_REVB
Wednesday, December 08, 2010
Rev
B
Sheet
1
of
14
VDDSHV_3V3
VDDCORE_1V2
VDDS_1V8
C103
C100
C131
0.1uF
C134
0.1uF
C136
C140
0.1uF
0.1uF
C132
0.1uF
C106
C119
0.1uF
0.1uF
C129
0.1uF
C104
C128
0.1uF
15
10UF
SMD
TP27
30
SMD
TP28
C135
31
GNDIO
VFB1
GND1
VDDA1P8V_USBPHY
46
VAUX1
VAUX33
UNUSED
24
VPLL
OSC32KIN
VAUX33
OSC32KOUT
48
PWON
PWRHOLD
22
VDAC
VREF
TESTV
VBACKUP
8
9
SCLSR
SDASR
TP_0402PAD TP23
TP_0402PAD TP22
14
TPS_SLEEP
nRESPWRON
CLK32OUT
nRESPWRON
M24
Y2
nRESPWRON_1
K24
33
1
18
25
27
VBAT
PWON
PWRHOLD
VBACKUP
R237
R103
DNI 10K
TP26
SMD
C164
0.1uF
VDDA3P3V_USBPHY
VMMC
45
2
VDIG1 VDIG2
INT1
VDIG1
11
10
SCLSR/EN1
SDASR/EN2
37
40
38
VRRTC
7
5
29
VBAT
BOOT0
BOOT1
TPS65910RSLR
DNI
26
19
R121
R194
0E_1%
17
C101
0.1uF
PAD
C99
0.1uF
REFGND
GPIO/CKSYN
49
C145
C43
2.2uF
0.1uF
C160
2.2uF
C22
C41
2.2uF
2.2uF
C163
2.2uF
C95
0.1uF
C96
C124
0.1uF
0.1uF
C150
0.1uF
VRTC
SLEEP
NRESPWON
CLK32OUT
39
14
VRTC
0E_1%
TP29 SMD
nRESPWRON_1
C114
C89
20pF
21
SDA
SCL
VDDS_SRAM_1V8
1uF
20pF
C170
TP25 TP_0402PAD
TP24 TP_0402PAD
TPS_INT1
C38
Y3
32.768KHz
C40
2.2uF
TPS_INT1
20
VAUX2
VDDA_DAC_1V8
I2C1_SDA
I2C1_SCL
C157
VDDS_SRAM_1V8
2.2uF
34
C21
10UF
SW1
2.2uF
32
VDDA3P3V_USBPHY
C169
35
4.7uF
2.2uH
C161
L3
C49
C165
0E TPS_1V2
4.7uF
R119
C162
ML614S-F9F
VBAT
13
36
41
3
47
23
6
28
4.7uF
VCCIO
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
C158
VDDIO
GND2
0E_1%
4.7uF
VFB2
R186
C35
43
12
10UF
10UF
VDDSHV_3V3
SW2
C39
44
4.7uF
42
10UF
2.2uH
VDDCORE_1V2
2
L1
C31
0E TPS_3V3
C24
R108
10UF
VDDSHV_3V3
B1
V5
V4
M17
M16
M15
M14
M13
M12
M11
M10
M9
M8
L17
L16
L15
L14
L13
L12
L11
L10
K14
K13
K12
J18
J17
J14
J13
J12
J9
J8
H14
H13
H12
H9
A25
A1
N23
G20
G21
0.1uF
C115
0.1uF
VFB3
XAM3517AZCN
SYS_CLKREQ/GPIO_1
SYS_nRESPWRON
SYS_32K
C156
C138
0.1uF
SW3
VFBIO
VBACKUP
L20
H21
H22
U2
V1
10UF
C116
0.1uF
SWIO
16
1.20K_1%
0.1uF
R185
C98
SDASR
14
0.1uF
2.2uH
C146
L2
C28
C105
0E TPS_1V8
0.1uF
R106
0.1uF
1.20K_1%
R101
VDIG2
RESERVED1
RESERVED2
0.1uF
C118
C117
0.1uF
C147
0.1uF
C120
C121
0.1uF
0.1uF
C139
0.1uF
C130
C112
0.1uF
0.1uF
C144
0.1uF
0.1uF
C122
0.1uF
C92
C123
0.1uF
C141
C143
0.1uF
10UF
C102
0.1uF
SCLSR
VDDS_1V8
AA13
E17
AA12
E16
AA15
N20
F23
G22
F22
Y1
0.1uF
C137
0.1uF
C107
C109
C125
0.1uF
0.1uF
C133
0.1uF
C142
C110
0.1uF
0.1uF
C108
0.1uF
0.1uF
C152
10UF
0.1uF
1.20K_1%
C23
SYS_nIRQ/GPIO_0
I2C1_SCL R102
U14
2.2uF
I2C1_SDA
I2C1_SCL
1.20K_1%
0E_1% R120
VDDSOSC
VDDA_DAC
VSSA_DAC
VDDS_1V8
I2C1_SDA R179
R192
VDDS_SRAM_MPU
VDDS_SRAM_CORE_BG0
CAP_VDD_SRAM_MPU
CAP_VDD_SRAM_CORE
VDDS_DPLL_MPU_USBHOST
VDDS_DPLL_PER_CORE
VDDA3P3V_USBPHY
VDDA1P8V_USBPHY
CAP_VDDA1P2LDO_USBPHY
VDDSHV_3V3
VDDS_DPLL_1V8
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
V16
V15
V11
V10
U16
U15
U11
U10
T18
T17
T9
T8
R18
R17
R9
R8
M18
L18
L9
L8
K18
K17
K9
K8
J16
J15
J11
J10
H15
H11
H10
0.1uF
VDD_CORE1
VDD_CORE2
VDD_CORE3
VDD_CORE4
VDD_CORE5
VDD_CORE6
VDD_CORE7
VDD_CORE8
VDD_CORE9
VDD_CORE10
VDD_CORE11
VDD_CORE12
VDD_CORE13
VDD_CORE14
VDD_CORE15
VDD_CORE16
VDD_CORE17
VDD_CORE18
VDD_CORE19
VDD_CORE20
VDD_CORE21
VDD_CORE22
VDD_CORE23
VDD_CORE24
VDD_CORE25
VDD_CORE26
VDD_CORE27
VDD_CORE28
VDD_CORE29
VDD_CORE30
VDD_CORE31
C97
AE25
AE1
V18
V17
V14
V13
V12
V9
V8
U18
U17
U14
U13
U12
U9
U8
T14
T13
T12
R16
R15
R14
R13
R12
R11
R10
P18
P17
P16
P15
P14
P13
P12
P11
P10
P9
P8
N18
N17
N14
N13
N12
N9
N8
VDDS1
VDDS2
VDDS3
VDDS4
VDDS5
VDDS6
VDDS7
VDDS8
VDDS9
VDDS10
VDDS11
VDDS12
VDDS13
VDDS14
VDDS15
VDDS16
VDDS17
VDDS18
0.22uF
Y9
W18
U20
R5
H16
H8
G17
G16
G14
G13
G11
G10
G8
F16
F13
F11
F10
F8
VDDCORE_1V2
1uF C154
U8C
VDDSHV1
VDDSHV2
VDDSHV3
VDDSHV4
VDDSHV5
VDDSHV6
VDDSHV7
VDDSHV8
VDDSHV9
VDDSHV10
VDDSHV11
VDDSHV12
VDDSHV13
VDDSHV14
VDDSHV15
VDDSHV16
VDDSHV17
VDDSHV18
VDDSHV19
VDDSHV20
VDDSHV21
VDDSHV22
VDDSHV23
VDDSHV24
VDDSHV25
VDDSHV26
VDDSHV27
VDDSHV28
VDDSHV29
VDDSHV30
VDDSHV31
VDDSHV32
VDDSHV33
VDDSHV34
VDDSHV35
VDDSHV36
VDDSHV37
VDDS_1V8
Y16
Y15
Y13
Y12
Y10
W16
W15
W13
W12
W10
W9
W6
V7
V6
U19
T20
T19
T7
T6
R7
R6
P20
P19
N19
N7
N6
M7
M6
M5
L19
K19
K7
K6
K5
J7
H18
H17
VDDSHV_3V3
0E_1%
0E_1%
DNI
UNUSED:
VDIG1=2.7V,300mA max
VDIG2=1.8V,300mA max
NATURE OF CHANGE
REV NO.
APPROVED BY
DATE
Title
POWER MANAGEMENT
Drawn by:
Date:
Approved by:
Date
SIVARAM
Thursday, December 09, 2010
D:\MS_TI_CRANE_SCH_REVB.DSN
Size
B
Date:
Document Number
MS_TI_CRANE_SCH_REVB
Wednesday, December 08, 2010
Rev
B
Sheet
1
of
14
VCC_3V3_EMAC
VCC_3V3_EMAC
GPMC_A10/SYS_nDMAREQ3/GPIO_43
GPMC_A9/SYS_nDMAREQ2/GPIO_42
AE8
10E_1% RMII_50MHZ_CLK
8
7
11
10
G6
ETHERNET_nRST_1 15
RMII_MDIO_CLK_1 13
RMII_MDIO_DATA_1 12
XAM3517AZCN
R235
MDC
MDIO
LED2/nINTSEL
LED1/REGOFF
LAN8720Ai-CP-TR
R118
10E
19
nINT/REFCLKO
10K
XTAL1/CLKIN
XTAL2
nRST
F1
TXP
TXN
RXP
RXN
RXD0/MODE0
RXD1/MODE1
CRS_DV/MODE2
RXER/PHYAD0
TR1
VDD1A
RMII_RXD0_1
RMII_RXD1_1
RMII_CRS_DV_1
RMII_RXER_1
TXD0
TXD1
TXEN
VDDIO
17
18
16
VDDCR
RMII_TXD0_1
RMII_TXD1_1
RMII_TXEN_1
R116
R105
R112
R232
R233
R234
RMII_MDIO_CLK
RMII_MDIO_DATA
R92
10UF
VSS
RMII_50MHZ_CLK/GPIO_114
C36
1uF
U12
E3
AD6
AE6
C27
RBIAS
21
20
TXP
TXN
23
22
RXP
RXN
5
4
XTAL1
XTAL2
TD+
16 TX1+ TXP_1
POE(+)_DATA_RAW
15 TXCT
R215
75E_1%
14
RMII_50MHZ_CLK
2
3
SPEED100
ACTIVE_LINK
24
R113 FOR REFCLKOUT
SELECTION
R193
TCT
TD-
3
4
5
6
14 TX1- TXN_1
25
RMII_MDIO_CLK/CCDC_DATA9/GPIO_108
RMII_MDIO_DATA/CCDC_DATA8/GPIO_107
RMII_RXD0
RMII_RXD1
RMII_CRS_DV
RMII_RXER
VDD2A
GPMC_A1/GPIO_34
Y7
AA7
AB7
AC7
10K
10K
RMII_RXD0/CCDC_DATA10/GPIO_109
RMII_RXD1/CCDC_DATA11/GPIO_110
RMII_CRS_DV/CCDC_DATA12//GPIO_111
RMII_RXER/CCDC_DATA13//GPIO_167
RMII_TXD0
RMII_TXD1
RMII_TXEN
10K
10K
10K
AD7
AE7
AD8
R117
600E
VCC_3V3_EMAC
RMII_TXD0/CCDC_DATA14//GPIO_126
RMII_TXD1/CCDC_DATA152//GPIO_112
RMII_TXEN/GPIO_113
49.9E_1%
VCC_1V2_INTERNAL
49.9E_1% R114
VCC_3V3_POE
49.9E_1%
U8D
FL2
49.9E_1% R115
RD+
13
12
11 RX1+ RXP_1
POE(-)_DATA_RAW
10 RXCT
R209
75E_1%
RCT
RD-
10K
12.1K_1%
9
RXN_1
RX-
VCC_3V3_EMAC
H2019NL
24
C47
C48
20pF
20pF
20pF
VCC_3V3_EMAC
VDDSHV_3V3
POE(+)_RAW
RXN_1
R236
U28
5
4
1
NC
POE(-)_RAW
1
2
3
4
5
6
7
8
9
10K
2
SN74LVC1G07DBVR
SPEED100
XTAL1
C178 C179
Y2
4
4.7uF 1uF
C25
XTAL2
ACTIVE_LINK
C30
10
11
20pF
2
25.000MHz
SN74CB3Q3384ADGVR
BUSFET'S WILL BE ACTIVE ONLY WHEN nRESWARMOUT & VCC_3V3_POE ARE HIGH
USB POWER
- ONLY nRESWARMOUT IS HIGH
DC/POE POWER
- nRESWARMOUT & VCC_3V3_POE ARE HIGH
TXP_1
TXN_1
RXP_1
2200pF
12
1
2
3
4
5
6
7
8
10
12
20pF
270E270E
Green LED
11
R222R125
Yellow LED
MT1
MT2
0E_1%
RMII_RXD0_1
RMII_RXD1_1
RMII_CRS_DV_1
RMII_RXER_1
ETHERNET_nRST_1
C46
20pF
13
14
DNI
15
16
19
20
23
C45
Q1
IRLML2402TRPBF
RXN
3
SYS_nRESWARM_OUT
R240
1OE
2OE
TXN
1
13
BUS_FET_ENABLE
BUS_FET_ENABLE
2B1
2B2
2B3
2B4
2B5
RMII_TXD0_1
RMII_TXD1_1
RMII_TXEN_1
RMII_MDIO_CLK_1
RMII_MDIO_DATA_1
VCC
ETHERNET_nRST
2A1
2A2
2A3
2A4
2A5
2
5
6
9
10
GND
10K
11,8
14
17
18
21
22
1B1
1B2
1B3
1B4
1B5
RMII_RXD0
RMII_RXD1
RMII_CRS_DV
RMII_RXER
ETHERNET_nRST
1A1
1A2
1A3
1A4
1A5
RXP
J10
GND
R239
3
4
7
8
11
TXP
C44
12
VCC_3V3_POE
RMII_TXD0
RMII_TXD1
RMII_TXEN
RMII_MDIO_CLK
RMII_MDIO_DATA
VCC
U25
CON_RJ45-8_RJHSE-5381
R153
0E_1%
NATURE OF CHANGE
REV NO.
APPROVED BY
DATE
Title
ETHERNET
Drawn by:
Date:
Approved by:
Date
SIVARAM
Thursday, December 09, 2010
D:\MS_TI_CRANE_SCH_REVB.DSN
Size
B
Date:
Document Number
MS_TI_CRANE_SCH_REVB
Wednesday, December 08, 2010
Rev
B
Sheet
1
of
14
DVI INTERFACE
U8E
VCC_3V3_POE
VCC_5V0_EXT
VCC_3V3_POE
VCC_3V3_POE
4.7K_1%
NC
I2C3_SCL
I2C3_SDA
14
17
18
21
22
1
11,7,8
BUS_FET_ENABLE
1
13
1A1
1A2
1A3
1A4
1A5
2A1
2A2
2A3
2A4
2A5
1OE
2OE
1B1
1B2
1B3
1B4
1B5
2B1
2B2
2B3
2B4
2B5
15
16
19
20
23
I2C3_SCL_1
I2C3_SDA_1
10K
R27
R142
10K
10K
R26
R28
10K
DNI
DNI
R18
DNI
DNI
10K
10K
10K
20
21
22
23
510E_1%
4.7K_1%
R133
R2
0E_1%
R1
LCD INTERFACE
VCC_5V0_EXT
10K
LCD_DAT0
LCD_DAT2
LCD_DAT4
LCD_DAT10
LCD_DAT14
LCD_DAT22
LCD_DAT11
DVI_LCD_PD_1
VCC_3V3_POE
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
LCD_DAT1
LCD_DAT3
LCD_DAT5
LCD_DAT12
LCD_DAT23
LCD_DAT19
I2C3_SDA_1
LCD_VSYNC
VCC_5V0_EXT
C91
RECP_10X2
C93
0.1uF
J12
VCC_3V3_POE
VCC_1V8_POE
0.1uF
U5
I2C3_SDA_1
I2C3_SCL_1
VCC_5V0_EXT
J11
FOR DVI
5
4
A1
A2
VCC_3V3_POE
B1
B2
OE
8
1
I2C3_SDA_5V0
I2C3_SCL_5V0
LCD_DAT21
LCD_DAT18
LCD_DAT16
LCD_DAT13
I2C3_SCL_1
LCD_PCLK
LCD_HSYNC
TXS0102DCUR
12
SN74CB3Q16211DGVR
10UF
DVI_nRESET
DVI_BSEL
DVI_DSEL
DVI_MSEN
CON_HDMI_19X1
VCC_3V3_POE
DNI
LCD_HSYNC
LCD_PCLK
LCD_VSYNC
LCD_ACBIAS
DVI_LCD_PD_1
10K
I2C3_SCL_5V0
I2C3_SDA_5V0
4.7K_1%
2
5
6
9
10
C80
VCC_3V3_POE
TXC+
TXC-
19
35
34
49
TFADJ
DKEN
RSVD2
NC
C65
0.1uF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
R17
22
21
TXC+
TXC-
C63
0.1uF
R19
1
2
TXD0TXD0+
VCC_3V3_POE
26
32
20
16
48
64
R15
R14
R13
TXC-
DNI
9
24
25
HTPLG
TXD0TXD0+
TXD0TXC+
10K
10K
I2C3_SCL
I2C3_SDA
3
4
7
8
11
DNI
DNI
9
9
DVI_HSYNC
DVI_PCLK
DVI_VSYNC
DVI_ACBIAS
DVI_LCD_PD
4.7K_1%
U22
VCC_3V3_POE
R25
R16
PD
ISEL/RESET
MSEN
BSEL/SCL
DSEL/SDA
DK3
DK2
DK1
TXD1TXD0+
TFP410PAP
24
LCD_DAT12
LCD_DAT10
LCD_DAT13
LCD_DAT17
LCD_DAT18
LCD_DAT16
LCD_DAT19
LCD_DAT20
LCD_DAT14
LCD_DAT21
LCD_DAT22
LCD_DAT23
6
7
8
4.7K_1%
4.7K_1%
4.7K_1%
VCC_3V3_POE
VCC
41
40
39
37
36
35
34
33
32
31
30
29
R22
R23
R24
TXD2TXD1+
TXD1TXD1+
GND
1OE
2OE
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
2B9
2B10
2B11
2B12
LCD_DAT2
LCD_DAT15
LCD_DAT0
LCD_DAT1
LCD_DAT3
LCD_DAT7
LCD_DAT4
LCD_DAT5
LCD_DAT6
LCD_DAT11
LCD_DAT8
LCD_DAT9
27
28
TXD1TXD1+
C81
0.1uF
J2
56
55
BUS_FET_ENABLE
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
2A9
2A10
2A11
2A12
54
53
52
51
50
48
47
46
45
44
43
42
F1
0.1A
GND
15
16
18
20
21
22
23
24
25
26
27
28
1B1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
1B9
1B10
1B11
1B12
TXD2TXD2+
TXD2+
8
19
38
49
11,7,8
DVI_DAT12
DVI_DAT10
DVI_DAT13
DVI_DAT17
DVI_DAT18
DVI_DAT16
DVI_DAT19
DVI_DAT20
DVI_DAT14
DVI_DAT21
DVI_DAT22
DVI_DAT23
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
1A9
1A10
1A11
1A12
GND1
GND2
GND3
GND4
2
3
4
5
6
7
9
10
11
12
13
14
VCC
VCC_3V3_POE
DVI_DAT2
DVI_DAT15
DVI_DAT0
DVI_DAT1
DVI_DAT3
DVI_DAT7
DVI_DAT4
DVI_DAT5
DVI_DAT6
DVI_DAT11
DVI_DAT8
DVI_DAT9
4.7K_1%
U21
17
0.1uF
10
13
11
15
14
DVI_LCD_PD_1
DVI_nRESET
DVI_MSEN
DVI_BSEL
DVI_DSEL
30
31
TXD2TXD2+
R4
R139
C1
PD0
PD1
PD2
PD3
PD4
PD5
PD6
PD7
PD8
PD9
PD10
PD11
PD12
PD13
PD14
PD15
PD16
PD17
PD18
PD19
PD20
PD21
PD22
PD23
IDCK+
IDCKDE
VSYNC
HSYNC
VREF
R7
63
62
61
60
59
58
55
54
53
52
51
50
47
46
45
44
43
42
41
40
39
38
37
36
57
56
2
5
4
3
LCD_ACBIAS
LCD_VSYNC
LCD_HSYNC
VCC_3V3_POE
C88
0.1uF
0.1uF
U3
VCCB
XAM3517AZCN
10K
LCD_DAT0
LCD_DAT1
LCD_DAT2
LCD_DAT3
LCD_DAT4
LCD_DAT5
LCD_DAT6
LCD_DAT7
LCD_DAT8
LCD_DAT9
LCD_DAT10
LCD_DAT11
LCD_DAT12
LCD_DAT13
LCD_DAT14
LCD_DAT15
LCD_DAT16
LCD_DAT17
LCD_DAT18
LCD_DAT19
LCD_DAT20
LCD_DAT21
LCD_DAT22
LCD_DAT23
LCD_PCLK
C87
0.1uF
PGND
TP
R12
DNI
C90
R21
10K
VCCA
DVI_DAT0
DVI_DAT1
DVI_DAT2
DVI_DAT3
DVI_DAT4
DVI_DAT5
DVI_DAT6
DVI_DAT7
DVI_DAT8
DVI_DAT9
DVI_DAT10
DVI_DAT11
DVI_DAT12
DVI_DAT13
DVI_DAT14
DVI_DAT15
DVI_DAT16
DVI_DAT17
DVI_DAT18
DVI_DAT19
DVI_DAT20
DVI_DAT21
DVI_DAT22
DVI_DAT23
DVI_PCLK
DVI_HSYNC
DVI_VSYNC
DVI_ACBIAS
17
65
DVI_LCD_PD
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
1
33
12
29
23
18
L1
R70
R71
R69
R66
R67
R68
R59
R168
R60
R61
R163
R165
R53
R54
R162
R169
R161
R55
R48
R49
R50
R160
R155
R156
R77
R76
R78
R79
GPMC_nCS1/GPIO_52
DSS_DATA0
DSS_DATA1
DSS_DATA2
DSS_DATA3
DSS_DATA4
DSS_DATA5
DSS_DATA6
DSS_DATA7
DSS_DATA8
DSS_DATA9
DSS_DATA10
DSS_DATA11
DSS_DATA12
DSS_DATA13
DSS_DATA14
DSS_DATA15
DSS_DATA16
DSS_DATA17
DSS_DATA18
DSS_DATA19
DSS_DATA20
DSS_DATA21
DSS_DATA22
DSS_DATA23
DSS_PCLK
DSS_HSYNC
DSS_VSYNC
DSS_ACBIAS
DVDD
DVDD
DVDD
TVDD
TVDD
PVDD
AD24
AD25
AC23
AC24
AC25
AB24
AB25
AA23
AA24
AA25
Y22
Y23
Y24
Y25
W21
W22
W23
W24
W25
V24
V25
U21
U22
U23
AE23
AD22
AD23
AE24
TGND
TGND
TGND
DGND
DGND
DGND
DSS_DATA0/UART1_CTS/GPIO_70
DSS_DATA1/UART1_RTS/GPIO_71
DSS_DATA2/GPIO_72
DSS_DATA3/GPIO_73
DSS_DATA4/UART3_RX_IRRX/GPIO_74
DSS_DATA5/UART3_TX_IRTX/GPIO_75
DSS_DATA6/UART1_TX/GPIO_76
DSS_DATA7/UART1_RX/GPIO_77
DSS_DATA8/GPIO_78
DSS_DATA9/GPIO_79
DSS_DATA10/GPIO_80
DSS_DATA11/GPIO_81
DSS_DATA12/GPIO_82
DSS_DATA13/GPIO_83
DSS_DATA14/GPIO_84
DSS_DATA15/GPIO_85
DSS_DATA16/GPIO_86
DSS_DATA17/GPIO_87
DSS_DATA18/MCSPI3_CLK/DSS_DATA4/GPIO_88
DSS_DATA19/MCSPI3_SIMO/DSS_DATA3/GPIO_89
DSS_DATA20/MCSPI3_SOMI/DSS_DATA2/GPIO_90
DSS_DATA21/MCSPI3_CS0/DSS_DATA1/GPIO_91
DSS_DATA22/MCSPI3_CS1/DSS_DATA0/GPIO_92
DSS_DATA23/DSS_DATA5/GPIO_93
DSS_PCLK/GPIO_66
DSS_HSYNC/GPIO_67
DSS_VSYNC/GPIO_68
DSS_ACBIAS/GPIO_69
2
4
6
8
10
12
14
16
18
20
1
3
5
7
9
11
13
15
17
19
LCD_DAT20
LCD_DAT17
LCD_DAT15
LCD_DAT7
LCD_DAT8
LCD_DAT9
LCD_DAT6
LCD_ACBIAS
SN74CB3Q3384ADGVR
RECP_10X2
NATURE OF CHANGE
REV NO.
APPROVED BY
DATE
Title
Drawn by:
Date:
Approved by:
Date
SIVARAM
Thursday, December 09, 2010
D:\MS_TI_CRANE_SCH_REVB.DSN
Size
B
Date:
Document Number
MS_TI_CRANE_SCH_REVB
Wednesday, December 08, 2010
Rev
B
Sheet
1
of
14
VDDSHV_3V3
EXPANSION CONNECTOR
4.7K_1%
R63
I2C2_SDA
4.7K_1%
R57
I2C2_SCL
VCC_5V0_EXT
VCC_3V3_POE
J16
4.7K_1%
R166
I2C3_SDA
4.7K_1%
R164
I2C3_SCL
2
UART2_CTS/MCBSP3_DX 4
UART2_TX/MCBSP3_CLKX 6
UART2_RX/MCBSP3_FSX 8
UART2_RTS/MCBSP3_DR 10
12
MCBSP1_DX
14
MCBSP1_CLKX
16
MCBSP1_FSX
18
MCBSP1_DR
20
MCBSP1_CLKR
22
MCBSP1_FSR
24
I2C2_SCL
SYS_nRESWARM_OUT 26
28
U8G
W1
W2
I2C2_SCL
I2C2_SDA
8
8
I2C3_SCL
I2C3_SDA
I2C3_SCL
I2C3_SDA
MMC2_CLKR93
MMC2_CMD
MMC2_DATA0
MMC2_DATA1
MMC2_DATA2
MMC2_DATA3
MMC2_DATA4
MMC2_DATA5
MMC2_DATA6
MMC2_DATA7
22E
W4
W5
AD11
AE11
AB12
AC12
AD12
AE12
AB13
AC13
AD13
AE13
I2C2_SCL/GPIO_168
I2C2_SDA/GPIO_183
McBSP3_DX/UART2_CTS/GPIO_140
McBSP3_DR/UART2_RTS/GPIO_141
McBSP3_CLKX/UART2_TX/GPIO_142
McBSP3_FSX/UART2_RX/GPIO_143
I2C3_SCL/GPIO_184
I2C3_SDA/GPIO_185
MMC2_CLK/MCSPI3_CLK/UART4_CTS/GPIO_130
MMC2_CMD/MCSPI3_SIMO/UART4_RTS/GPIO_131
MMC2_DAT0/MCSPI3_SOMI/UART4_TX/GPIO_132
MMC2_DAT1/UART4_RX/GPIO_133
MMC2_DAT2/MCSPI3_CS1/GPIO_134
MMC2_DAT3/MCSPI3_CS0/GPIO_135
MMC2_DAT4/MMC2_DIR_DAT0/MMC3_DAT0/GPIO_136
MMC2_DAT5/MMC2_DIR_DAT1/MMC3_DAT1/GPIO_137
MMC2_DAT6/MMC2_DIR_CMD/MMC3_DAT2/GPIO_138
MMC2_DAT7/MMC2_CLKIN/MMC3_DAT3/GPIO_139
McBSP1_CLKR/MCSPI4_CLK/GPIO_156
McBSP1_FSR/GPIO_157
McBSP1_DX/MCSPI4_SIMO/MCBSP3_DX/GPIO_158
McBSP1_DR/MCSPI4_SOMI/MCBSP3_DR/GPIO_159
McBSP_CLKS/GPIO_160/UART1_CTS
McBSP1_FSX/MCSPI4_CS0/MCBSP3_FSX/GPIO_161
McBSP1_CLKX/MCBSP3_CLKX/GPIO_162
SYS_nRESWARM/GPIO_30
B24
C24
A24
C23
R25
P21
P22
P23
P25
P24
N24
UART2_CTS/MCBSP3_DX
UART2_RTS/MCBSP3_DR
UART2_TX/MCBSP3_CLKX
UART2_RX/MCBSP3_FSX
R47
R46
Y3
22E MCBSP1_CLKR
MCBSP1_FSR
MCBSP1_DX
MCBSP1_DR
MCBSP1_CLKS
MCBSP1_FSX
22E MCBSP1_CLKX
1
3
5
7
9
11
13
15
17
19
21
23
25
27
MMC2_DATA7
MMC2_DATA6
MMC2_DATA5
MMC2_DATA4
MMC2_DATA3
MMC2_DATA2
MMC2_DATA1
MMC2_DATA0
MMC2_CMD
MMC2_CLK
I2C2_SDA
MCBSP1_CLKS
RECP_14X2
VDDSHV_3V3
SYS_nRESWARM
VDDSHV_3V3
AE16
22E AE14
AD15
AC15
AB15
AD14
AE15
AA19
Y19
Y20
W20
F20
F19
E24
E23
M25
N25
TP6 SMD
TP5 SMD
AD16
AC16
AB16
AA16
AE17
MCSPI1_CS3/HSUSB2_TLL_DATA2/HSUSB2_DATA2/GPIO_177/MM_FSUSB2_TXDAT
McBSP2_FSX/GPIO_116
MCSPI1_CLK/MMC2_DAT4/GPIO_171
McBSP2_CLKX/GPIO_117
MCSPI1_SIMO/MMC2_DAT5/GPIO_172
McBSP2_DR/GPIO_118
MCSPI1_SOMI/MMC2_DAT6/GPIO_173
McBSP2_DX/GPIO_119
MCSPI1_CS0/MM2_DAT7/GPIO_174
MCSPI1_CS1/MMC3_CMD/GPIO_175
McBSP4_FSX/GPIO_155/MM_FSUSB3_TXEN_N
MCSPI1_CS2/MMC3_CLK/GPIO_176
McBSP4_CLKX/GPIO_152/MM_FSUSB3_TXSE0
McBSP4_DR/GPIO_153/MM_FSUSB3_RXRCV
McBSP4_DX/GPIO_154/MM_FSUSB3_TXDAT
UART1_TX/GPIO_148
UART1_RTS/GPIO_149
CCDC_PCLK/GPIO_94
UART1_CTS/GPIO_150
CCDC_FIELD/CCDC_DATA8/UART4_TX/I2C3_SCL/GPIO_95
UART1_RX/MCBSP1_CLKR/MCSPI4_CLK/GPIO_151
CCDC_HD/UART4_RTS/GPIO_96
CCDC_VDUART4_CTS/GPIO_97
CCDC_WEN/CCDC_DATA9/UART4_RX//GPIO_98
CCDC_DATA0/I2C3_SDA/GPIO_99
CCDC_DATA1/GPIO_100
UART2_CTS/MCBSP3_DX/GPT9_PWM_EVT/GPIO_144
CCDC_DATA2/GPIO_101
UART2_RTS/MCBSP3_DR/GPT10_PWM_EVT/GPIO_145
CCDC_DATA3/GPIO_102
UART2_TX/MCBSP3_CLKX/GPT11_PWM_EVT/GPIO_146
CCDC_DATA4/GPIO_103
UART2_RX/MCBSP3_FSX/GPT8_PWM_EVT/GPIO_147
CCDC_DATA5/GPIO_104
CCDC_DATA6/GPIO_105
CCDC_DATA7/GPIO_106
SYS_CLKOUT2/GPIO_186
SYS_CLKOUT1/GPIO_10
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
MCSPI2_CLK/HSUSB2_TLL_DATA7/HSUSB2_DATA7/GPIO_178
MCSPI2_SIMO/GPT9_PWM_EVT/HSUSB2_TLL_DATA4/HSUSB2_DATA4/GPIO_179
MCSPI2_SOMI/GPT10_PWM_EVT/HSUSB2_TLL_DATA5/HSUSB2_DATA5/GPIO_180
MCSPI2_CS0/GPT11_PWM_EVT/HSUSB2_TLL_DATA6/HSUSB2_DATA6/GPIO_181
MCSPI2_CS1/GPT8_PWM_EVT/HSUSB2_TLL_DATA3/HSUSB2_DATA3/GPIO_182/MM_FSUSB2_TXEN_N
SW1
D25
C25
B25
D24
A
GND
R173
10K
NC
SYS_nRESWARM_OUT
SYS_nRESWARM_OUT
C94
TL3301AF160QJ_SPST
0.1uF
SMD
SMD
SMD
SMD
SMD
SMD
SMD
U23
SYS_nRESWARM
U8H
TP18
TP21
TP17
TP16
TP15
TP20
TP19
R147
0.1uF
VCC
XAM3517AZCN
C113
SN74LVC1G07DBVR
A22
B23
A23
B22
AD2
AD1
AE2
AD3
AE3
AD4
AE4
AC5
AD5
AE5
Y6
AB6
AC6
CCDC_PCLK
CCDC_DATA8
CCDC_HD
CCDC_VD
CCDC_DATA9
CCDC_DATA0
CCDC_DATA1
CCDC_DATA2
CCDC_DATA3
CCDC_DATA4
CCDC_DATA5
CCDC_DATA6
CCDC_DATA7
H19
K22
K23
L21
L22
L23
L24
F17
N22
VCAM
VCAM
VCC_3V3_POE
R198
0E
C171
0.1uF
J9
CCDC_DATA2
CCDC_DATA4
CCDC_DATA6
CCDC_DATA8
CCDC_DATA0
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
R226
R218
R224
R214
R221
CCDC_HD
10E_1%
R213
CCDC_VD
I2C3_SCL
10E_1%
R212
CCDC_PCLK
10E_1%
R190
1
3
5
7
9
11
13
15
17
19
21
23
25
DNI
2
4
6
8
10
12
14
16
18
20
22
24
26
10E_1%
10E_1%
10E_1%
10E_1%
10E_1%
R219
R223
R225
R211
R220
CCDC_DATA3
CCDC_DATA5
CCDC_DATA7
CCDC_DATA9
CCDC_DATA1
I2C3_SDA
CON_BOX_13X2
XAM3517AZCN
A
NATURE OF CHANGE
REV NO.
APPROVED BY
DATE
Title
EXPANSION
Drawn by:
Date:
Approved by:
Date
SIVARAM
Thursday, December 09, 2010
D:\MS_TI_CRANE_SCH_REVB.DSN
Size
B
Date:
Document Number
MS_TI_CRANE_SCH_REVB
Wednesday, December 08, 2010
Rev
B
Sheet
1
of
14
VBUS_USB0_OTG
1
2
3
4
5
VB
DD+
ID
G1
C34
C33
C168
0.1uF
4.7uF
JUMPER:
1
2
F71
F51
F81
F6
1
E25
USB0_DRVBUS
PGB1010603MR
PGB1010603MR
2
PGB1010603MR
PGB1010603MR
2
CON_USBAB_5_F
14
14
V2
V3
CAN_TXD
CAN_RXD
J1
1
H24
K21
K20
H23
H20
TP3 SMD
C_VIDEO
CON_RCAJACK3_RCJ-014
R152
R151
2
3
4
U8F
G24
F24
F25
G25
11
0E_1%
HDR_2X1
+ C32
120uF_10V
USB0_DN
USB0_DP
USB0_ID
R100
1.65K_1%
1.65K_1%
C111 0.1uF
USB0_VBUS
USB0_DM/UART3_TX_IRTX
USB0_DP/UART3_RX_IRRX
USB0_ID
ETK_CLK/MCBSP5_CLKX/MMC3_CLK/HSUSB1_STP/GPIO_12/HSUSB1_TLL_STP
ETK_CTL/MMC3_CMD/HSUSB1_CLK/GPIO_13/MM_FSUSB1_RXDP/HSUSB1_TLL_CLK
ETK_D0/MCSPI3_SIMO/MMC3_DAT4/HSUSB1_DATA0/GPIO_14/MM_FSUSB1_RXRCV/HSUSB1_TLL_DATA0
ETK_D1/MCSPI3_SOMI/HSUSB1_DATA1/GPIO_15/MM_FSUSB1_TXSE0/HSUSB1_TLL_DATA1
USB0_DRVVBUS/UART3_TX_IRTX
ETK_D2/MCSPI3_CS0/HSUSB1_DATA2/GPIO_16/MM_FSUSB1_TXDAT/HSUSB1_TLL_DATA2
ETK_D3/MCSPI3_CLK/MMC3_DAT3/HSUSB1_DATA7/GPIO_17/HSUSB1_TLL_DATA7
ETK_D4/MCBSP5_DR/MMC3_DAT0/HSUSB1_DATA4/GPIO_18/HSUSB1_TLL_DATA4
ETK_D5/MCBSP5_FSX/MMC3_DAT1/HSUSB1_DATA5/GPIO_19/HSUSB1_TLL_DATA5
ETK_D6/MCBSP5_DX/MMC3_DAT2/HSUSB1_DATA6/GPIO_20/HSUSB1_TLL_DATA6
ETK_D7/MCSPI3_CS1/MMC3_DAT7/HSUSB1_DATA3/GPIO_21/MM_FSUSB1_TXEN_N/HSUSB1_TLL_DATA3
ETK_D8/SYS_DRM_MSECURE/MMC3_DAT6/HSUSB1_DIR/GPIO_22/HSUSB1_TLL_DIR
ETK_D9/SYS_SECURE_INDICATOR/MMC3_DAT5/HSUSB1_NXT/GPIO_23/MM_FSUSB1_RXDM/HSUSB1_TLL_NXT
ETK_D10/UART1_TX/HSUSB2_CLK/GPIO_24/HSUSB2_TLL_CLK
ETK_D11/MCSPI3_CLK/HSUSB2_STP/GPIO_25/MM_FSUSB2_RXDP/HSUSB2_TLL_STP
ETK_D12/HSUSB2_DIR/GPIO_26/HSUSB2_TLL_DIR
ETK_D13/HSUSB2_NXT/GPIO_27/MM_FSUSB2_RXDM/HSUSB2_TLL_NXT
ETK_D14/HSUSB2_DATA0/GPIO_28/MM_FSUSB2_RXRCV/HSUSB2_TLL_DATA0
ETK_D15/HSUSB2_DATA1/GPIO_29/MM_FSUSB2_TXSE0/HSUSB2_TLL_DATA1
HECC1_TXD/UART3_RX_IRRX/GPIO_130
HECC1_RXD/UART3_RTS_SD/GPIO_131
MMC1_CLK/GPIO_120
MMC1_CMD/GPIO_121
MMC1_DAT0/MCSPI2_CLK/GPIO_122
MMC1_DAT1/MCSPI2_SIMO/GPIO_123
MMC1_DAT2/MCSPI2_SOMI/GPIO_124
TV_OUT2
MMC1_DAT3/MCSPI2_CS0/GPIO_125
TV_OUT1
MMC1_DAT4/GPIO_126
TV_VFB1
MMC1_DAT5/GPIO_127
TV_VFB2
MMC1_DAT6/GPIO_128
TV_VREF
MMC1_DAT7/GPIO_129
AD17
AE18
AD18
AC18
AB18
AA18
Y18
AE19
AD19
AB19
AE20
AD20
AC20
AB20
AE21
AD21
AC21
AE22
HSUSB1_STP
22E HSUSB1_REFCLK
HSUSB1_DATA0
HSUSB1_DATA1
HSUSB1_DATA2
HSUSB1_DATA7
HSUSB1_DATA4
HSUSB1_DATA5
HSUSB1_DATA6
HSUSB1_DATA3
HSUSB1_DIR
HSUSB1_NXT
R87
AA9
AB9
AC9
AD9
AE9
AA10
AB10
AC10
AD10
AE10
R170
22E
R131
100K
AM35_TMSC
R132
100K
AM35_TDI
R136
100K
AM35_TDO
R137
100K
AM35_RTCK
R140
100K
AM35_TCK
R141
10K
AM35_EMU0
R143
10K
AM35_EMU1
R3
10K
AM35_nTRST
DEBUG_3V3
J3
1
3
5
7
AM35_TDO
AM35_RTCK 9
11
AM35_TCK
AM35_EMU0 13
N2
N3
P1
P2
UART3_CTS
UART3_RTS
UART3_RX
UART3_TX
SYS_XTALIN
VSSOSC
K25
J25
SYS_XTALIN
L25
SMD
TP4
AM35_nTRST
T24
U24
T22
T23
U25
T21
R24
T25
AM35_TDO
AM35_nTRST
AM35_TMSC
AM35_TDI
AM35_TCK
AM35_RTCK
AM35_EMU1
AM35_TMSC
SYS_BOOT0/GPIO_2
SYS_BOOT1/GPIO_3
SYS_BOOT2GPIO_4
SYS_BOOT3/GPIO_5
SYS_BOOT4/MMC2_DIR_DAT2/GPIO_6
SYS_BOOT5/MMC2_DIR_DAT3/GPIO_7
SYS_BOOT6/GPIO_8
SYS_BOOT7/GPIO_115
SYS_BOOT8/GPIO_169
JTAG_TDO
JTAG_nTRST
JTAG_TMS_TMSC
JTAG_TDI
JTAG_TCK
JTAG_RTCK
JTAG_EMU1/GPIO_31
JTAG_EMU0/GPIO_11
Y4
AA1
AA2
AA3
AB1
AB2
AC1
AC2
AC3
0E_1%
C7
20pF
VDDSHV_3V3
10K
AM35_EMU1
AM35_TCK N21
RESERVED3
R75
10K
R73
10K
R72
APPROVED BY
DATE
10K
DNI
10K
10K
DNI
R_SYS_BOOT0
R_SYS_BOOT1
R_SYS_BOOT2
R_SYS_BOOT3
R_SYS_BOOT4
R_SYS_BOOT5
1
2
3
4
5
6
7
8
INPUT_GPIO1
INPUT_GPIO2
R74
R84
16
15
14
13
12
11
10
9
SW4
5
5
VDDSHV_3V3
R83
Approved by:
Date
Title
10K
10K
10K
10K
10K
10K
DNI
XAM3517AZCN
NATURE OF CHANGE
CHS-08A_8PST
R81
R88
R91
R96
R97
R99
SYS_BOOT0
SYS_BOOT1
SYS_BOOT2
SYS_BOOT3
SYS_BOOT4
SYS_BOOT5
SYS_BOOT6
SYS_BOOT7
SYS_BOOT8
DNI
R148
HDR_7X2
REV NO.
4
2
Y1
26MHz
UART3_CTS_RCTX/GPIO_163
UART3_RTS_SD/GPIO_164
UART3_RX_IRRX/GPIO_165
UART3_TX_IRTX/GPIO_166
HDQ_SIO/SYS_ALTCLK/I2C2_SCCBE/I2C3_SCCBE/GPIO_170
J-TAG
2
4
6
8
10
12
14
AM35_TMSC
AM35_TDI
14
14
14
14
20pF
H25
0E_1%
C4
R171
R172
R174
R175
R176
R178
R104
R109
R144
SYS_XTALOUT
MMC1_CLK
14
MMC1_CMD
14
MMC1_DATA0
14
MMC1_DATA1
14
MMC1_DATA2
14
MMC1_DATA3
14
MMC1_DATA4
14
MMC1_DATA5
14
MMC1_DATA6
14
MMC1_DATA7
14
100K
100K
100K
100K
100K
100K
10K
10K
DEBUG_3V3
DEBUG_3V3
SYS_XTALOUT
VDDSHV_3V3
HSUSB1_STP
11
HSUSB1_REFCLK
11
HSUSB1_DATA0
11
HSUSB1_DATA1
11
HSUSB1_DATA2
11
HSUSB1_DATA7
11
HSUSB1_DATA4
11
HSUSB1_DATA5
11
HSUSB1_DATA6
11
HSUSB1_DATA3
11
HSUSB1_DIR
11
HSUSB1_NXT
11
DNI
G2
J13
G4
G3
8
G5
R182
0E
0.1uF
USB0_HOST_VBUS
J6
SIVARAM
Thursday, December 09, 2010
D:\MS_TI_CRANE_SCH_REVB.DSN
Size
B
Date:
Document Number
MS_TI_CRANE_SCH_REVB
Wednesday, December 08, 2010
Rev
B
Sheet
1
10
of
14
VCC_5V0_EXT
USB0_HOST_VBUS
USB1_HOST_VBUS
VCC_3V3_POE
VDDSHV_3V3
VDDIO_EHCI
R159
0E
U4
OC1
OC2
8
5
USB0_OVER_CURRENT
USB1_OVER_CURRENT
VDDIO_EHCI
VDDIO_EHCI
5
5
C10
C11
C148
0.1uF
0.1uF
0.1uF
R90
R167
0.1uF
BUS_FET_ENABLE
56
55
1OE
2OE
NC
HSUSB1_REFCLK_1
26
TP8
25
#USB3320_RESET_1
R52
8.06K_1%
27
24
41
40
39
37
36
35
34
33
32
31
30
29
VDDIO_EHCI
R82
R85
R86
#USB3320_RESET_1
0E_1%
0E_1%
0E_1%
VDDIO_EHCI
8
11
14
20
23
HOST_HSUSB_ID R56
C155
C17
1
DD+
GND1
GND2
GND3
2
3
0.1uF
HOST_HSUSB_DP
120uF_10V
18
10K
VCC
32
VDDIO
30
28
VDD18_2
VDD33
HOST_HSUSB_DN
CLKOUT
NXT
DIR
STP
SPK_R
SPK_L
16
CPEN
CON_USB-A_4_F
TP11
15
TP12
REFCLK
XO
4
5
6
0E_1%
17
CP_EN
RESETB
2
PGB1010603MR
2
31
29
ID
VBUS_5v0_HOST R62
19
HSUSB1_NXT_1
HSUSB1_DIR_1
HSUSB1_STP_1
DP
22
F2
HSUSB1_DATA1_1
HSUSB1_DATA2_1
HSUSB1_DATA7_1
HSUSB1_DATA3_1
HSUSB1_DATA4_1
HSUSB1_STP_1
HSUSB1_REFCLK_1
HSUSB1_DATA0_1
HSUSB1_DATA5_1
HSUSB1_DATA6_1
HSUSB1_DIR_1
HSUSB1_NXT_1
DM
J4
17
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2B8
2B9
2B10
2B11
2B12
54
53
52
51
50
48
47
46
45
44
43
42
VBUS
USB1_HOST_VBUS
RBIAS
REFSEL0
REFSEL1
REFSEL2
USB3320C-EZK
NC
12
C16
2.2uF
INSTALL ONLY
DNIFOR TI-USB PHY
R51
10K
1
#USB3320_RESET_1
8
19
38
49
7,8
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2A8
2A9
2A10
2A11
2A12
1B1
1B2
1B3
1B4
1B5
1B6
1B7
1B8
1B9
1B10
1B11
1B12
0E_1%
0E_1%
0E_1%
F3
15
16
18
20
21
22
23
24
25
26
27
28
VCC
#USB3320_RESET
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1A8
1A9
1A10
1A11
1A12
0E_1%
2.2uF
VBUS
GND
#USB3320_RESET
2
3
4
5
6
7
9
10
11
12
13
14
DNI
DATA0
DATA1
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
33
HSUSB1_DATA1
HSUSB1_DATA2
HSUSB1_DATA7
HSUSB1_DATA3
HSUSB1_DATA4
HSUSB1_STP
HSUSB1_REFCLK
HSUSB1_DATA0
HSUSB1_DATA5
HSUSB1_DATA6
HSUSB1_DIR
HSUSB1_NXT
R64
R58
GND1
GND2
GND3
GND4
HSUSB1_DATA1
HSUSB1_DATA2
HSUSB1_DATA7
HSUSB1_DATA3
HSUSB1_DATA4
10
HSUSB1_STP
10
HSUSB1_REFCLK
10
HSUSB1_DATA0
10
HSUSB1_DATA5
10
HSUSB1_DATA6
10
HSUSB1_DIR
10
HSUSB1_NXT
VDD1v8_EHCI
3
4
5
6
7
9
10
13
VDD18_1
21
VBAT
HSUSB1_DATA0_1
HSUSB1_DATA1_1
HSUSB1_DATA2_1
HSUSB1_DATA3_1
HSUSB1_DATA4_1
HSUSB1_DATA5_1
HSUSB1_DATA6_1
HSUSB1_DATA7_1
VCC_3V3_POE
10
10
10
10
10
DNI
C151
U10
U24
R89
VDD1v8_EHCI
C149
0E_1%
VDIG2
TPS2052BDRB
10K
10K
DNI
EN1
EN2
VDD1v8_EHCI
VCC_1V8_POE
VDD1v8_EHCI
2
PGB1010603MR
0E_1%
10K 10K
F4
R5
7
6
2
PGB1010603MR
R10
OUT1
OUT2
PAD
CP_EN
IN
R9
USB0_DRVBUS
USB1_HOST_EN
R8
10
5
3
4
GND
2
USB0_HOST_ENABLE
0E_1%
SN74CB3Q16211DGVR
NATURE OF CHANGE
REV NO.
APPROVED BY
DATE
Title
USB HOST
Drawn by:
Date:
Approved by:
Date
SIVARAM
Thursday, December 09, 2010
D:\MS_TI_CRANE_SCH_REVB.DSN
Size
B
Date:
Document Number
MS_TI_CRANE_SCH_REVB
Wednesday, December 08, 2010
Rev
B
Sheet
1
11
of
14
POE(+)_DATA_RAW
HD01-T
T1
L4
VDD
8
357E_1%
GATE
COM
RSN
DET
RSP
CLASS
C55
1.0uF
C59
47uF
47uF
C56
+
330uF_10V
330uF_10V
REFERENCE
2
C60
18
ES1D
17
0.22uF
D10
16
15
1 R231
BIAS
7
4
6
DRI
BAS16LT3G
U20
12
22E
14
13
R128
10E_1%
C1174-ALB
D9
2
D8
BZX84C18-7
BZX84C18-7
11
VCC_5V0_POE
REFERENCE
C177
TPS23750PWP
RTN
C176
R122
R123
1K_1%
2SK326800L
R129
100E_1%
U16
2K
R124
R208
2.2uF
R130
C42
33pF
10K
C52
41.2K_1%
2
TCMT1104
0.01uF
D6
2
1
0.39E_1%
D1
SENP
R126
AUX
D5
9
10
2.2uH
POE(-)_RAW
MODE
NC
19
L5
C61
SEN
47uF_63V
VBIAS
3
0.1uF
COMP
12
11
BL
SEC
FB
20
U19
SI4840DY-T1-E3
8
7
3
6
2
5
1
FREQ
VSS
PAD
R227
C54
TMR
100K
PRI
C58
10
21
2
D4
24.9K_1%
SMAJ58A
HD01-T
0.1uF
1
D3
C174
POE(-)_DATA_RAW
R229
1.0uF
150K_1%
68000pF R127
U18
POE(+)_RAW
VCC_5V0_POE
10uH
C57
C53
D2
R203
86.6K_1%C51
1000pF
BAS16LT3G
2
R205
TLV431AQDBVR
C50
13.3K_1%
1uF
B
C172
2200pF
NATURE OF CHANGE
REV NO.
APPROVED BY
DATE
Title
Drawn by:
Date:
Approved by:
Date
SIVARAM
Thursday, December 09, 2010
D:\MS_TI_CRANE_SCH_REVB.DSN
Size
B
Date:
Document Number
MS_TI_CRANE_SCH_REVB
Wednesday, December 08, 2010
Rev
B
Sheet
1
12
of
14
VCC_1V8_POE
VCC_5V0_EXT
U11
LDO_IN
LDO_PLDN
LDO_EN
LDO_OUT
ADJ
VBUS_USB0_OTG
VCC_5V0_EXT
LDO_PG
3
2
5V, 3A DC SOURCE
R180
1K_1%
F9
5
SW_EN
D7
SMCJ5.0CA
2A
TPS2141IPWP
C18
10UF
R95
86.6K_1%
13
12
VCC_5V0_IN
VBAT
U13
14
R200
0.020E_1%
R195
10K
DNI
C37
CON_PWRJACK3_KLDX-0202-AHT
R183
10K
SW_PG
C20
0.1uF
2
1
PAD
GND
SW_PLDN
1
3
2
SW_OUT2
SW_OUT1
C19
20pF
15
7
J8
SW_IN2
SW_IN1
R94
110K_1%
11
J5
HDR_2X1
IN
EN
OUT
NR/FB
VBAT=4.5V
R1
R111
68K_1%
C29
20pF
LD1
LTST-C150GKT
TPS78601DCQR
4.7uF
10K
GND1
GND2
R177
R98
75E_1%
10
3
6
R110
R2
24.9K_1%
R3
VCC_5V0_POE
U17
SWITCH
POE/DCIN
R217
2
3
OUT3
OUT2
OUT1
IN1
IN2
2
3
OUT3
OUT2
OUT1
IN1
IN2
8
7
6
VCC_5V0_EXT
TPS2024DR
R201
1K_1%
GND
OC
EN
R202
TPS2034DR
VCC_5V0_POE
EN
OC
R199
40
24.9
3.2V
48.1
24.9
3.6V
52.3
24.9
3.8V
60.4
24.9
4.2V
68
24.9
4.5V
10K
GND
10K
4
U15
8
7
6
R107
270E
10K
R216
10K
U6
VCC_5V0_EXT
VCC_3V3_POE
TP14
10K
5
7
C9
C6
OUT1
OUT2
EN
SS
10UF
BIAS
FB
R154
10K
THRU HOLE
9
10
TP2
R45
PAD
R44
PG
GND
IN1
IN2
11
1
2
THRU HOLE
C8
TP13
4.7K_1%
10UF
THRU HOLE
R42
TP1
TPS74801DRCR
0.01uF
THRU HOLE
1.5K
NATURE OF CHANGE
REV NO.
APPROVED BY
DATE
Title
Drawn by:
Date:
Approved by:
Date
SIVARAM
Thursday, December 09, 2010
D:\MS_TI_CRANE_SCH_REVB.DSN
Size
B
Date:
Document Number
MS_TI_CRANE_SCH_REVB
Wednesday, December 08, 2010
Rev
B
Sheet
1
13
of
14
DEBUG_3V3
VMMC_3V3
VMMC_3V3
FL3
VDDSHV_3V3
C5
J14
11
10
UART3_TX
UART3_RTS
UART3_RX_RS232 13
0E_1% 8
UART3_CTS_RS232 R65
DIN1
DIN2
RIN1
RIN2
MAX3232
0.1uF
UART3_CTS_RS232
UART3_TX_RS232
UART3_RTS_RS232
UART3_RX_RS232
14
7
12
9
ROUT1
ROUT2
R41
UART3_RX
UART3_CTS
0E_1%
10
10
10
10
11
0E_1%
C14
0.1uF
UART
J7
1
2
3
4
5
6
7
8
9
10
11
12
13
MMC1_DATA3
MMC1_CMD
10
10
10
10
10
10
10
10
CON_DSUB_9_M
R145
MMC1_CLK
MMC1_DATA0
MMC1_DATA1
MMC1_DATA2
MMC1_DATA4
MMC1_DATA5
MMC1_DATA6
MMC1_DATA7
16
17
18
19
20
21
22
23
24
25
26
27
28
VDDSHV_3V3
2
5
5
C173
0.1uF
0.1uF
1
VCC1
VCC2
8
6
CANH
CANL
#1_miniSD
#2_miniSD
#3_miniSD
#4_miniSD
#5_miniSD
#6_miniSD
#7_miniSD
#8_miniSD
#9_miniSD
#10_miniSD
#11_miniSD
GND1
GND2
SD_WP
CD
CON_SDCARD_28_MHC-W21-601
U26
RXD
TXD
2
3
CAN_RXD
10
CAN_TXD
10
B
GND1
VDDSHV_3V3
U27
CAN INTERFACE
nRESPWRON
nRESPWRON
SW2
Y
A
GND
R158
10K
ISO1050DUB
VCC
HDR_5X2
GND2
VDDSHV_3V3
R230
120E_1%
14
15
#1_MMC+/MMCM/RSMMC/MMC/SD
#2_MMC+/MMCM/RSMMC/MMC/SD
#3_MMC+/MMCM/RSMMC/MMC/SD
#4_MMC+/MMCM/RSMMC/MMC/SD
#5_MMC+/MMCM/RSMMC/MMC/SD
#6_MMC+/MMCM/RSMMC/MMC/SD
#7_MMC+/MMCM/RSMMC/MMC/SD
#8_MMC+/MMCM/SD
#9_MMC+/MMCM/SD
#10_MMC+/MMCM
#11_MMC+/MMCM
#12_MMC+/MMCM
#13_MMC+/MMCM
MMC INTERFACE
J15
2
4
6
8
10
MMC1_WP
MMC1_CD
600E
R181
0E
C175
10K
R228
FL4
R184
VDDSHV_CAN_3V3
10K
VDDSHV_3V3
VCC_5V0_IN
600E
10
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
5
9
4
8
3
7
2
6
1
C159
0.1uF
DOUT1
DOUT2
VGND
10
10
0.1uF
C1+
C1C2+
C2-
6
15
C13
1
3
4
5
VCC
V+
0.1uF
C15
16
2
U7
C12
R189
R196
R204
R207
R206
R187
R188
R197
R191
R210
1
0.1uF
NC
nRESPWRON_1
1
nRESPWRON_1
C127
TL3301AF160QJ_SPST
0.1uF
SN74LVC1G07DBVR
NATURE OF CHANGE
REV NO.
APPROVED BY
DATE
Title
Drawn by:
Date:
Approved by:
Date
SIVARAM
Thursday, December 09, 2010
D:\MS_TI_CRANE_SCH_REVB.DSN
Size
B
Date:
Document Number
MS_TI_CRANE_SCH_REVB
Wednesday, December 08, 2010
Rev
B
Sheet
1
14
of
14