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    This document outlines the homework assignments for ECE 446 Electronic Circuit Design at Southern Illinois University Carbondale. Students are asked to draw circuit models and characteristics of bipolar junction transistors and n-type MOSFETs. They must also define terms like Early effect and threshold voltage. Expressions for intrinsic transconductance and resistances must be derived. Problems 2.10, 2.12, 2.14, 4.20, 4.21(b), 4.23, 6.34, 6.36, and 6.45(c)(d) must be worked and turned in by August 31, 2011.

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    This document outlines the homework assignments for ECE 446 Electronic Circuit Design at Southern Illinois University Carbondale. Students are asked to draw circuit models and characteristics of bipolar junction transistors and n-type MOSFETs. They must also define terms like Early effect and threshold voltage. Expressions for intrinsic transconductance and resistances must be derived. Problems 2.10, 2.12, 2.14, 4.20, 4.21(b), 4.23, 6.34, 6.36, and 6.45(c)(d) must be worked and turned in by August 31, 2011.

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    5 views1 page

    Ques

    Uploaded by

    asiya_beegum
    This document outlines the homework assignments for ECE 446 Electronic Circuit Design at Southern Illinois University Carbondale. Students are asked to draw circuit models and characteristics of bipolar junction transistors and n-type MOSFETs. They must also define terms like Early effect and threshold voltage. Expressions for intrinsic transconductance and resistances must be derived. Problems 2.10, 2.12, 2.14, 4.20, 4.21(b), 4.23, 6.34, 6.36, and 6.45(c)(d) must be worked and turned in by August 31, 2011.

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    ECE 446 Electronic Circuit Design Fall 2011 Southern Illinois University Carbondale

    Homework 01: Turn it in by 11:00 AM, Wednesday, August 31, 2011. 1. For an npn bipolar junction transistor (BJT): (a) Draw the large-signal Ebers Moll model showing the current paths and expressions. (b) Draw the IC-VBE and the IC-VCE characteristics. (c) What is meant by Early effect? How does it affect a BJT circuit? (d) Derive expressions for intrinsic gm, r, r0. 2. For an n-type MOSFET: (a) Draw a schematic of the device. Show the approximate dimensions and doping densities in different regions. (b) What is meant by threshold voltage? Draw the ID-VGS and ID-VDS characteristics. (c) What is meant by channel length modulation? How does it affect an MOS circuit? (d) Derive expressions for intrinsic gm and r0. 3. Work on Problems: 2.10, 2.12, 2.14, 4.20, 4.21(b), 4.23, 6.34, 6.36, 6.45 (c)(d)

    Southern Illinois University Carbondale/ ECE 446

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