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How to work in XILINX

Step 1: Open Xilinx software Step 2: Select File New Project.

Step 3: In the New Project window enter project name and project location.

Step 4: Select the corresponding entries for the property names.

Step 5: Click New Source.

Step 6: Enter the file name and then select Verilog module.

Step 7: Define the input and output port names ,then click Next for all successive windows.

Step 8: The Verilog file will be created under .ise file.

Step 9: Double click the Verilog file and enter the logic details and save the file.

Step 10: Double click Synthesize XST for checking the syntax .

Step 11: Right click the halfadd.v file and select new source ,then click Implementation Constraints File and enter the filename.

Step 12:.ucf file will be created .

Step13: Open the .ucf file and enter the pin location and save the file

Step14: Goto Generate programmi ng file and select Generate PROM,AC E or JTAG file in the processes window.

Step 15: In Slave Serial mode ,right click and select Add Xilinx Device.

Step 16: In the Add Device window select the .bit file to add the device.

Step 17: Connect the RS232 cable between computer and kit. Connect the SMPS to kit and switch on the kit. Step 18: Right click the device and select Program to transfer the file to kit.

Step 19: After successful transmission of file Programming Succeeded will be displayed.

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