ADC0808/ADC0809 8-Bit P Compatible A/D Converters with 8-Channel Multiplexer

General Description Hp thnh thu d liu ADC0808, ADC0809 l mt thit b CMOS vng chc vi b chuyn i 8-bit analog-to-digital, b a cng 8-knh v b vi x l tng thch iu khin logic. B chuyn i 8-bit A/D s dng php tnh xp x lin tc theo k thut qu b chuyn i. B chuyn i nhiu tnh nng ngt in tr khng cao lm n nh b so snh, b chia in p 256R vi chuyn mch analog hnh cy v thanh ghi php tnh xp x lin tc. B a cng 8-knh c th trc tip truy cp bt c cc tn hiu analog 8-single-ended no. Thit b loi b s cn thit ca t im gia (zero) bn ngoi v nhng iu chnh gi ng kch thc thc s (full-scale). D lp ghp vi cc b vi x l c cung cp bi c gi cht v c gii m cc a ch b a cng cc u vo v cc u ra TTL TRI-STATE bng cht. S thit k ca ADC0808, ADC0809 c ti u nh kt hp cht ch nhng din mo mong mun nht ca vi k thut chuyn i A/D. ADC0808, ADC0809 cho ra tc cao, chnh xc cao, s ph thuc nhit ti thiu, mc chnh xc lu di (longterm) v c th lp li tuyt ho, v tiu th nng lng ti thiu. Nhng tnh nng lm cho thit b ph hp mt cch l tng vi cc ng dng qu trnh v my kim sot tiu dng v cc ng dng t ng. i vi b a cng 16-knh c u ra chung (sample/hold port) th c bng d liu ADC0816. (See AN-247 for more information.)

Cc tnh nng
D ghp ni vi tt c cc b vi x l Hot ng ratio-metrically hoc vi 5 VDC hoc m rng tng t in p iu chnh Khng i hi hiu chnh im gia hoc full-scale (gi ng kch thc thc s) 8-channel b a cng c cc a ch logic Di vo 0V ti 5V vi b cung cp nng lng n l 5V Cc u vo tho mn in p mc ch nh TTL kn tiu chun hoc kiu bao gi 28-pin DIP Bao gi chuyn ch chip kiu c 28-pin ADC0808 tng ng vi MM74C949 ADC0809 tng ng vi MM74C949-1

Nhng c tnh ch cht

phn gii Tng s li khng hiu chnh Ngun cung cp n l Nng lng thp Thi gian chuyn i 8 Bits 12 LSB v 1 LSB 5 VDC 15 mW 100 s

Thng tin t hng

TEMPERATURE 55C to 40C to +85C RANGE +125C Error 12 LSB ADC0808CCN ADC0808CCV ADC0808CCJ ADC0808CJ

Khng iu chnh 1 LSB Khng iu chnh Package Outline

ADC0809CCN ADC0809CCV N28A Molded DIP V28A Molded Chip Carrier J28A J28A Ceramic Ceramic DIP DIP

Nhng loi cc cao (Notes 2, 1)

Nu nhng thit b ch r theo yu cu ca qun s/khng gian v tr, xin lin h vi National Semiconductor Sales Office/Distributors mua v chi tit v c im k thut. Supply Voltage (VCC) (Note 3) 6.5V Voltage at Any Pin 0.3V to (VCC+0.3V) Except Control Inputs Voltage at Control Inputs 0.3V to +15V (START, OE, CLOCK, ALE, ADD A, ADD B, ADD C) Storage Temperature Range 65C to +150C Package Dissipation at TA=25C 875 mW Lead Temp. (Soldering, 10 seconds) Dual-In-Line Package (plastic) 260C Dual-In-Line Package (ceramic) 300C Molded Chip Carrier Package Vapor Phase (60 seconds) 215C Infrared (15 seconds) 220C ESD Susceptibility (Note 8) 400V

Cc iu khin hot ng (Notes 1, 2)

Temperature Range (Note 1) ADC0808CCN,ADC0809CCN ADC0808CCV, ADC0809CCV Range of VCC (Note 1) VDC TMINTATMAX 40CTA+85C 40C TA +85C 4.5 VDC to 6.0

Cc c tnh in
Nhng c im k thut ca b chuyn i: VCC=5 VDC=VREF+, VREF()=GND, TMINTATMAX and fCLK=640 kHz unless otherwise stated. K hiu Tham s ADC0808 Total Unadjusted Error (Note 5) Cc iu kin 25C TMIN to TMAX Min Typ Max 12 34 Cc n v LSB LSB

VREF(+)

VREF()

ADC0809 Total Unadjusted Error (Note 5) Input Resistance Analog Input Voltage Range Voltage, Top of Ladder Voltage, Center of Ladder Voltage, Bottom of Ladder Comparator Input Current

0C to 70C TMIN to TMAX From Ref(+) to Ref() (Note 4) V(+) or V() Measured at Ref(+) VCC/2-0.1

1 114

LSB LSB

1.0 GND0.10

2.5 VCC+0.10 VCC VCC+0.1

kW VDC V V

VCC/2 VCC/2+0.1

Measured at Ref() fc =640 kHz, (Note 6)

0.1 2

0 0.5 2

V A

IIN

Cc c tnh v in
Cc mc Digital v nhng c im k thut DC: ADC0808CCN, ADC0808CCV, ADC0809CCN and ADC0809CCV, 4.75VCC5.25V, 40CTA+85C khng k nhng ch khc Symbol Parameter ANALOG MULTIPLEXER IOFF(+) OFF Channel Leakage Current Conditions VCC =5V, VIN =5V, TA =25C TMIN to MAX VCC =5V, IN =0, TA =25C TMIN to MAX Min Typ Max Units

10

200 1.0

nA A nA A

IOFF()

OFF Channel Leakage Current

200 1.0

10

CONTROL INPUTS Logical 1 Input VIN(1) Voltage Logical 0 Input VIN(0) Voltage Logical 1 Input IIN(1) Current (The Control Inputs) IIN(0) Logical 0 Input

VCC1.5 1.5 VIN =15V 1.0

V V A

VIN =0

1.0

ICC

Current (The Control Inputs) Supply Current

fCLK =640 kHz

0.3

3.0

mA

Cc mc Digital v nhng c im k thut DC: ADC0808CCN, ADC0808CCV, ADC0809CCN and ADC0809CCV, 4.75VCC5.25V, 40CTA+85C khng k nhng ch khc Symbol Parameter Conditions DATA OUTPUTS AND EOC (INTERRUPT) VCC = 4.75V Logical 1 Output IOUT = 360A VOUT(1) Voltage IOUT = 10A Logical 0 Output IO =1.6 mA VOUT(0) Voltage Logical 0 Output IO =1.2 mA VOUT(0) Voltage EOC TRI-STATE VO =5V IOUT VO =0 Output Current Min Typ 2.4 4.5 0.45 0.45 3 3 Max Units V(min) V(min) V V A A

Nhng c im k thut in La chn nhng c im k thut VCC=VREF(+)=5V, VREF()=GND, tr=tf=20 ns and TA=25C khng k nhng ch khc. Symbol Parameter Minimum Start tWS Pulse Width Minimum ALE Pulse Width tWALE Minimum Address Ts Set-Up Time Minimum Address Hold Time tH Analog MUX tD Delay Time From ALE OE Control to Q tH1,tH0 Logic State OE Control to HiZ T1H,t0H tc fc tEOC CIN Conversion Time Clock Frequency EOC Delay Time Input Capacitance (Figure 5) At Control Inputs Conditions (Figure 5) (Figure 5) (Figure 5) (Figure 5) RS =0W (Figure 5) CL =50 pF, RL =10k (Figure 8) CL =10 pF, RL =10k (Figure 8) fc =640 kHz, (Figure 5) (Note 7) MIn Typ 100 100 25 25 1 125 125 90 10 0 10 100 640 Max 200 200 50 50 2.5 250 250 116 1280 8+2 S 15 Units ns ns ns ns s ns ns s kHz Clock Periods pF

COUT

TRI-STATE Output

At TRI-STATE Outputs

10

15

pF

Note 1: Cc t l cc i tuyt i cho bit cc n sau cc gii hn c th xut hin s e do cho thit b. Nhng c im k thut in DC v AC khng p dng khi thit b hot ng pha sau cc iu kin ch r ca n. Note 2: Tt c cc in p c o vi s ch ti GND, khng k nhng ch khc. Note 3: C diode zener ang tn ti, bn trong, t VCC n GND v c s nh thng in hnh in p chng 7 VDC. Note 4: Hai diode on-chip rng buc tng u vo tng t m n s hng tip ti i vi cc in p u vo analog mt diode h thp hn t hoc mt diode cao hn ngun cung cp VCCn mt cht. Cho php d 100 mV tip ti dc ca c hai diode. iu ny c ngha l VIN ko di khng c tri hn in p ngun cung cp nhiu hn 100 mV, th m u ra s chnh xc. t c di in p u ra tuyt i t 0VDC n 5VDC s v th yu cu in p ngun cung cp ti thiu chng 4.900 VDC bn trn cc bin nhit , dung sai ban u v np ti. Note 5: Tng s li khng iu chnh bao gm offset, full-scale, linearity, v cc li multiplexer. Xem Hnh 3. Khng c trong s nhng yu cu A/D hiu chnh zero hoc full-scale. Tuy nhin, nu tt c m zero code c mong mun cho u vo analog khc hn 0.0V, hoc nu tn ti khong cch full-scale hp (v d: 0.5V n 4.5V full-scale) cc in p tham chiu c th c hiu chnh t iu ny. Xem Hnh 13. Note 6: B so snh dng in u vo thin v dng in i vo hoc ra ca my so mu n nh ngt. Xu hng dng in bin i trc tip vi tn s ng h v tu thuc mt cht vo nhit (Hnh 6). Xem on 4.0. Note 7: Cc u ra ca thanh ghi d kin c cp nht mt chu k ng h trc pha ang tng ca EOC. Note 8: Kiu thn ngi, phng in 100 pF thng qua in tr 1.5 k .

Phn m t chc nng (trang 5 bn ting Anh)

B a cng. Thit b cha b a cng tn hiu analog u cui n 8-knh. Mt knh u vo c bit c la nh s dng b gii m a ch. Bng 1 trnh by cc trng thi ca cc dng a ch la bt c knh no. Cc a ch c gi (latched) vo trong b gii m trn chuyn tip thp-ti-cao ca tn hiu a ch c th gi. BNG 1. KNH ANALOG C LA IN0 IN1 IN2 IN3 IN4 DNG A CH C L L L L H B L L H H L A L H L H L

IN5 IN6 IN7

H H H

L H H

H L H

CC C IM CA B CHUYN I S chuyn i Tri tin ca h thng thu d liu kiu chip n ny l b chuyn i analog-thnh-digital 8-bit ca n. B chuyn i c thit k cho nhanh, chnh xc, v c th lp lai nhiu chuyn i trn phm vi rng ca nhit . B chuyn i c phn thnh 3 phn chnh: mng bc thang 256R, thanh ghi php tnh xp x lin tc, v b so snh. Cc u ra k thut s ca b chuyn i l ng tuyt i. Phng php mng bc thang 256R (Hnh 1) c chn trn bc thang thng R/2R v tnh cng n sc (mono-tonicity) ca n, iu bo m khng mt cc m digital. Tnh cng n sc l c bit quan trng trong vng lp kn nhng h thng iu khin phn hi. Quan h khng c tnh cng n sc c th l l do nhng dao ng m n s l thm khc (catastrophic) i vi h thng. Ngoi ra, mng 256R khng l l do np bin trn in p tham chiu. Nt nhn in tr y v in tr nh ca mng bc thang trong Hnh 1 l khng cng gi tr nh ch cn li ca mng. S khc nhau trong nhng in tr ny nguyn do c tnh u ra cn xng vi nhng im zero v full-scale ca ng cong chuyn giao. S chuyn tip u ra u tin xut hin khi tn hiu analog t n +12 LSB v nhng chuyn tip u ra tip theo xut hin c 1 LSB mun hn ln dn fullscale. Thanh ghi php tnh xp x lin tc (SAR) thc hin 8 lp i lp li n xp x in p vo. i vi bt c kiu chuyn i SAR no, n-lp li l c yu cu i vi chuyn i n-bit. Hnh 2 trnh by v d tiu bit ca b chuyn i 3-bit. Trong ADC0808, ADC0809, k thut php tnh xp x l tu thuc vo 8 bit s dng mng 256R. Thanh ghi php tnh xp xi lin tc ca b chuyn i A/D (SAR) th t li trn cnh dng ca xung bt u chuyn i (SC). S chuyn i bt u trn cnh di xung ca xung bt u chuyn i. S chuyn i theo qu trnh s b gin on do nhn c xung bt u chuyn i mi. S chuyn i lin tc c th c hon thnh do lin kt end-of-conversion (EOC) u ra vi SC u vo. Nu thng dng trong ch ny, xung chuyn i bt u bn trong nn c p dng sau khi tng nng lng. End-of-conversion s xung thp gia 0 v 8 nhp ng h sau cnh tng ln ca bt u chuyn i. Phn quan trng nht ca b chuyn i A/D l b so snh. Thc ra phn ny chu trch nhim i vi nn tng chnh xc ca ton b s chuyn i. N cn l b so snh lch (drift) c nh hng ln n nng lc lp li ca thit b. B so snh n nh ngt (chopper-stabilized) cung cp phng php hiu qu nht v tho mn tt c nhu cu chuyn i. B so snh n nh ngt chuyn i tn hiu u vo DC thnh tn hiu AC. Tn hiu ny sau cung cp (fed) qua b khuch i AC cao hn v c mc DC c phc hi. K thut ny gii hn s sai lch thnh phn ca b khuch i bi s sai lch l thnh phn DC m khng c truyn nh b khuch i AC. iu ny lm cho ton b b

chuyn i A/D cc k nhy cm vi nhit , lch lu di v tn hiu u vo in ra nhiu li. Hnh 4 trnh by ng cong li tiu biu i vi ADC0808 khi c o bng cch dng cc th tc c tho ra trong AN-179.

Thng tin cc ng dng (trang 8 bn ting Anh)

THAO TC 1.0 CHUYN I S TRUYN H MET ADC0808, ADC0809 c thit k nh mt h thng thu d liu hon chnh (DAS) i vi h thng chuyn i h mt (Data Acquisition System (DAS)). Trong cc h thng h met, s bin i vt l c cn nhc (measured) biu din theo t l phn trm ca kch thc c bo ton m n khng nht thit lin quan vi tiu chun tuyt i. in p tn hiu vo trong ADC0808 c biu din bng phng trnh

Vin Dx = Vfs Vz D max D min

(1)

VIN=in p nhp vo bn trong ADC0808 Vfs=in p c bo ton

VZ=in p Zero DX=in d kin ang o DMAX=Gii hn cc i ca d kin DMIN=Gii hn cc tiu ca d kin V d tt ca my bin nng (transducer) t s truyn met l ci phn th (potentiometer) thng dng nh mt cm bin v tr. V tr ca wiper l i xng thng vi in p ra m n t l vi in p c bo ton qua n. V rng d kin c trnh by nh t l ca full-scale, nhiu yu cu tham chiu c gim ln, loi tr ngun li ln v chi ph i vi nhiu ng dng. Thun li chnh ca ADC0808, DC0809 l phm vi in p u vo bng pham vi ngun cung cp v vy my bin nng c th c kt ni trc tip qua ngun cung cp v cc u ra ca n kt ni trc tip vo cc u vo b a cng, (Hnh 9). My bin nng t truyn met nh ci phn th, my o sc cng, b cu nhit nhm, my bin nng kiu p lc, v..., l ph hp o cc quan h cn xng; tuy nhin, nhiu kiu php o cn phi quy vo chun tuyt i nh in p v dng in. iu ny c ngha l h thng tham chiu cn c s dng lin quan ti in p full-scale vi volt chun. V d, nu VCC=VREF=5.12V, th di full-scale c chia thnh 256 bc tiu chun. Bc tiu chun nh nht l 1 LSB m n cng l 20 mV. 2.0 NHNG NHC IM CA IN TR BC THANG in p t in tr bc thang th c so snh la 8 ln trong chuyn i. Cc in p cp i vi my so mu (comparator) theo ng kho chuyn analog hnh cy m n tham chiu ti ngun cung cp. in p nh, tm, v y ca thang cn phi c kim sot duy tr s hot ng chnh xc.

ADC0808 cn thit (tiu th) t hn mt milliamp ngun hin hnh, v vy s khai thc cung cp t tham chiu l d dng hon thnh. Trong Hnh 11 h thng tham chiu c nhm li c trnh by dng in pht sinh t tham chiu . B m trnh by c th ln n amp iu khin cung cp milliamp ca ngun hin hnh v bus iu khin mong mun, hoc nu bus in dung c iu khin bi tn hiu u ra l t in ln s cung cp dng in nh trng thy trong Hnh 12. LM301 l b trn bo m n nh khi np ti nh t u ra 10 F. Cc in p nh v y thang khng c tri hn VCC v t (vi y), nhng chng c th l t i xng hn VCC v ln hn t. in p thn ca thang cn lun lun l gn tm ca ngun cung cp. nhy cua b chuyn i c th c tng ln, (ngha

l, kch thc ca cc bc LSB gim) nh s dng h thng tham chiu i xng. Trong Hnh 13, a 2.5V tham chiu i xng canh gia khong VCC/2 bi v cng dng in chy trong cc in tr y ht nhau. H thng ny vi 2.5V tham chiu cho php bit LSB ti mt na kch thc ca h thng tham chiu 5V. nh ca thang, Ref(+), cn khng dng hn ngun cung cp, v y ca thang, Ref(), cn khng m hn t. in p tm thang cng cn gn tm ca ngun cung cp v rng kho chuyn analog hnh cy t N-knh chuyn thnh kho chuyn P-knh. Nhng thiu st l t ng tho mn trong nhng h thng t s met v c th d dng gp trong cc h thng c tham kho vi t. Hnh 10 trnh by h thng tham kho vi t c s phn cch ngun cung cp v tham chiu. Trong h thng ny, ngun cung cp cn phi sp xp so khp in p tham chiu. V d, nu 5.12V c s dng, th ngun cung cp cn c hiu chnh n cng in p bn trong 0.1V. Cc in p nh v y ca thang khng th tri hn VCC v t, nhng chng c th t cn xng hn VCC v cao hn t. in p tm ca thang nn lun lun gn tm ca ngun cung cp. S nhy cm ca b chuyn i c th tng, (ngha l., kch thc ca cc bc LSB c gim) do cch dng h thng tham chiu cn xng. Trong Hnh 13, a 2.5V tham chiu mt cch i xng xuyn tm khong VCC/2 bi v cng dng in chy trong cc in tr ging ht nhau. H thng ny vi 2.5V tham chiu cho php bit LSB thnh mt na kch thc ca h thng tham chiu 5V.

3.0 CC PHNG TRNH CHUYN I Sh chuyn tip gia cc m lin k N v N+1 c cho bi:

Tm ca m u ra N cho bi:

M u ra N i vi u vo bt k l s nguyn bn trong dy:

y: VIN=in p u vo b so snh

VREF(+)=Voltage at Ref(+) VREF()=Voltage at Ref() VTUE=Tng s li in p khng iu chnh (tiu biu VREF(+)512) 4.0 B SO SNH ANALOG CC U VO S sai lc in dung bn trong chip ca kho chuyn theo chu k l l do so mu ng dng in u vo. Nhng kt ni xen k vo u ra ca in tr bc thang/mng kho chuyn hnh cy v vi b so snh u ra nh mt phn ca hot ng ca b so snh n nh kiu ngt in. Gi tr trung bnh ca b so snh dng in u vo bin i trc tip vi tn s ng h v vi VIN nh trnh by trn Hnh 6. Nu cc t in lc c s dng ti cc u vo analog v tr khng ngun tn hiu thp, th b so snh dng in u vo c th khng sn sinh li chuyn i, nh nht thi to ra do phng in in dung s tt ngm (die out) trc khi b so snh u ra nhp nhy. Nu cc t in lc u vo c mong gim tp nhiu v tn hiu iu kin chng s c xu hng ti trung bnh ngoi so snh ng dng in u ra. Nm vng nhng c im ca th hiu dch DC hin hnh ca hiu ng c th d on trc theo thi thng.

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