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Digital Design Methodology: Reset part

Presented by Abramov B.

Typical Reset Sources


What are the typical drivers of a global reset signal? External Push Button: Definitely slow Power Up circuit: Active for a long period until supply stable. Software (Microprocessor): Pulse tends to be long. Global reset may be synchronous or asynchronous to system clock
Presented by Abramov B. 2

Synchronous Reset Advantages


Synchronous

resets are based on the premise that the reset signal will only affect or reset the state of the flip-flop on the active edge of a clock. Synchronous resets generally insure that the circuit is 100% synchronous.

The clock works as a filter for small reset glitches.

Presented by Abramov B.

Synchronous Reset Disadvantages


Synchronous reset is just another data input, needs reset logic. Synchronous resets may need a pulse stretcher to guarantee a reset pulse width wide enough to ensure reset is present during an active edge of the clock

Presented by Abramov B.

Synchronous Reset Circuit


data_in 0 synchronous reset Synchronous reset:
n n n

Delayed data path. More logic Metastability effect possible

Presented by Abramov B.

Asynchronous Reset Advantages


Using

an asynchronous reset, the designer is guaranteed not to have the reset added to the data path, the data path is guaranteed to be clean. The circuit can be reset with or without a clock present. No needs reset logic.

Presented by Abramov B.

Asynchronous Reset Disadvantages


The biggest problem with asynchronous resets is that they are asynchronous Spurious resets due to noise or glitches If the asynchronous reset is released at or near the active clock edge of a flip-flop, the output of the flip-flop could go metastable.

Presented by Abramov B.

The reset synchronizer logic is designed to take advantage of the best of both asynchronous and synchronous reset styles.

Synchronizing of Asynchronous Reset

Presented by Abramov B.

Glitch and Reset Lines


If the reset line is subject to glitching, this can be a real problem. This solution requires that a digital delay to filter out small glitches.

Presented by Abramov B.

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