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    R7210504 Digital Logic Design

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    sivabharathamurthy
    This document contains instructions for a digital logic design exam with 8 questions covering various topics: 1. Converting numbers between decimal and hexadecimal number systems. 2. Simplifying Boolean expressions and obtaining complements. 3. Implementing Boolean functions using NAND-NAND and AND-NOR forms. 4. Designing a 64x1 multiplexer using smaller multiplexers and combinational logic circuits using decoders and gates. 5. Defining synchronous, asynchronous, and combinational systems and explaining the operation of a NAND latch. 6. Designing a serial adder circuit using shift registers, full adders, and D flip-flops. 7.

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    R7210504 Digital Logic Design

    Uploaded by

    sivabharathamurthy
    9 views2 pages
    This document contains instructions for a digital logic design exam with 8 questions covering various topics: 1. Converting numbers between decimal and hexadecimal number systems. 2. Simplifying Boolean expressions and obtaining complements. 3. Implementing Boolean functions using NAND-NAND and AND-NOR forms. 4. Designing a 64x1 multiplexer using smaller multiplexers and combinational logic circuits using decoders and gates. 5. Defining synchronous, asynchronous, and combinational systems and explaining the operation of a NAND latch. 6. Designing a serial adder circuit using shift registers, full adders, and D flip-flops. 7.

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    This document contains instructions for a digital logic design exam with 8 questions covering various topics: 1. Converting numbers between decimal and hexadecimal number systems. 2. Simplifying Boolean expressions and obtaining complements. 3. Implementing Boolean functions using NAND-NAND and AND-NOR forms. 4. Designing a 64x1 multiplexer using smaller multiplexers and combinational logic circuits using decoders and gates. 5. Defining synchronous, asynchronous, and combinational systems and explaining the operation of a NAND latch. 6. Designing a serial adder circuit using shift registers, full adders, and D flip-flops. 7.

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    9 views2 pages

    R7210504 Digital Logic Design

    Uploaded by

    sivabharathamurthy
    This document contains instructions for a digital logic design exam with 8 questions covering various topics: 1. Converting numbers between decimal and hexadecimal number systems. 2. Simplifying Boolean expressions and obtaining complements. 3. Implementing Boolean functions using NAND-NAND and AND-NOR forms. 4. Designing a 64x1 multiplexer using smaller multiplexers and combinational logic circuits using decoders and gates. 5. Defining synchronous, asynchronous, and combinational systems and explaining the operation of a NAND latch. 6. Designing a serial adder circuit using shift registers, full adders, and D flip-flops. 7.

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    of 2

    Code No.

    : R7210504

    R7

    II B.Tech I Semester (R07) Supplementary Examinations, November 2011

    DIGITAL LOGIC DESIGN ( Common to Computer Science & Engineering, Information Technology and Computer Science & Systems Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks

    1. Convert the following to Decimal and then to Hexadecimal. (a) 32148 (b) 45678 (c) 101011012 (d) 11001012 (e) 75610 (f) 53310 [3+3+3+3+2+2]

    2. (a) Simplify the following Boolean expressions to minimum no. of literals. i. ii. iii. iv. i. ii. iii. iv. xy + xy + xy xy + yz + xz x + xy + xz + xyz (x + y)(x + y). [8+8] AB + A(B + C) + B(B + D) A + B + ABC AB + ABC + ABCD + ABCDE ABEF + ABEF + ABEF.

    (b) Obtain the complement of the following Boolean expressions.

    3. (a) Implement the following Boolean function F using the two level forms NANDAND, AND-NOR. F (w, x, y, z) = 0, 1, 2, 3, 4, 8, 9, 12 (b) Draw NOR-logic diagram that implements the following function: f (A, B, C, D) = 0, 1, 2, 3, 4, 8, 9, 12. [8+8]

    4. (a) Implement 64 1 multiplexer with four 16 1 and one 4 1 multiplexer. (Use only block diagram). (b) A combinational logic circuit is dened by the following Boolean functions. F1 = ABC + AC F2 = ABC + AB F3 = ABC + AB Design the circuit with a decoder and external gates. 1 of 2 [8+8]

    Code No. : R7210504

    R7

    5. (a) Dene and explain the following systems. i. synchronous sequential systems, ii. a synchronous sequential systems and iii. combinational systems. (b) Dene a latch. Explain the operation of NAND latch with truth table. [10+6] 6. Draw the sequential circuit for serial adder using shift registers, full adder and D-FF. Explain its operation with state equations and state table . [16] 7. (a) The Hamming code 101101101 is received. Correct it if any errors. There are four parity bits and odd parity is used. (b) Determine which bit, if any, is in error in the even parity. Hamming coded character is 1100111. Decode the message. [8+8] 8. (a) i. Explain the dierence between asynchronous and synchronous sequential circuits. ii. Dene fundamental-mode operation. iii. Explain the dierence between stable and unstable states. iv. What is the dierence between an internal state and a total state. [8+8]

    (b) Explain critical and non critical races with the help of examples.

    2 of 2

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