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Assignment 3
Assignment 3
Part 2:
In the lab, use S-Edit to draw and connect the full adder circuit shown below.
Hint: Create an inverter module, a transmission gate module and a 2X1 MUX module. Then build
the circuit using these modules.
SUM
CARRY
Obtain a print out of each module and the final circuit and submit it with your homework.
Part 3:
Using the technique shown in the class, draw the best possible layout for the following CMOS
complex gate. Show all steps including the formation of the logic graphs and Euler Path selection.
F = ( A • ( B + C + D)) + ( E • F • G )
Make sure your solution is neatly prepared and easy to follow and read.
Due date: Wednesday March 16th, 2005 at the beginning of the lecture.