CSCE 211: Digital Logic Design Fall 2009 Homework 6 11/12/09 This homework consists of 5 questions.

Please find the corresponding questions from Section 6.6 in your textbook. 1. Ex. 1.a. This is much easier if you draw the state diagram first. Then draw the state sequence as x changes. For example, (00) -- x=0/z=0 --> (01). Omit tracing after the x sequence stops. 2. Ex. 1.b (for the first 8 values of x only). 3. Ex. 4.a using CLR' signal. Number the clock edges. State the JK's action (HOLD, RESET, SET, or TOGGLE) at each clock edge. 4. Ex. 5.a. 5. Ex. 8.b. Derive the next state equations A* and B*. Make x=0 in the A* equation, simplify, and put the result in a state table; make x=1 in the A* equation, simplify and put the result in a state table. Repeat for B*. Derive the present value equation for z when x=0 (and simplify), then when x=1 (and simplify). Put z in the state table. Finally call state 00=a, 01=b, 10=c, and 11=d and give a simplified version of the state table. This homework accounts for 2 points toward your final grade. You need to submit a hardcopy of your neatly typed or handwritten answers for the problems. In order to get the points, you need to show the steps that lead to your answer. This homework is due on Nov. 19 in class.