CHNG I : GII THIU I.

Lch s xut hin b vi iu khin 8051: Nm 1980 tp on Intel gii thiu chip 8051 b vi iu khin u tin ca h vi iu khin MSC-51. Chip 8051 cha trn 60000 transistor bao gm 4K byte ROM , 128 byte RAM , 32 ng xut nhp , 1 port ni tip v 2 b nh thi 16 bit . 8051 l b vi iu khin 8 bit tc l CPU ch c th lm vic vi 8 bit d liu . D liu ln hn 8 bit c chia thnh cc d liu 8 bit x l. 8051 tr nn ph bin sau khi Intel cho php cc nh sn xut khc ( Siemens , Atmel , Philips ) sn xut v bn bt k dng bin th no ca 8051 m h mun vi iu kin h phi m chng trnh tng thch vi 8051 . T dn n s ra i ca nhiu phin bn ca 8051 vi cc tc v dung lng ROM trn chip khc nhau . Tuy nhin , iu quan trng l mc d c nhiu bin th ca 8051 , nh khc nhau v tc , dung lng ROM nhng tt c cc lnh u tng thch vi 8051 ban u . iu ny c ngha l nu chng trnh c vit cho mt phin bn 8051 no th cng s chy c vi mi phin bn khc khng ph thuc vo hng sn xut . II. S khi mt h my tnh v cc khi nim c bn :

Address bus ( 16 )

Data bus ( 8)

CPU

Control bus ( 6 )

Interface circuitry

RAM

ROM

1. B nh bn dn RAM v ROM :

Peripheral devices

Cc b nh c truy xut trc tip bi CPU bao gm cc IC ( integrated circuit ) bn dn gi l ROM v RAM , c hai c trng dng phn bit ROM v RAM : RAM ( Random access memory ) : b nh c th c / ghi , khng tip tc lu tr ni dung khi mt ngun cp in . ROM ( Read only memory ) : b nh ch c ,vn tip tc lu tr ni dung khi mt ngun cp in . 2. Bus : Bus d liu, Bus a ch, Bus iu khin Bus l mt tp cc dy mang thng tin c cng mt mc ch . Vic truy xut ti mt mch xung quanh CPU s dng ba loi bus : bus a ch ( Address bus ) , bus d liu ( Data bus ) v bus iu khin ( Control bus ) . Vi mi thao tc c hoc ghi , CPU xc nh r v tr ca d liu ( hoc lnh ) bng cch t mt a ch ln bus a ch ,sau tch cc mt tn hiu trn bus iu khin chi ra thao tc l c hay ghi . Bus d liu mang thng tin gi CPU v b nh cng nh gia CPU v cc thit b xut nhp . Bus d liu l bus hai chiu. Bus a ch mang thng tin a ch , lun c cp bi CPU v l bus mt chiu. Bus iu khin l mt tp hp cc tn hiu , mi tn hiu mang mt vai tr ring trong vic iu khin c trt t hot ng ca h thng . Cc tn hiu iu khin l cc tn hiu nh thi c cung cp bi CPU ng b ho vic di chuyn thng tin trn cc bus d liu v a ch . Thng thng c ba tn hiu nh CLOCK , READ v WRITE i vi vic di chuyn d liu c bn gia CPU v b nh .

3. n v x l trung tm ( CPU ):

CPU
Instruction register

Program counter Registers

Instruction decode and control unit Arithmetic and logic unit

n v x l trung tm CPU Instruction register ( IR ) : thanh ghi lnh IR Instruction decode and control unit : n v gii m lnh v iu khin Program counter ( PC ) : b m chng trnh Registers : cc thanh ghi Arithmetic and logic unit : n v s hc logic

CPU qun l tt c cc hot ng v thc hin cc thao tc trn d liu . Hu ht cc CPU ch bao gm mt tp cc mch logic thc hin lin tc hai thao tc : tm np lnh v thc thi lnh . CPU c kh nng hiu v thc thi cc lnh da trn mt tp cc m nh phn , mi mt m nh phn biu thi mt thao tc c bn . Cc lnh ny thng l cc lnh s hc ( nh cng , tr , nhn , chia ), cc lnh logic ( nh AND,OR,NOT, ) cc lnh di chuyn d liu , cc lnh r nhnh c biu th bi mt tp cc m nh phn v c gi l tp lnh ( instruction set ). Bn trong CPU bao gm mt tp cc thanh ghi ( Registers ) c nhim v lu tr tm thi cc thng tin , mt n v s hc logic ALU (Arithmetic logic unit ) c nhim v thc hin cc thao tc trn cc thng tin ny , mt n v gii m lnh v iu khin ( instruction decode and control unit ) c nhim v xc nh thao tc cn thc hin v thit lp cc hot ng cn thit thc hin thao tc. Thanh ghi IR ( instruction register ) lu tr m nh phn ca lnh . B m chng trnh PC ( Program counter ) lu tr a ch ca lnh k tip trong b nh cn c thc thi.

Thao tc tm np lnh ca CPU c thc hin theo cc bc sau : _ Ni dung ca PC c t ln bus a ch _ Tn hiu iu khin READ c xc lp ( chuyn sang trng thi tch cc ) _ D liu ( hoc m lnh ) c c t RAM v a ln bus d liu _ M lnh ( opcode ) c cht vo thanh ghi lnh bn trong CPU _ PC c tng ln chun b tm np lnh k t b nh Giai on thc thi lnh bao gm vic gii m lnh v to ra cc tn hiu iu khin , cc tn hiu ny iu khin vic xut nhp gia cc thanh ghi ni vi ALU v thng bo ALU thc hin thao tc c xc nh .
Hnh minh ha lung thng tin cho vic tm np lnh CPU Addressbus
N

PC Opcode IR
Control bus

Data bus

RAM N+2 N+1 N N-1

Clock Read

III. S khc nhau gia b vi x l v b vi iu khin :

Opcode

1. Cu trc phn cng : B vi x l L mt CPU n chip

B vi iu khin L mt vi mch n cha bn trong mt CPU,ROM,RAM,b nh thi,mch giao tip to nn mt h my tnh y . B vi iu khin Thch hp cho cc thit k nh vi cc thnh phn thm vo ti thiu nhm thc hin cc hot ng hng iu khin . B vi iu khin Tp lnh ch yu cung cp cc iu khin xut nhp ch s dng 1 bit.

2. ng dng : B vi x l Lm cc CPU trong cc h my tnh,thch hp vi cc ng dng x l thng tin. 3. c trng ca tp lnh : B vi x l Cc lnh ca b vi x l hot ng trn cc lng d liu ln byte , 1 byte , 2 byte , 4 byte .