in t-Vin thng

i hc Bch khoa Nng

K THUT VI X L

CHNG 4
4.1 Phn loi b nh bn dn
4.2 Hot ng ca cc chip EPROM
4.3 Hot ng ca cc chip SRAM
4.4 Bus h thng ca h vi x l 8088
4.5 Bi ton thit k b nh

MC TIU V BIN PHP THIT K

Ghp ni cc chip nh EPROM v SRAM vi Bus

h thng sao cho khng xy ra xung t:
Cc chip nh b cm khi vi x l truy cp cc cng
I/O
Ch c mt chip nh hot ng khi vi x l truy cp
b nh
Thc hin mt mch gii m a ch b nh dng
cc chip gii m hoc cc cng logic hoc kt hp
c hai

4.1 PHN LOI B NH BN DN

B nh bn dn
(Semiconductor memory)
RAM

SAM
(Sequential Access Memory)

(Random Access Memory)

ROM (Read Only Memory)

PROM

EPROM

EEPROM

Flash ROM

RWM (Read Write memory)

SRAM

DRAM

4.2 CC CHIP EPROM

p chn a ch

A0
A1
A2
A3
A4
A5

D0
D1
D2
D3
D4
D5

A6
A7
A8

D6

A p-1

iu khin c
Chn chip
Cc chn iu khin

OE
PGM
CE
Vpp

EPROM

Dm-1

m chn d liu

DUNG LNG CA 1 CHIP NH

Mt chip nh c xem nh mt mng gm n

nh. Mi nh lu tr c m-bit d liu
Dung lng ca chip thng c biu din: nxm
V d: Mt chip c dung lng 2Kx8 ngha l chip
c 2048 nh v mi nh c th lu tr c
1 byte d liu
m chnh l s chn d liu ca chip
log2(n) = p l s chn a ch ca chip

HOT NG GHI D LIU VO EPROM

Vic ghi d liu vo EPROM c gi l lp trnh

cho EPROM
c thc hin bng thit b chuyn dng gi l B
np EPROM
Chn Vpp c cp in p tng ng vi tng
loi chip gi l in p lp trnh
D liu ti cc chn d liu s c ghi vo mt
nh xc nh nh cc tn hiu a vo cc chn
a ch v mt xung (thng gi l xung lp trnh)
a vo chn PGM

HOT NG C D LIU T MT CHIP EPROM

c d liu t 1 nh no ca 1 chip
EPROM no , B vi x l cn phi:

Chn chip : 0 -----> CE

p cc tn hiu a ch ca nh cn c vo cc chn a

ch Ap-1 A0

c: 0 ------ > OE
Kt qu l m bit d liu cn c xut hin cc chn d
liu Dm-1 D0

H EPROM THNG DNG 27X

S hiu ca chip

Dung lng

2716

2Kx8

2732

4Kx8

2764

8Kx8

27128

16Kx8

27256

32Kx8

27512

64Kx8

Bng 4.1 H EPROM 27x

EPROM
1

S chn
ca 2716
v 2732

3
4
5
6

7
8
9
10
11
12

A7

Vcc

A6

A8

A5

A9

A2

A1

A10
__

D7

D0

D6

D1

D5

D2

D4

GND

D3

A11
__

OE

OE / Vpp

22

19

CE/PGM 18

A0

Vpp
__

23

20

A3

2732

24

21

A4

2716

17
16
15
14
13

EPROM 2764

Cc chn a ch

Cc chn d liu
Chn chip

iu khin c

EPROM 2764

LP TRNH CHO 2764

Trc ht cn phi xo

Xo mt chip EPROM bng tia cc tm

Lp trnh bng cch:

Xo mt chip tc l lm cho tt c cc bit = 1

VPP mc mc 12.5V
E v P u mc thp TTL

Cc bit d liu a vo cc chn d liu

Cc bit a ch a vo cc chn a ch

4.3 CC CHIP SRAM

P chn a ch

A0
A1
A2
A3
A4
A5

D0
D1
D2
D3
D4
D5

A6
A7
A8

D6

A p-1

iu khin c
Chn chip
iu khin ghi

OE
CS
WE

SRAM

Dm-1

m chn d liu

C D LIU T MT CHIP SRAM

c d liu t 1 nh no ca 1 chip SRAM
no , vi x l cn phi:

Chn chip : 0 -----------> CS

p cc tn hiu a ch vo Ap-1 A0
c: 0 ----------- > OE

Kt qu l m bit d liu cn c xut hin cc chn

d liu Dm-1 D0

GHI D LIU VO MT CHIP SRAM

ghi m bit d liu vo 1 nh no ca 1 chip
SRAM no , vi x l cn phi:
Chn chip : 0 --------> CS
p cc tn hiu a ch vo Ap-1 A0
p m bit d liu cn ghi vo cc chn d liu Dm-1
D0
Ghi: 0 --------- > WE
Kt qu l cc bit d liu cc chn d liu s c
ghi vo nh chn

SRAM 6264
Dung

lng 8Kx8
8 chn d liu
13 chn a ch
Hai chn chn chip
Chn iu khin c
Chn iu khin ghi

A0

I/O0

A1

I/O1

A2
A3

I/O2
I/O3

A4
A5
A6

I/O4
I/O5
I/O6

A7
A8
A9
A10
A11
A12

I/O7

OE
WE
CS1
CS2

6264

32K X 8 STATIC RAM

1
2
3
4
5
6
7

8
9

10
11
12
13
14

Vcc
__
WE

A14
A12
A7

A13

A6

A8

A5

A9

A4

A11
__
OE

A3
A2

A10

27
26
25
24
23
22

21
__

A1

CE

A0

D7

D0

D6

D1

D5

D2

D4

GND

D3
51256S

28

20

19
18
17
16
15

S KHI 6264

CHC NNG CA 6264

4.4 BUS H THNG CA 8088

Bus a ch 20-bit: gm cc ng a ch c k
hiu t A19 n A0
Bus d liu 8-bit: gm cc ng d liu c k
hiu t D7 n D0
Bus iu khin gm cc ng iu khin ring l
phc v cho hot ng truy cp b nh v cc
cng I/O, mi ng thng c k hiu bng
tn ca tn hiu iu khin
Bus h thng khng ni trc tip vi cc chn ca
8088: thng qua cc mch m, cht.

80X86 MICROPROCESSORS
Product

8008

808
0

808
5

808
6

808
8

8028
6

80386

80486

Pent.

Pent.
Pro

Year Introduced

1972

1974

1976

1978

1979

1982

1985

1989

1992

1995

Technology

PMOS

NMO
S

NMO
S

NMO
S

NMO
S

NMOS

CMOS

CMOS

BICMO
S

BICMO
S

Clock Rate

0.50.8

2-3

3-8

5-10

5-8

1016?

16-40

66

6066+

150

18

40

40

40

40

132

168

273

387

Number of
transistors

3000

4500

6500

29K

29K

130K

275K

1.2M

3M

5.5M

Number of
instructions

66

111

113

133

133

Physical Memory

16K

64K

64K

1M

1M

16M

16M4GB

4GB

4GB

64G

Virtual Memory

none

none

none

none

none

1G

64T

64T

64T

64T

Internal Data Bus

16

16

16

32

32

64

32

External Data Bus

16

16

16,32

32

64

64

Address Bus

16

16

20

20

24

24,32

32

32

36

Data Types

8,16

8,16

8,16

8,16,32

8,16,3
2

8,16,3
2

8,16,3
2

Number of Pins

8088/8086 MICROPROCESSOR
DIP 40 pin
Data bus

Bus

d liu trong :16 bit

Bus d liu ngoi ca 8088: 8 bit dng AD0-AD7
Bus d liu ngoi ca 8086:16 bit dng AD0AD15
ALE (Address Latch Enable)

8088/8086 MICROPROCESSOR

Bus a ch
ALE

=1
S dng 74LS373 tch v cht a ch
u

vo: AD0-AD7 (8088) hoc AD0-AD15 (8086) v

ALE
u ra: A0-A7 (8088) hoc A0-A15 (8086)

S CHN CA 8088

S CHN 8088/8086
(MIN MODE)

MINIMUM/MAXIMUM MODE

nh hng n cc chn 24-31

Minimum Mode

Cc chn 24-31 l cc tn hiu iu khin I/O v b nh

Cc tn hiu iu khin u t 8088/8086
Tng t vi 8085A

Maximum Mode

Mt s tn hiu iu khin c to ra t ngoi

Mt s chn c thm chc nng mi
Khi c dng b ng x l ton 8087

S CHN CA 8088
MN / MX

AD0

READY

AD1
AD2

CLK

AD3

RESET

AD4
AD5

TEST

AD6
AD7

HLDA
A8
HOLD
NM I

A9
A10
A11
A12
A13

8088

A14
A15
A16 / S3
A17 / S4
A18 / S5
A19 / S6
SSO
DEN
DT / R
IO / M
RD
WR
ALE

INTR

INTA

TN HIU CC CHN CA 8088

MN / MX

AD0

READY

AD1
AD2

CLK

AD3

RESET

AD4
AD5

TEST

AD6

Cc chn a ch/D liu

AD7
HLDA
A8
HOLD
NM I

A9
A10
A11
A12

Cc chn a ch

A13

8088

A14
A15
A16 / S3
A17 / S4
A18 / S5

Cc chn a ch/Trng thi

A19 / S6
SSO
DEN
DT / R
IO / M
RD
WR
ALE
INTR

INTA

Cho php cht a ch

CC CHN A CH/D LIU

Cc chn AD7 n AD0
K thut Multiplexing: Tn hiu cc chn
ny lc ny l tn hiu a ch, lc khc l tn
hiu d liu ph thuc vo tn hiu iu
khin ALE (Address Latch Enable):
ALE = 1: AD7 n AD0 = A7 n A0
ALE = 0: AD7 n AD0 = D7 n D0

CC CHN A CH
V CC CHN A CH/TRNG THI
Cc chn a ch: A15 n A8
Tn hiu cc chn ny lun l tn hiu
a ch
Cc chn a ch/trng thi: A19/S6 n
A16/S3:
ALE = 1: A19 n A16
ALE = 0: S6 n S3

PROCESSOR TIMING DIAGRAM OF 8088 (MINIMUM MODE)

FOR MEMORY OR I/O READ (WITH 74245)
T1

T2

T3

T4

CLOCK
__

DT/R
ALE
D7 - D0

D7 - D0 (from memory)

from memory to 74LS245

AD7 - AD0

A7 - A0

A15 - A8

A19/S6 - A16/S3
A19 - A0
from 74LS373 to memory

garbage

D7 - D0 from
74LS245

A15 - A8

A19 - A16

S6 - S3

A19 - A0 from 74LS373

__

IO/M
____

RD
______

DEN

if I/O ACCESS this is HIGH, if MEMORY ACCESS this is LOW

M T CHN

BHE
Bus High Enable
Phn bit byte thp v
byte cao ca mt t (ch
vi 8086)

M T CHN
NMI
Non Maskable
Interrupt
u vo ngt khng
che c

M T CHN
INTR
Interrupt Request
u vo ngt che
c
Ni vi chip iu
khin ngt 8259
INTA: chp nhn ngt

M T CHN

CLK
Clock
u vo ng h
Ni vi chip 8284

M T CHN

RESET
Kt thc hot ng hin thi
v huy b mi th
Sau khi reset

CS=FFFFH
DS=0000H
SS=0000H
ES=0000H
IP=0000H
Cc c b xo
Hng I lnh rng

M T CHN

READY
Chn thm mt trng thi
i (wait state)

M T CHN

TEST
n t 8087 (B ng x
l)
ng b 8088 v 8087

M T CHN

MN/MX
Minimum mode = +5V
Maximum mode = Gnd

M T CHN MAX

QS0, QS1
Queue status
Trng thi ca hng i
lnh:

00 No operation
01 first byte of opcode
from queue
10 empty the queue
11 subsequent byte from
queue

M T CHN MAX

S0, S1, S2
Status Signal Pins (S2-S0)

000 INTA interrupt

acknowledge
001 IORC read I/O port
010 IOWC write I/O port
011 none - halt
100 MRDC code access
101 MRDC read memory
110 MWTC write memory
111 none - passive

M T CHN MAX

LOCK
Locks processor to
system bus
Gain the lock by using
LOCK prefix on an
assembly instruction
Used with status signals
to prevent DMA from
gaining control of the
buses

M T CHN MAX

RQ/GT0, RQ/GT1
Request/Grant
Bi-directional
Gain control of local bus
RQ/GT0 normally
permanently high
(disabled)
RQ/GT1 is connected to
the 8087

M T CHN MIN

INTA
Interrupt acknowledge
Chp nhn ngt

M T CHN MIN
ALE
Address Latch Enable
Tn hiu cc chn
a ch/D liu v cc
chn a ch/Trng
thi lc ALE = 1 l cc
tn hiu a ch

M T CHN
AD0-AD7
Cc chn a ch/D
liu
Tn hiu cc chn
ny l 8 bit a ch
thp A0 n A7 khi
ALE =1, l 8 bit d
liu D0 n D7 khi
ALE = 0

74LS373
D0

Q0

D1

Q1

D2

Q2

D3

Q3

D4
D5

Q4
Q5

74LS373

D6

Q6

D7

Q7

OE
LE

74LS373

DNG 74LS373 TCH V CHT A

CH

M T CHN MIN

DEN
Data Enable
D liu c ngha

M T CHN MIN

DT/R
iu khin hng ca tn
hiu d liu:
1: Tn hiu d liu i ra
t 8088
0: Tn hiu d liu i vo
8088

M T CHN MIN
IO/M
Phn bit: truy cp I/O
hay B nh

1:

8088 truy cp I/O

0: 8088 truy cp b
nh

M T CHN MIN

WR
0: Tn hiu trn bus d
liu c ghi vo b nh
hoc I/O
Ghi b nh: ?
Xut d liu ra cng: ?

M T CHN MIN

HLDA
Hold Acknowledge
0: Chp nhn yu cu
DMA HOLD

Bo cho B iu khin
DMA c php s dng
bus h thng

M T CHN MIN

HOLD
Nhn tn hiu yu cu
DMA t B iu khin
DMA (DMAC)
DMAC mun s dng
bus h thng

M T CHN MIN

SSO
8088
Dng vi IO/M v DT/R
xc nh trng thi
ca chu k bus hin thi

CC TN HIU IU KHIN

C th s dng cc cng logic to ra cc

tn hiu iu khin khc t cc tn hiu iu
khin sn c
3

Tn hiu:

RD,

WR and IO/M

RD W
R

IO/M Signal

MEMR

MEMW

IOR

IOW

Never
happens

TO RA CC TN HI IU KHIN
(MIN MODE)

TO RA CC TN HI IU KHIN
(MIN MODE)

8088 BUS MIN MODE

74LS245
A0

B0

A1

B1

A2

B2

A3

B3

A4

B4

A5

74LS245

B5

A6

B6

A7

B7

DIR

BUS H THNG CA H 8088 MODE MINIMUM

A7 - A0
DEN
DT / R

E
DIR

AD7 - AD0

A15 - A8

OE
LE

OE
LE

A19/S6 - A16/
S3

ALE

OE
LE

WR

Bus d liu

Bus a ch

A7 - A0
A15 - A8
A19 - A16

Q7 - Q0

MEMORY

Q7 - Q4
Q3 - Q0

74LS373

RD
IO / M

D7 - D0

74LS373

D7 - D4
D3 - D0
GND

Q7 - Q0

74LS373

D7 - D0
GND

8088

74LS245

D7 - D0
GND

B7 - B0

RD

MEMR
WR

MEMW

MINIMUM MODE 8088

D7 - D0

D7 - D0

A19 - A0

A19 - A0

8088 Minimum
Mode

MEMORY

B nh c chn khi no?

MEMR

RD

MEMW

WR

MINIMUM MODE
8088

220 nh (1MB)

D7 - D0

D7 - D0

A19 - A0

A19 - A0

MEMORY

8088 Minimum
Mode

MEMR

RD

MEMW

WR

CS

KHNG GIAN A CH B NH 1M
A19
n
A0
(HEX)
00000

AAAA
1111
9876

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

0000

0000

0000

0000

0000

FFFFF

1111

1111

1111

1111

1111

V d: Mt a ch bt k 34FD0h
0011 0100 11111 1101 0000

B NH Y 1MB
AX

3F1C

FFFFF

36

BX
CX
DX

0023
0000
FCA1

FFFFE
FFFFD

25
19

CS
SS
DS
ES

XXXX
XXXX
2000
XXXX

BP
SP

XXXX
XXXX

SI
DI

XXXX
XXXX

IP

XXXX

A19
:
A0

A19
:
A0

D7
:

D7
:

D0

D0

MEMR

RD

MEMW

WR

CS

:
:
20023
20022
20021
20020
:
:

:
:
13
7D
12
29
:
:

10008
10007
10006
10005
10004
10003

8A
F4
07
88
42
39

10002
10001
10000

27
98
45

:
:
00001
00000

:
:
95
23

NU CH CN B NH C
DUNG LNG NH HN
1MB TH GII QUYT NH
TH NO?
Ph thuc vo cc chip nh sn c
Ph thuc yu cu phn b a ch cho
cc loi b nh vt l khc nhau

512K U TIN CA KHNG GIAN A CH B NH

(CC A CH C BIT CAO NHT A19 = 0)

A18
n
A0
(HEX)
00000

AAAA
1111
9876

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

0000

0000

0000

0000

0000

7FFFF

0111

1111

1111

1111

1111

512K TIP THEO CA KHNG GIAN A CH B

NH
(CC A CH C BIT CAO NHT A19 = 1)
A18
n
A0
(HEX)
80000

AAAA
1111
9876

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

1000

0000

0000

0000

0000

FFFFF

1111

1111

1111

1111

1111

B NH 512KB

AX

3F1C

BX
CX
DX

0023
0000
FCA1

CS
SS
DS

XXXX
XXXX
2000

ES

XXXX

BP

XXXX

SP

XXXX

SI

XXXX

DI

XXXX

IP

XXXX

Lm g vi A19?
A19
A18
:

A18
:

7FFFF
7FFFE

36
25

A0

A0

7FFFD

19

D7
:

D7
:

D0

D0

MEMR

RD

MEMW

WR

CS

:
:

:
:

20023

13

20022
20021
20020

7D
12
29

:
:
00001
00000

:
:
95
23

IU G XY RA NU 8088 C NH A0023H?
AX

3F1C

BX
CX
DX

0023
0000
FCA1

CS
SS
DS

XXXX
XXXX
A000

ES

XXXX

BP

XXXX

SP

XXXX

SI

XXXX

DI

XXXX

IP

XXXX

A19
A18
:
A0

A18
:

7FFFF
7FFFE

36
25

A0

7FFFD

19

D7
:

D7
:

D0

D0

MEMR

RD

MEMW

WR

CS

:
:

:
:

20023

13

20022
20021
20020

7D
12
29

:
:
00001
00000

:
:
95
23

MOV AH, [BX]

IU G XY RA NU 8088 C NH A0023H?

A19
n
A0
(HEX)
A0023

AAAA
1111
9876

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

1010

0000

0000

0010

0011

A19 khng c ni n b nh nn
nu 8088 pht logic 1 trn A19 th
b nh cng khng nhn bit c.

IU G XY RA NU 8088 C NH 20023H?

A18
n
A0
(HEX)
20023

AAAA
1111
9876

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

0010

0000

0000

0010

0011

Vi b nh tnh hnh khng c g khc!

NU B NH GM 2 KHI 512KB NH TH NY?

AX

3F1C

A19

BX
CX
DX

0023
0000
FCA1

A18
:
A0

A18
:
A0

D7

D7

:
D0

:
D0

MEMR
MEMW

RD
WR
CS

CS
SS

XXXX
XXXX

DS
ES

2000
XXXX

BP

XXXX

SP

XXXX

SI

XXXX

DI

XXXX

IP

XXXX

7FFFF

36

7FFFE
7FFFD
:

25
19
:

20023
20022
20021

13
7D
12

20020
:
00001
00000

29
:
95
23

7FFFF

12

7FFFE
7FFFD
:

98
2C
:

20023
20022
20021

33
45
92

RD
WR

20020
:
00001

A3
:
D4

CS

00000

97

A18
:
A0
D7
:
D0

C VN !!!
Vn l: Xung t Bus. Hai khi nh s
cung cp d liu cng mt lc khi 8088 c
b nh
Gii php: Dng A19 lm ngi phn x
gii quyt xung t trn bus. Nu A19
mc logic 1 th khi nh trn hot ng
(khi nh di b cm) v ngc li

B NH GM HAI KHI NH 512KB

AX

3F1C

A19

BX

0023

A18

CX

0000

DX

FCA1

A0

A0

D7

D7

CS

XXXX

SS

XXXX

DS

2000

ES

XXXX

BP

XXXX

SP

XXXX

SI

XXXX

DI

XXXX

IP

XXXX

7FFFF

36

A18

7FFFE

25

7FFFD

19

20023

13

20022

7D

20021

12

20020

29

D0

D0

MEMR

RD

MEMW

WR

00001

95

CS

00000

23

7FFFF

12

A18

7FFFE

98

7FFFD

2C

20023

33

20022

45

20021

92

20020

A3

RD

WR

00001

D4

CS

00000

97

A0
D7

:
D0

KHNG GIAN A CH B NH 1M
A19
n
A0
(HEX)
00000

AAAA
1111
9876

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

0000

0000

0000

0000

0000

7FFFF

0111

1111

1111

1111

1111

80000

1000

0000

0000

0000

0000

FFFFF

1111

1111

1111

1111

1111

B NH GM HAI KHI NH 512KB

AX

3F1C

A19

BX
CX
DX

0023
0000
FCA1

A18
:
A0

A18
:
A0

CS
SS
DS

XXXX
XXXX
2000

D7

D7

:
D0

ES

XXXX

MEMR
MEMW

BP

XXXX

SP

XXXX

SI

XXXX

DI

XXXX

IP

XXXX

Khi P xut mt a
ch t 00000h
80000h n
to
FFFFFh, B nh ny
7FFFFh,
hot ng

7FFFF

36

7FFFE
7FFFD
:
20023

25
19
:
13

:
D0

20022
20021
20020

7D
12
29

RD

WR
CS

00001
00000

95
23

7FFFF

12

7FFFE
7FFFD
:

98
2C
:

20023
20022
20021

33
45
92

20020

A3

RD

WR
CS

00001
00000

D4
97

A18
:
A0
D7
:
D0

B NH GM HAI KHI NH 512KB

AX

3F1C

A19

7FFFF

36

BX
CX

0023
0000

A18
:

A18
:

7FFFE
7FFFD

25
19

DX

FCA1

A0

A0

D7

D7

:
20023

:
13

CS
SS

XXXX
XXXX

:
D0

:
D0

20022
20021

7D
12

DS
ES

2000
XXXX

MEMR

RD

20020
:

29
:

MEMW

WR
CS

00001
00000

95
23

7FFFF

12

BP

XXXX

SP

XXXX

SI

XXXX

DI

XXXX

A18
:

7FFFE
7FFFD

98
2C

IP

XXXX

A0

:
20023

:
33

20022
20021

45
92

RD

20020
:

A3
:

WR
CS

00001
00000

D4
97

D7
:
D0

THIT K B NH CHO H VI X L
AX

3F1C

A19

A19

BX
CX

0023
0000

A18
:

A18
:

DX

FCA1

A0

CS
SS

XXXX
XXXX

DS
ES

2000
XXXX

BP

XXXX

SP

XXXX

SI

XXXX

DI

XXXX

IP

XXXX

7FFFF

36

A18
:

7FFFE
7FFFD

25
19

A0

A0

D7

D7

D7

:
20023

:
13

:
D0

:
D0

:
D0

20022
20021

7D
12

20020

MEMR

RD

29
:

MEMW

WR

Ghp ni cc chip
nh:
RD
WR
00001
ring l vi Bus
h
CS
00000
thng sao cho khng
xy ra xung t nh7FFFF
A18
7FFFE
mch gii m a
ch
:
7FFFD
A0
:
b nh

95
23

12
98
2C

20023

:
33

20022
20021

45
92

RD

20020
:

A3
:

WR
CS

00001
00000

D4
97

D7
:
D0

NU B I KHI NH BN DI?
AX

3F1C

A19

BX
CX
DX

0023
0000
FCA1

A18
:
A0

A18
:
A0

CS
SS
DS

XXXX
XXXX
2000

D7

D7

:
D0

ES

XXXX

BP

XXXX

SP

XXXX

SI

XXXX

DI

XXXX

IP

XXXX

7FFFF

36

7FFFE
7FFFD
:
20023

25
19
:
13

:
D0

20022
20021
20020

7D
12
29

MEMR

RD

MEMW

WR
CS

00001
00000

95
23

7FFFF

12

7FFFE
7FFFD
:

98
2C
:

20023
20022
20021

33
45
92

20020

A3

RD

WR
CS

00001
00000

D4
97

A18
:
A0
D7
:
D0

NU B I KHI NH BN DI TH
AX

3F1C

A19

BX
CX
DX

0023
0000
FCA1

A18
:
A0

A18
:
A0

CS
SS
DS

XXXX
XXXX
2000

D7

D7

:
D0

ES

XXXX

MEMR
MEMW

BP

XXXX

SP

XXXX

SI

XXXX

DI

XXXX

IP

XXXX

Khi
Khi P
P xut
xut ra
ra mt
mt da
a
ch t 00000h n
ch t 80000h n
7FFFFh,
c
FFFFFh, Khng
Chip nh
chip
nh ng
no hot
ny hot
ng!

7FFFF

36

7FFFE
7FFFD
:
20023

25
19
:
13

:
D0

20022
20021
20020

7D
12
29

RD

WR
CS

00001
00000

95
23

GII M Y V KHNG Y

Gii m y (Full Decoding)

Tt c cc ng a ch c ngha u c s dng
vo mch gii m
Mi nh ch c mt a ch vt l duy nht

Gii m khng y (Partial Decoding)

Khng phi tt c cc ng a ch c ngha u c

s dng vo mch gii m
Mt nh c hn mt a ch vt l

GII M Y
AX

3F1C

A19

BX
CX
DX

0023
0000
FCA1

A18
:
A0

A18
:
A0

CS
SS
DS

XXXX
XXXX
2000

D7

D7

:
D0

ES

XXXX

BP

XXXX

SP

XXXX

SI

XXXX

DI

XXXX

IP

XXXX

7FFFF

36

7FFFE
7FFFD
:
20023

25
19
:
13

:
D0

20022
20021
20020

7D
12
29

MEMR

RD

MEMW

WR
CS

00001
00000

95
23

GII M Y
A19
n
A0
(HEX)
80000

AAAA
1111
9876

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

1000

0000

0000

0000

0000

FFFFF

1111

1111

1111

1111

1111

A19 phi mc 1 th chip nh mi

hot ng (c chn)

GII M Y
A19
n
A0
(HEX)
00000

AAAA
1111
9876

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

0000

0000

0000

0000

0000

7FFFF

0111

1111

1111

1111

1111

Do , nu vi x l pht ra mt a ch
t 00000h n 7FFFFh (A19 mc
logic 0) chip nh s khng c
chn.

GII M KHNG Y
AX

3F1C

BX
CX
DX

0023
0000
FCA1

CS
SS
DS

XXXX
XXXX
2000

ES

XXXX

BP

XXXX

SP

XXXX

SI

XXXX

DI

XXXX

IP

XXXX

A19
A18
:

A18
:

7FFFF
7FFFE

36
25

A0

A0

7FFFD

19

:
:

:
:

20023

13

20022
20021
20020

7D
12
29

:
:

:
:

00001
00000

95
23

D7
:

D7
:

D0

D0

MEMR

RD

MEMW

WR

CS

GII M KHNG Y
A19
n
A0
(HEX)
00000

AAAA
1111
9876

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

0000

0000

0000

0000

0000

7FFFF

0111

1111

1111

1111

1111

80000

1000

0000

0000

0000

0000

FFFFF

1111

1111

1111

1111

1111

A19 khng c ngha vi chip nh

GII M KHNG Y
A19
n
A0
(HEX)
00000

AAAA
1111
9876

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

0000

0000

0000

0000

0000

7FFFF

0111

1111

1111

1111

1111

80000

1000

0000

0000

0000

0000

FFFFF

1111

1111

1111

1111

1111

a ch thc t

GII M KHNG Y
A19
n
A0
(HEX)
00000

AAAA
1111
9876

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

0000

0000

0000

0000

0000

7FFFF

0111

1111

1111

1111

1111

80000

1000

0000

0000

0000

0000

FFFFF

1111

1111

1111

1111

1111

a ch thc t

B NH GM 2 CHIP 512KX8
A19

8088
Minimum
Mode

A18
:
A0

A18
:
A0

D7

D7

:
D0

:
D0

MEMR

RD

MEMW

WR
CS

512KB
#2

A18
:
A0
D7
:
D0
RD
WR
CS

512KB
#1

B NH CH C MT CHIP 512KX8 (VER. 1)

A19

8088
Minimum
Mode

A18
:
A0

A18
:
A0

D7

D7

:
D0

:
D0

MEMR

RD

MEMW

WR
CS

512KB

B NH CH C MT CHIP 512KX8 (VER. 2)

A19

8088
Minimum
Mode

A18
:
A0

A18
:
A0

D7

D7

:
D0

:
D0

MEMR

RD

MEMW

WR
CS

512KB

B NH CH C MT CHIP 512KX8 (VER. 3)

A19

8088
Minimum
Mode

A18
:
A0

A18
:
A0

D7

D7

:
D0

:
D0

MEMR

RD

MEMW

WR
CS

512KB

A17

B NH GM 4 CHIP
256KX8

A0
D7
:

D0
RD
WR
A19
A18

CS

A17

A17

A0
D7
:

D0
MEMR
MEMW

8088
Minimum
Mode

256KB
#4

A0
D7
:

D0
RD
WR

256KB
#3

CS
A17
:

A0
D7
:

D0
RD
WR

256KB
#2

CS
A17
:

A0
D7
:

D0
RD
WR
CS

256KB
#1

A17

B NH GM 4 CHIP
256KX8

A0
D7
:

D0
RD
WR
A19
A18

CS

A17

A17

A0
D7
:

D0
MEMR
MEMW

8088
Minimum
Mode

256KB
#4

A0
D7
:

D0
RD
WR

256KB
#3

CS
A17
:

A0
D7
:

D0
RD
WR

256KB
#2

CS
A17
:

A0
D7
:

D0
RD
WR
CS

256KB
#1

DI A CH CA CHIP #1
A19 AAAA
n 1111
A0
9876
(HEX)

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

----- ----

----

----

----

----

----- ----

----

----

----

----

DI A CH CA CHIP #2
A19 AAAA
n 1111
A0
9876
(HEX)

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

----- ----

----

----

----

----

----- ----

----

----

----

----

DI A CH CA CHIP #3
A19 AAAA
n 1111
A0
9876
(HEX)

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

----- ----

----

----

----

----

----- ----

----

----

----

----

DI A CH CA CHIP #4
A19 AAAA
n 1111
A0
9876
(HEX)

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

----- ----

----

----

----

----

----- ----

----

----

----

----

B NH GM 4 CHIP
256KX8
DNG CC CNG LOGIC

A17
:

A0
D7
:

D0
RD
WR
A19
A18

CS

A17

A17

A0
D7
:

D0
MEMR
MEMW

8088
Minimum
Mode

256KB
#4

A0
D7
:

D0
RD
WR

256KB
#3

CS
A17
:

A0
D7
:

D0
RD
WR

256KB
#2

CS
A17
:

A0
D7
:

D0
RD
WR
CS

256KB
#1

B NH GM 4 CHIP
256KX8
DNG CC CNG LOGIC

A17
:

A0
D7
:

D0
RD
WR
A19
A18

CS

A17

A17

A0
D7
:

D0
MEMR
MEMW

8088
Minimum
Mode

256KB
#4

A0
D7
:

D0
RD
WR

256KB
#3

CS
A17
:

A0
D7
:

D0
RD
WR

256KB
#2

CS
A17
:

A0
D7
:

D0
RD
WR
CS

256KB
#1

B NH GM 4 CHIP
256KX8
DNG MT CHIP GII M 2-4

A17
:

A0
D7
:

D0
RD
WR

A19
A18

I1
I0

O3

A17

CS
A17

A0
D7

A0
D7

D0
MEMR
MEMW

8088
Minimum
Mode

256KB
#4

D0
RD
WR
O2

256KB
#3

CS
A17
:

A0
D7
:

D0
RD
WR
O1

256KB
#2

CS
A17
:

A0
D7
:

D0
RD
WR
O0

CS

256KB
#1

A12
:

GHP NI CC
CHIP NH 8KX8
VI P 8088

A19
A18
A17
A16
A15
A14
A13

A0
D7
:

D0
RD
WR

8KB
#?

CS

A12

:
:

A0
D7
:

D0
MEMR
MEMW

8088
Minimum
Mode

A12
:

A0
D7
:

D0
RD
WR

8KB
#2

CS
A12
:

A0
D7
:

D0
RD
WR
CS

8KB
#1

A12
:

B NH GM 128
CHIP 8KX8

A19
A18
A17
A16
A15
A14
A13

A0
D7
:

D0
RD
WR

8KB
#128

CS

A12

:
:

A0
D7
:

D0
MEMR
MEMW

8088
Minimum
Mode

A12
:

A0
D7
:

D0
RD
WR

8KB
#2

CS
A12
:

A0
D7
:

D0
RD
WR
CS

8KB
#1

A12
:

B NH GM 128
CHIP 8KX8

A19
A18
A17
A16
A15
A14
A13

A0
D7
:

D0
RD
WR

8KB
#128

CS

A12

:
:

A0
D7
:

D0
MEMR
MEMW

8088
Minimum
Mode

A12
:

A0
D7
:

D0
RD
WR

8KB
#2

CS
A12
:

A0
D7
:

D0
RD
WR
CS

8KB
#1

DI A CH CA CHIP #__
A19 AAAA
n 1111
A0
9876
(HEX)

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

----- ----

----

----

----

----

----- ----

----

----

----

----

A12
:

B NH GM 128
CHIP 8KX8

A19
A18
A17
A16
A15
A14
A13

A0
D7
:

D0
RD
WR

8KB
#128

CS

A12

:
:

A0
D7
:

D0
MEMR
MEMW

8088
Minimum
Mode

A12
:

A0
D7
:

D0
RD
WR

8KB
#2

CS
A12
:

A0
D7
:

D0
RD
WR
CS

8KB
#1

PHT BIU BI TON

Thit k b nh cho h vi x l 8088 tho mn cc

yu cu:
ROM c dung lng 2Kx8 chim dng cc a ch
t FFFFFh tr xung
RWM c dung lng 2Kx8 chim dng cc a ch
tip theo ngay sau ROM
Ch c php s dng:
EPROM 2716 2Kx8, SRAM 4016 2Kx8
Chip gii m 74LS138 v cc cng logic

BC 1: V BN B NH CN THIT K
FFFFFh

ROM

2K

FF800h
FF7FFh

RWM

Cc a ch
bin

2K

FF000h

Cha s dng
00000h

BC 2: CHUYN CC A CH BIN T H
SANG B
A19
n
A0
(HEX)
FF800

AAAA
1111
9876

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

1111

1111

1000

0000

0000

FFFFF

1111

1111

1111

1111

1111

BC 2: CHUYN CC A CH BIN T H SANG B

A19
n
A0
(HEX)
FF000

AAAA
1111
9876

AAAA
1111
5432

AAAA
1198
1000

AAAA
7654

AAAA
3210

1111

1111

0000

0000

0000

FF7FF

1111

1111

0111

1111

1111

NHN XT
Khi cc a ch dnh cho ROM c pht ln
A-Bus: A19 A12 = 1 v A11 = 1
Khi cc a ch dnh cho RWM c pht ln
A-Bus: A19 A12 = 1 v A11 = 0

BC 3: V MCH GII M A
CH B NH
Ghp cc chn d liu ca cc chip nh vi
D-Bus
Ghp cc chn a ch v cc chn iu
khin:
Khi vi x l truy cp cc cng I/O th cc chip
nh b cm (Khi IO/M = 1)
Khi vi x l truy cp b nh (IO/M = 0) th ch
c mt chip nh lm vic
C th c nhiu li gii khc nhau

74LS138: MT CHIP GII M 3-8

C
B
A

Y0
Y1
Y2
Y3
Y4
Y5

74LS138

G1
G2A
G2B

Y6
Y7

U1
74LS138
74LS138
A2
A1
A0
E3
E2
E1

Q7
Q6
Q5
Q4
Q3
Q2
Q1
Q0

B NH CN THIT K
A11
:

A19
A18
A17
:

A0
D7
:

D0
MEMR
MEMW

8088
Minimum
Mode

C
B
A
74LS138

G1
G2A
G2B

Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7

A0
D7
:

D0
OE
WE

2Kx8
4016

CS

A11
:

A0
D7
:

D0
OE
CE

2Kx8
2716