Module 1: VLSI System Design & Design Flows Introduction VLSI Design Cycle Front end Design Flow

low & Back end Design Flow What is ASIC & FPGA FPGA Design Flow & ASIC Design Flow Module 2: Digital System Design & Applications What is Digital & Analog What is system Introduction to Digital System Design Combinational Logic Design Sequential Logic Design o Synchronous Logic Design o Asynchronous logic Design Simplification in Combinational & Sequential Design Exercise Advanced Digital Design Memory Device (RAM, ROM, SRAM, DRAM) Module 3: Hardware Description Language (HDL) Introduction & Importance of HDL HDL vs. High Level Languages Module 4: Logic Design using VHDL / Designing Methodologies using VHDL VHDL Introduction, Basic Language elements. Design constructs, Modeling styles

 when to use which models, Advanced VHDL Module 5: Mini project using VHDL Module 6: CMOS Logic Circuit Design Introduction to FET, PMOS, NMOS, CMOS Physics and Modelings of MOSFET Fabrication layout of CMOS ICs The CMOS inverter: Analysis & Design Switching Properties of MOSFET Static Logic Gates Dynamic Logic circuit concepts Module 7: Logic Design using Verilog / Design Methodologies Verilog Verilog Introduction, Basic Language elements. Design constraints, Modules & Ports modeling styles in Verilog Tasks & Functions Advanced Verilog Topics Module 8: Designing Strategies Emphasis on Simulation & Synthesis Issues RTL Design Strategies (VHDL & Verilog) Static Timing Analysis (STA) Module 9: Programmable Logic Devices (PLDs) & Field Programmable Gate Arrays (FPGA) Introduction to Programmable Logic Devices Study of PLDs, CPLDs

 Introduction to FPGA Design Flow & Overview FPGA Implementation(Board Level Explanation) FPGA Implementation of Mini Projects Module 10: Scripting Languages & Perl Module 11: Verification Introduction & Importance Verification Methodologies Module 12: Verification using System Verilog