ELE 2110A Electronic Circuits

Week 8: MOSFET I-V Characteristics, DC Analysis and Small Signal Model

ELE2110A 2008

Lecture 07 - 1

Topics to cover
MOSFET Non-ideal I-V Characteristics P-channel Devices and Other types DC Analysis of MOSFET circuits MOSFET Small Signal Model
Reading Assignment:
Chap 4.1 - 4.4, 4.9 and 13.8 of Jaeger and Blalock or Chap 4.1 - 4.6 of Sedra & Smith
ELE2110A 2008

Lecture 07 - 2

Summary of NMOS I-V Characteristics

Region Conditions Cutoff Triode Saturation

v GS < V t
W iD = K 'n L

vGS Vt

v DS < v GS V t
iD = 0

v DS v GS V t

I-V relation

1 W 1 2 iD = K 'n ( vGS Vt ) 2 ( vGS Vt ) v DS v DS 2 L 2

Cutoff region Triode region

vGS < Vt

K n ' = nCox

v GS V t

and

v DS < v GS V t
Saturation region

v GS V t
ELE2110A 2008

and

v DS v GS V t
Lecture 07 - 3

Ideal Characteristics of ID vs VDS

NMOS

ELE2110A 2008

Lecture 07 - 4

Non-ideal I-V Characteristics

Finite Output Resistance in Saturation The role of the Body Temperature Effects Breakdown and Input Protection

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Lecture 07 - 5

Channel-Length Modulation
At vDS=vGS-VTN=VDSsat,
Channel pinch-off

As vDS increases beyond vDSsat, the pinch-off point moves away from D towards S
where gate-to-channel voltage = VTN Effective channel length L is reduced, or that channel length is modulated by VDS. ID increases with VDS. Output resistance is finite in saturation mode.

i = D

' Kn W

v V TN 2 L GS

ELE2110A 2008

Lecture 07 - 6

Channel-Length Modulation
This effect is modeled by adding a term (1+vDS) to the I-V equation:

i = D

' Kn W 2 L

v V GS TN

2 1+ v

DS

= channel length
modulation parameter

ELE2110A 2008

Lecture 07 - 7

The Role of Body - Body Effect

Channel-body can be regarded as a pn junction If channel-body junction is reverse-biased,

Depletion layer beneath the gate oxide becomes wider Since the amount of negative charges in the ( channel + depletion ) layer = amount of positive charges in the gate (Constant for a fixed gate-source voltage) Channel depth is reduced This is equivalent to an increase in the threshold voltage
ELE2110A 2008

Lecture 07 - 8

Body Effect
Non-zero vSB changes threshold voltage:
V =V + v + 2 2 TN TO SB F F

where VTO= zero substrate bias for VTN (V) = body-effect parameter ( V ) 2F= surface potential parameter (V)

(source-body voltage)

It follows that the body voltage controls iD. This phenomenon is known as the body effect.
ELE2110A 2008

Lecture 07 - 9

Temperature Effects
Vt and mobility are sensitive to temperature:
Vt decreases by 2mV for every 1C rise in temperature mobility decreases with temperature

Overall, increase in temperature results in lower drain currents

ELE2110A 2008

Lecture 07 - 10

Avalanche Breakdown

As VD is increased, the drain-body junction becomes reversed biased Breakdown occurs at voltages of 20 to 150V Rapid increase in the drain current Normally, no permanent damage to the device

ELE2110A 2008

Lecture 07 - 11

Punch-through Breakdown

Whe VD is increased to a point, the depletion region surrounding D extends to the S Punch-through breakdown (about 20 V) Occurs in devices with short channels Normally, no permanent damage to the device

ELE2110A 2008

Lecture 07 - 12

Gate-Oxide Breakdown

When VGS exceeds about 30 V (or lower in modern IC technology) Gate oxide breaks down like in the case of a capacitor Results in permanent damage to the device

ELE2110A 2008

Lecture 07 - 13

Input Protection

Input Pin

to gates

Since the MOSFET has a very small input capacitance and a very high input resistance, a small amount of static charges accumulating on the gate can cause the gate voltage to exceed the breakdown level
e.g., Electrostatic Discharge (ESD) from human body

Clamping diodes can be used in the I/O pins to protect the circuit from gate-oxide breakdown
ELE2110A 2008

Lecture 07 - 14

Topics to cover
MOSFET Non-ideal I-V Characteristics P-channel Devices and Other types DC Analysis of MOSFET circuits MOSFET Small Signal Model

ELE2110A 2008

Lecture 07 - 15

P-channel MOSFET (PMOS)

Similar to NMOS, but doping and voltages reversed
Body tied to highest voltage (Vdd) to prevent forward-biasing pn junctions Source typically tied to Vdd too Gate voltage high: transistor is OFF Gate voltage low: transistor is ON when VGS < Vt (threshold voltage)
Inverted channel of positively charged holes

vGS and vDS are negative and Vt is also negative

Symbols

ELE2110A 2008

Lecture 07 - 16

PMOS I-V Characteristics

Cutoff region | vGS |<| Vt | Triode region

| v GS | | V t |
Saturation region

and

| v DS |< | v GS V t |
| v GS | | V t | and

Vt, vGS and vDS are negative.

Cutoff Triode/Linear

| v DS | | v GS V t |
Saturation

iD = 0

1 2 i D = K p ( vGS Vt ) v DS v DS 2
W , K p ' = p Cox L

iD =

1 K p ( vGS Vt ) 2 2

where K p = K p '
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p is typically 2 to 3 times lower than n

Lecture 07 - 17

Complementary MOS (CMOS) Technology

PMOS transistor is fabricated in the n well

Complementary MOS or CMOS integrated-circuit technologies provide both NMOS and PMOS on a same IC

ELE2110A 2008

Lecture 07 - 18

Depletion-mode MOSFET
A depletion-type MOSFET has a built-in channel by fabrication
It is ON when no gate-source voltage is applied Must apply a negative vGS to turn off device

Vt is negative for NMOS

enhancement

depletion

ELE2110A 2008

Lecture 07 - 19

MOSFET Circuit Symbols

(g) and(i) are the most commonly used symbols in VLSI logic design. MOS devices are symmetric. In NMOS, n+ region at higher voltage is the drain. In PMOS p+ region at lower voltage is the drain

ELE2110A 2008

Lecture 07 - 20

Topics to cover
MOSFET Non-ideal I-V Characteristics P-channel Devices and Other types DC Analysis of MOSFET circuits MOSFET Small Signal Model

ELE2110A 2008

Lecture 07 - 21

DC Analysis Approach
Assume an operation mode (usually the saturation mode) Use circuit analysis to find VGS Use VGS to calculate ID, and ID to find VDS Check validity of operation region assumptions Change assumptions and analyze again if required.

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Lecture 07 - 22

Example 1
Problem: Find Q-pt (ID, VDS) Assumption: Transistor is saturated. Analysis: Simplify the circuit,

Thevenin Equivalent

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Lecture 07 - 23

Example 1

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Lecture 07 - 24

Example 2

Problem: Find Q-pt (ID, VDS) Assumption: Transistor is saturated (since VDS= VGS)

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Lecture 07 - 25

Example 3

Problem: Find Q-pt (ID, VDS) Assumption: transistor is saturated

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Lecture 07 - 26

Example 4 (PMOS)

Problem: Find Q-pt (ID, VDS) Assumption: transistor is saturated (since VDS= VGS)

ELE2110A 2008

Lecture 07 - 27

Current Mirror
Current Mirror is an important building block in IC amplifiers.

As Q1 must be in saturation mode,

If Q2 operates in saturation,

If (W/L)2=(W/L)1, IO=IREF, output mirrors the input. Note that channel modulation effect is neglected.

ELE2110A 2008

Lecture 07 - 28

Current Steering Circuit

Once a constant current is generated, it can be replicated to provide dc bias currents for the various amplifier stages in an IC. Assume Q2, Q3 and Q5 are in active mode.
I 2 = I REF I 3 = I REF (W / L) 2 (W / L)1 (W / L) 3 (W / L)1
Current Source Current Sink

I5 = I 4

(W / L) 5 (W / L) 4

where

I 4 = I3

ELE2110A 2008

Lecture 07 - 29

Topics to cover
MOSFET Non-ideal I-V Characteristics P-channel Devices and Other types DC Analysis of MOSFET circuits MOSFET Small Signal Model

ELE2110A 2008

Lecture 07 - 30

Big Picture: Large Signal Analysis

For the conceptual MOSFET amplifier shown right,
vGS = VGS + v gs
iD = 1 W (VGS + v gs Vt ) 2 kn 2 L 1 W 1 W 2 W (VGS Vt ) 2 + k n (VGS Vt ) v gs + k n v gs = kn 2 2 L L L
1 W 2 W kn v gs << k n (VGS Vt ) v gs 2 L L

For small input signal that which results in

v gs << 2 (VGS Vt )

Vgs<0.2(VGS - Vt) is commonly required.

we obtain,

iD =

1 W W kn (VGS Vt ) 2 + k n (VGS Vt ) v gs 2 L L 4 1 4 4 2 4 44 1 4 4 2 4 44 4 3 3
ID id

ELE2110A 2008

Lecture 07 - 31

Small Signal Transconductance gm

W 1 W 2 iD = k n (VGS Vt ) + k n (VGS Vt ) v gs 2 L L 4 1 4 4 2 4 44 1 4 4 2 4 44 4 3 3
ID id

gm

iD vGS

vGS =VGS

id W (VGS Vt ) gm = = kn v gs L
Graphic interpretation:

ELE2110A 2008

Lecture 07 - 32

Small Signal Model

MOSFET small signal model

iD gm vGS

v GS =VGS
1

id W = = kn (VGS Vt ) v gs L

iD 1 + VDS 1 = r0 vDS v = V I D I D GS GS
ro is output resistance due to channel length modulation effect.

ELE2110A 2008

Lecture 07 - 33

Observations on Transconductance
Formula 1: It shows:

g m = kn

W (VGS Vt ) L

Reference equations:

gm k, W/L, and (VGS Vt )

1 W 2 I D = k 'n (VGS Vt ) 2 L

For BJT:

(VGS Vt ) =
ID

2I D W k 'n L

gm =

IC VT

Formula 2:

gm =

2kn

W L

Formula 3:

It shows: (1) For a given MOSFET,

gm =

(VGS

ID Vt ) / 2

gm

ID

(2) At a given bias current,

The gm of MOSFET is much small than that of BJT for that the values of (VGS-Vt)/2 are at least 0.1V or so. In spite of their low gm, MOSFETs have many other advantages, such as high Rin, small size, low power dissipation and ease of fabrication.

g m W/L
In contrast, the gm of BJT IC and is independent of the geometry.
ELE2110A 2008

Lecture 07 - 34

Modeling the Body Effect

S-to-B voltage affects threshold voltage and in turn the drain current This effect can be modeled by adding a back-gate transconductance:

mb v

D
Q po int

i v

BS

SB Q po int

i = D V TN

V TN v SB

= gm Q po int

0<<1 is called back-gate transconductance parameter.

Body terminal is a reverse-biased diode. Hence, no current flows through it.

ELE2110A 2008

Lecture 07 - 35