Professional Documents
Culture Documents
IRF530N
IRF530N
Features
Ultra Low On-Resistance - rDS(ON) = 0.064, VGS = 10V Simulation Models - Temperature Compensated PSPICE and SABER Electrical Models - Spice and SABER Thermal Impedance Models - www.fairchildsemi.com Peak Current vs Pulse Width Curve UIS Rating Curve
DRAIN (FLANGE)
IRF530N
Symbol
D
Ordering Information
PART NUMBER IRF530N
G
PACKAGE TO-220AB
BRAND IRF530N
TC = 25oC, Unless Otherwise Specied IRF530N UNITS V V V A A 100 100 20 22 15 Figure 4 Figures 6, 14, 15 85 0.57 -55 to 175 300 260 W W/oC
oC oC oC
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Drain Current Continuous (TC= 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Continuous (TC= 100oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .UIS Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL Package Body for 10s, See Techbrief TB334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg NOTES: 1. TJ = 25oC to 150oC.
CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specication is not implied.
IRF530N Rev. B
IRF530N
Electrical Specications
PARAMETER OFF STATE SPECIFICATIONS Drain to Source Breakdown Voltage Zero Gate Voltage Drain Current BVDSS IDSS IGSS VGS(TH) rDS(ON) RJC RJA ID = 250A, VGS = 0V (Figure 11) VDS = 95V, VGS = 0V VDS = 90V, VGS = 0V, TC = 150oC Gate to Source Leakage Current ON STATE SPECIFICATIONS Gate to Source Threshold Voltage Drain to Source On Resistance THERMAL SPECIFICATIONS Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient TO-220 1.76 62
oC/W oC/W
TC = 25oC, Unless Otherwise Specied SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
100 -
V A A nA
VGS = 20V VGS = VDS, ID = 250A (Figure 10) ID = 22A, VGS = 10V (Figure 9)
2 -
0.054
SWITCHING SPECIFICATIONS (VGS = 10V) Turn-On Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-Off Time GATE CHARGE SPECIFICATIONS Total Gate Charge Gate Charge at 10V Threshold Gate Charge Gate to Source Gate Charge Gate to Drain "Miller" Charge CAPACITANCE SPECIFICATIONS Input Capacitance Output Capacitance Reverse Transfer Capacitance CISS COSS CRSS VDS = 25V, VGS = 0V, f = 1MHz (Figure 12) 790 215 70 pF pF pF Qg(TOT) Qg(10) Qg(TH) Qgs Qgd VGS = 0V to 20V VGS = 0V to 10V VGS = 0V to 2V VDD = 50V, ID = 22A, Ig(REF) = 1.0mA (Figures 13, 16, 17) 43 23 1.7 3.5 8.7 52 28 2 nC nC nC nC nC tON td(ON) tr td(OFF) tf tOFF VDD = 50V, ID = 22A VGS = 10V, RGS = 13 (Figures 18, 19) 7.9 42 47 39 75 130 ns ns ns ns ns ns
IRF530N Rev. B
25
20 VGS = 10V 15
10
175
2 1 THERMAL IMPEDANCE ZJC, NORMALIZED DUTY CYCLE - DESCENDING ORDER 0.5 0.2 0.1 0.05 0.02 0.01 PDM 0.1 t1 t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJC + TC 10-3 10-2 t, RECTANGULAR PULSE DURATION (s) 10-1 100 101
300 TC = 25oC FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT AS FOLLOWS: 100 I = I25 VGS = 10V 175 - TC 150
TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION 10 10-5 10-4 10-3 10-2 t, PULSE WIDTH (s) 10-1 100 101
IRF530N Rev. B
(Continued)
100
100
100s 10 OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 1 1 10 VDS, DRAIN TO SOURCE VOLTAGE (V)
10 0.001
0.01
0.1
NOTE: Refer to Application Notes AN9321 and AN9322. FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
40
VGS = 7V VGS = 6V
30
20 TJ = 175oC 10
20
VGS =5V
TJ = -55oC TJ = 25oC
10
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX TC = 25oC 0 1 2 3 VDS, DRAIN TO SOURCE VOLTAGE (V) 4
3.0 NORMALIZED DRAIN TO SOURCE ON RESISTANCE PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 2.5
2.0 1.5 1.0 0.5 0 -80 -40 0 40 80 120 TJ, JUNCTION TEMPERATURE (oC) 160 200
1.0
0.8
0.6 -80 -40 0 40 80 120 160 200 TJ, JUNCTION TEMPERATURE (oC)
(Continued)
1.1
1.0
20 0.1
1.0
10
100
VDD = 50V 8
NOTE: Refer to Application Notes AN7254 and AN7260. FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT
0V
IAS 0.01
0 tAV
IRF530N Rev. B
Qg(TOT)
Qg(10) VDD VGS VGS = 2V 0 Qg(TH) Qgs Ig(REF) 0 Qgd VGS = 10V
DUT Ig(REF)
VDS
90%
VGS
VDD DUT 0
10% 90%
10%
IRF530N Rev. B
RSLC2
5 51
IT 8 17 1 LDRAIN 2 5 1.0e-9 LGATE 1 9 5.53e-9 LSOURCE 3 7 4.35e-9 MMED 16 6 8 8 MMEDMOD MSTRO 16 6 8 8 MSTROMOD MWEAK 16 21 8 8 MWEAKMOD RBREAK 17 18 RBREAKMOD 1 RDRAIN 50 16 RDRAINMOD 2.70e-2 RGATE 9 20 2.50 RLDRAIN 2 5 10 RLGATE 1 9 55.3 RLSOURCE 3 7 43.5 RSLC1 5 51 RSLCMOD 1e-6 RSLC2 5 50 1e3 RSOURCE 8 7 RSOURCEMOD 1.77e-2 RVTHRES 22 8 RVTHRESMOD 1 RVTEMP 18 19 RVTEMPMOD 1 S1A S1B S2A S2B 6 12 13 8 S1AMOD 13 12 13 8 S1BMOD 6 15 14 13 S2AMOD 13 15 14 13 S2BMOD
VBAT 22 19 DC 1 ESLC 51 50 VALUE={(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)/(1e-6*43.5),3.5))} .MODEL DBODYMOD D (IS = 6.0e-13 RS = 6.2e-3 XTI = 5.5 TRS1 = 2.1e-3 TRS2 = 2.0e-6 CJO = 8.50e-10 TT = 6.30e-8 M = 0.54) .MODEL DBREAKMOD D (RS = 5.6e-1 TRS1 = 8e-4 TRS2 = 3e-6) .MODEL DPLCAPMOD D (CJO = 9.29e-10 IS = 1e-30 M = 0.79) .MODEL MMEDMOD NMOS (VTO = 3.21 KP = 5 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 2.50) .MODEL MSTROMOD NMOS (VTO = 3.60 KP = 37 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL MWEAKMOD NMOS (VTO = 2.77 KP = 0.09 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u RG = 25.0 ) .MODEL RBREAKMOD RES (TC1 =1.05e-3 TC2 = -5e-7) .MODEL RDRAINMOD RES (TC1 = 1.20e-2 TC2 = 3.00e-5) .MODEL RSLCMOD RES (TC1 = 3.20e-3 TC2 = 3.00e-6) .MODEL RSOURCEMOD RES (TC1 = 1e-3 TC2 = 1e-6) .MODEL RVTHRESMOD RES (TC1 = -2.20e-3 TC2 = -9.00e-6) .MODEL RVTEMPMOD RES (TC1 = -2.40e-3 TC2 =1.80e-6) .MODEL S1AMOD VSWITCH (RON = 1e-5 .MODEL S1BMOD VSWITCH (RON = 1e-5 .MODEL S2AMOD VSWITCH (RON = 1e-5 .MODEL S2BMOD VSWITCH (RON = 1e-5 .ENDS ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 ROFF = 0.1 VON = -6.2 VOFF= -3.1) VON = -3.1 VOFF= -6.2) VON = -1.0 VOFF= 0.5) VON = 0.5 VOFF= -1.0)
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records, 1991, written by William J. Hepp and C. Frank Wheatley.
RDRAIN 21 16
DBODY
MWEAK MMED
RBREAK 18 RVTEMP 19
VBAT +
8 22 RVTHRES
IRF530N Rev. B
LDRAIN 5 RLDRAIN RDBREAK 72 DBREAK 11 MWEAK MMED MSTRO 8 EBREAK + 17 18 71 RDBODY DRAIN 2 RSLC1 51
50 RDRAIN 21 16
DBODY
m.mmed n16 n6 n8 n8 = model=mmedmod, l=1u, w=1u m.mstrong n16 n6 n8 n8 = model=mstrongmod, l=1u, w=1u m.mweak n16 n21 n8 n8 = model=mweakmod, l=1u, w=1u res.rbreak n17 n18 = 1, tc1 = 1.05e-3, tc2 = -5.0e-7 res.rdbody n71 n5 = 6.2e-3, tc1 = 2.10e-3, tc2 = 2.0e-6 res.rdbreak n72 n5 = 5.6e-1, tc1 = 8.0e-4, tc2 = 3.0e-6 res.rdrain n50 n16 = 2.70e-2, tc1 = 1.20e-2, tc2 = 3.00e-5 res.rgate n9 n20 = 2.50 res.rldrain n2 n5 = 10 res.rlgate n1 n9 = 55.3 res.rlsource n3 n7 = 43.5 res.rslc1 n5 n51 = 1e-6, tc1 = 3.2e-3, tc2 = 3.0e-6 res.rslc2 n5 n50 = 1e3 res.rsource n8 n7 = 1.77e-2, tc1 = 1e-3, tc2 = 1e-6 res.rvtemp n18 n19 = 1, tc1 = -2.4e-3, tc2 = 1.8e-6 res.rvthres n22 n8 = 1, tc1 = -2.2e-3, tc2 = -9.0e-6 spe.ebreak n11 n7 n17 n18 = 117.8 spe.eds n14 n8 n5 n8 = 1 spe.egs n13 n8 n6 n8 = 1 spe.esg n6 n10 n6 n8 = 1 spe.evtemp n20 n6 n18 n22 = 1 spe.evthres n6 n21 n19 n8 = 1 sw_vcsp.s1a n6 n12 n13 n8 = model=s1amod sw_vcsp.s1b n13 n12 n13 n8 = model=s1bmod sw_vcsp.s2a n6 n15 n14 n13 = model=s2amod sw_vcsp.s2b n13 n15 n14 n13 = model=s2bmod v.vbat n22 n19 = dc=1 equations { i (n51->n50) +=iscl iscl: v(n51,n50) = ((v(n5,n51)/(1e-9+abs(v(n5,n51))))*((abs(v(n5,n51)*1e6/43.5))** 3.5)) } }
S1A 12 13 8 S1B CA 13 + EGS 6 8 S2A 14 13 S2B
LSOURCE 7 RLSOURCE
SOURCE 3
15
VBAT +
8 RVTHRES
22
IRF530N Rev. B
RTHERM1
CTHERM1
RTHERM2
CTHERM2
RTHERM3
CTHERM3
RTHERM4
CTHERM4
RTHERM5
CTHERM5
RTHERM6
CTHERM6
tl
CASE
IRF530N Rev. B
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx Bottomless CoolFET CROSSVOLT DenseTrench DOME EcoSPARK E2CMOSTM EnSignaTM FACT FACT Quiet Series
DISCLAIMER
FAST FASTr FRFET GlobalOptoisolator GTO HiSeC ISOPLANAR LittleFET MicroFET MicroPak MICROWIRE
OPTOLOGIC OPTOPLANAR PACMAN POP Power247 PowerTrench QFET QS QT Optoelectronics Quiet Series SILENT SWITCHER
SMART START STAR*POWER Stealth SuperSOT-3 SuperSOT-6 SuperSOT-8 SyncFET TinyLogic TruTranslation UHC UltraFET
VCX
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. H4
This datasheet has been download from: www.datasheetcatalog.com Datasheets for electronics components.