EEN1036 DIGITAL LOGIC DESIGN Assignment (15%) Question 1 (5%) Given

f ( A, B, C , D, E ) = m(0,1,3,9,15,23,31) + d (2,11,14 )

Find the minimum SOP expression using Quine-McCluskey tabular method. Note that A is the most significant bit whereas E is the least significant bit.

Question 2 (15%) Design a digital system consisting of a 4-bit Arithmetic Logic Unit (ALU) module that performs some arithmetic and logical operations on two 4-bit binary inputs, and shows the outputs on the Light-Emitting Diode (LED) and 7-segment displays. A possible layout of such system is illustrated in the following block diagram.

Figure Q2.1

A list of available arithmetic and logical operations are given below: Arithmetic Operation Description A1) A + B Addition A2) A - B Subtraction A3) B A Subtraction A4) A + 1 Increment A5) A - 1 Decrement A6) B + 1 Increment A7) B - 1 Decrement Logic Operation L1) A B L2) A + B L3) A B L4) A + B L5) A B L6) A L7) A B Description AND OR XOR NOR NAND NOT XNOR

Based on the last digit of the assigned group number X, different set of operations are to be designed as follows:

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Trimester 2, 2010/2011

0 A1 A2 A3 A4 L1 L2 L3 L4

1 A1 A2 A4 A5 L6 L3 L4 L1

2 A3 A2 A1 A6 L2 L6 L5 L1

Last digit of the group number, X 3 4 5 6 A1 A4 A3 A2 A3 A5 A2 A1 A5 A1 A5 A7 A6 A3 A6 A6 L2 L1 L4 L5 L6 L2 L5 L6 L7 L7 L1 L3 L3 L5 L3 L2

7 A4 A6 A1 A2 L3 L2 L7 L4

8 A3 A1 A6 A7 L1 L5 L3 L6

9 A6 A7 A1 A2 L5 L2 L1 L4

For instance, for X = 0, the following function table shows how the selection code S = S2S1S0 determines the operation to be performed on the two 4-bit binary numbers A = A3A2A1A0 and B = B3B2B1B0 to produce a 4-bit result F = F3F2F1F0. Selection code S1 S0 0 0 0 1 1 0 1 1 0 0 0 1 1 0 1 1 Operation A+B A-B B-A A+1 A B A+ B AB A+ B Description Addition Subtraction Subtraction Increment by 1 AND OR XOR NOR

S2 0 0 0 0 1 1 1 1

For arithmetic operations, signed numbers are expected. Note that an overflow indicator output Ov should be included so that any overflow conditions can be detected. The system design must be done using an appropriate Computer-aided Design (CAD) software. The completed system should be simulated and analyzed to verify that the tasks are performed correctly. Two sample results (one for each arithmetic and logical operations) should be included in the Result and Discussion section. Any assumptions and limitations should be stated clearly. Any special or advanced features of the design may be highlighted. Recommendations for further system improvements may also be included in the report.

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Question 3 (10%) *Answer one of the following. 3.1 Design a counter to produce the following sequence. Use JK flip-flops. 00, 10, 01, 11, 00 3.2 Design a counter to produce the following sequence. Use JK flip-flops. 1, 4, 3, 5, 7, 6, 2, 1 3.3 Design a counter to produce the following sequence. Use JK flip-flops. 0, 9, 1, 8, 2, 7, 3, 6, 4, 5, 0 3.4 Design an Up/Down counter to produce the following sequence. Use JK flip-flops. 0, 1, 2, 3, 4, 5, 4, 3, 2, 3, 4, 5, 6, 7, 6, 5 { up } {down }{ up }{down} 3.5 Design a binary counter with a sequence shown in the state diagram below. Use JK flipflops.

Report should include the following: - Complete design procedure (Handwritten) - Source codes - Simulation results.
* Group members name, ID and the selected question number should be emailed before Week 8 Friday. Each question is limited to 15 groups. For the late registration groups the choices are Q3.4 and Q3.5.

Instructions to students 1. Form a group of 3 from the same major of study (i.e., RE, TE, BE). 2. Email choice of Question 3 to Madam Bhuvaneswari by 17 Dec. 2010 (Week 8, Friday) to have a group number to be assigned. 3. Indicate your group number, members name, ID and major of study clearly on the front cover of the report. 4. Any reports showing evidence of copying or plagiarism will be severely penalized. 5. Submit your report to the subject tutor by 14 Jan. 2011 (Week 12, Friday), 5pm.

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