Handbook 1 B.tech Ece III Sem Quantity 180

(STUDENTS HANDBOOK)
FOR B.TECH ECE II YEAR- III Semester [Session- 2012-2013]
(Authorized proprietary of)

Student Information Cell, Dev Bhoomi Group of Institutions Manduwala, Chakrata Road(Navgaon)- Dehradun(Uttrakhand)-248001 Phone No: (0135)-2694241,42,43,44 Fax: (0135)-2694245 Website: http://www.dbgidoon.com Email: dbitdoon@rediffmail.com
OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM
Page 1
Dev Bhoomi Group of Institutions, Dehradun

FOREWORD Dear Student, We, at DBGI, are committed to facilitate all aspiring students in their selection of different streams of Batch. By putting our efforts in terms of commitment, providing the services of quality and skill oriented education. The exponential expansion in the field of technology has offered a plethora of job opportunities in emerging sectors. It has also resulted in innumerable demand for qualified skilled manpower in these sectors. At this crossroads of your life where a wrong turn can take you miles away from your goal. Choosing your career path is an important step because your future is at stake. It is generally observed that a large section of students are unaware of what they want to achieve in their life. This amounts to a situation like boarding a train without knowing ones destination. Undoubtedly it may result in waste of precious time and money. Student Handbook is purposely designed for the students we have been planning for some time to provide collective information about academics as well as Institute to our new comers. It comprises complete information of syllabi of all subjects, Lecture Plans, rules and regulations, internal examinations, marking scheme, attendance, canteen and transport facility etc. However in addition to this, if students have any problem or query they can contact Student Information Cell. We are living in a competitive world; the key to edging out of competition is information and preparation. We hope that this booklet gives you enough leverage to understand about the institute and academics. Success to a large extent depends on your attitude which includes your sincerity and strong will to vigorously pursue your goal. Its your determination to fulfill the requirements that are needed to enable you achieve your goal. It means you have to acquire the required academic qualification and skills followed by professional qualification and training in your particular field. Once you have these, you will be able to compete.
With Best Wishes (Dev Bhoomi Group of Institutions)
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UTTARAKHAND TECHNICAL UNIVERSITY, DEHRADUN

STUDY AND EVALUATION SCHEME B Tech (ELECTRONICS & COMMUNICATION ENGINEERING)
Page 3
TCS-301 Computer Based Numerical Technique LTP 200
Unit-I Introduction: Numbers and their accuracy, Computer Arithmetic, Mathematical preliminaries, Errors and their Computation, General error formula, Error in a series approximation. Solution of Algebraic and Transcendental Equation: Bisection Method, Iteration method, Method of false position, Newton-Raphson method, Methods of finding complex roots, Mullers method, Rate of convergence of Iterative methods, Polynomial Equations Unit-II Interpolation: Finite Differences, Difference tables Polynomial Interpolation: Newtons forward and backward formula, Central Difference Formulae: Gauss forward and backward formula, Stirlings, Bessels, Everetts formula. Unit-III Numerical Integration and Differentiation: Introduction, Numerical differentiation Numerical Integration: Trapezoidal rule, Simpsons 1/3 and 3/8 rule, Booles rule, Waddles rule. Unit-IV Statistical Computation: Frequency chart, Curve fitting by method of least squares, fitting of straight lines, polynomials, exponential curves etc, Data fitting with Cubic splines, Regression Analysis, Linear and Non linear Regression, Multiple regression, Statistical Quality Control methods.
Reference Books: 1. Yang, Numerical Methods using MATLAB, Wiley 2. Gerald, Numerical Analysis, Prentice Hall
Page 4
TEC-301
ELECTRONIC DEVICES AND CIRCUIT Unit-I Crystal Properties and charge Carriers in Semiconductors: Elemental and compound semiconductor materials, crystal lattice structure Magnetic material:-Origin of magnetic dipoles in solids, permanent magnetic dipoles, diamagnetic paramagnetic, ferromagnetic antiferromagnetic and ferry-magnetic materials Unit-II Transistor amplifier Frequency response: Bipolar Transistor as amplifier, Ebers mole and h-parameter model high Frequency model) high frequency response of common source, common collector, common base, High frequency response of common source, common gate and common drain. Unit-III Feedback: Concept of feedback, classification feedback, Analysis of different type of feedback. Oscillators: Concept of oscillators, condition of oscillations, frequency and amplitude stability of oscillations, analysis of quartz, Hartely, colpitts, RC phase shift, Wein bridge and UJT oscillators. Unit-IV Multistage and Tuned Amplifiers: Introduction to multistage amplifiers, cascade amplifiers, coupling of amplifiers, direct coupled, differential coupling, and transformer coupled amplifier, Darlington amplifier and its analysis, bootstrapping, tuned and double tuned voltage amplifiers. Unit-V Multivibrator: Astable, mono-stable, and bi-stable multivibrators. Reference Books: 1. Electronic Devices Circuit, R K Singh & Lal Kishor, BS Publication, Hyderabad 2. Electronic Devices & Circuits, Maini, Wiley India 3. Boylestad, Electronic Devices and Circuit Theory, 10/e, Pearson 4. Donald A Neaman, Semiconductor Physics and Devices Basic Principles 3rd Ed TMH India.
Page 5
TEC 302
DIGITAL ELECTRONICS AND DESIGN ASPECT
Unit-I Introduction: Characteristics of digital system, Types of Digital circuits, Number system: Direct conversion between bases, Negative numbers & BCD and their arithmetics, Boolean algebra, Minimization of Boolean Functions: K Map up to 6 variables and multiple output circuits, Quine Mcclusky method, error detection & correcting codes, hamming & cyclic codes. (8) Unit-II Combinational Logic Circuits: Design Procedure, adders, subtractors & code conversion, Multiplexers/Demultiplexers, encoder/decoders, decimal adders & amplitude comparators, ROM as decoder, PLA & PAL. (7) Unit-III Sequential Logic Circuits: Flip-Flops and their conversions, analysis and synthesis of synchronous sequential circuit, excitation table, state table & diagram. Design of synchronous counters, shift registers and their applications, Finite State Machine (8) Unit-IV Logic Families: Diode, BJT & MOS as a switching element concept of transfer characteristics, Input characteristics and output characteristics of logic gates, TTL, Tristate logic, open collector output, IIL,ECL,NMOS,CMOS, Pass Transistor Logic Interfacing between logic families, packing density, power consumption & gate delay.(6) Unit-V Hazard and Fault Detection: Static and dynamic Hazard: Gate delay, Generation of spikes, Determination of hazard in combinational circuits, Fault detection methods: Fault Table & Path sensitizing methods. Memories: Sequential, Random Access, NMOS & CMOS Static and Dynamic Memory elements, one and multi-dimensional selection arrangement, Read-only memories, Formation of memory banks, internal & External address decoding (10) Reference Books: 1. Maini, Digital Electronics: Principles and Integrated Circuits, Wiley India 2. Digital Systems: Principles and Design, Raj Kamal, Pearson 3. M. Morris Mano and M. D. Ciletti, Digital Design, M. Morris Mano and M. D. Ciletti, 4th Edition, OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM Page 6
TEC 303
ELECTRONIC INSTRUMENTATION AND MEASUREMENTS Unit-I Unit, dimensions and standards: Scientific notations and metric prefixes. SI electrical units, SI temperature scales, other unit systems, dimension and standards. Measurement Errors: Gross error, systematic error, absolute error and relative error, accuracy, precision, resolution and significant figures, Measurement error combination, basics of statistical analysis. PMMC instrument, galvanometer, DC ammeter, DC voltmeter, series ohm meter. 9 Unit-II Transistor voltmeter circuits, AC electronic voltmeter, current measurement with electronic instruments, multimeter probes, Digital voltmeter systems, digital multimeters, digital frequency meter System, Voltmeter and ammeter methods, Wheatstone bridge, low resistance measurements, low resistance measuring instruments AC bridge theory, capacitance bridges, Inductance bridges, Q meter Unit-III Analog to digital converter: Transfer characteristics, A/D conversion technique: Simple potentiometer and servo method, successive approximation method ramp type, integrating and dual slope integrating method. D/A Converter: Transfer characteristic, D/A conversion technique, digital mode of operation, performance characteristics of D/A convertors. Display Devices: Alpha numeric display using LCD and LED Specification of digital meters, Display digits and count resolution, sensitivity, accuracy, speed and settling time etc. 9 Unit-IV CRO: CRT, wave form display, time base, dual trace oscilloscope, measurement of voltage, frequency and phase by CRO, Oscilloscope Probes, Oscilloscope specifications and performance. Delay time based Oscilloscopes, Sampling Oscilloscope, DSO, and DSO Applications Unit-V Signal generator and analyzer: Signal generator: Sine wave, non-sinusoidal signal and function generators, frequency synthesis techniques and digital signal generators Signal analyzers: Spectrum analyzer and distortion, Concept of ECG, EMI, EMC, EEG etc. Recorders: X-Y recorders, plotters Reference Books: 1. David A. Bell, Electronic Instrumentation and Measurements, 2nd Ed., PHI , New Delhi, 2008 2. Elements of Electronic Instrumentation and Measurement, 3/e, Carr. Pearson OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM Page 7
3. Oliver and Cage, Electronic Measurements and Instrumentation, TMH, 2009. 4. Alan S. Morris, Measurement and Instrumentation Principles, Elsevier (Buterworth Heinmann),
TEE 301
NETWORK ANALYSES AND SYNTHESIS Unit-I Graph Theory: Graph of a Network, definitions, tree, co tree, link, basic loop and basic cut set, Incidence matrix, cut set matrix, Tie set matrix Duality, Loop and Node methods of analysis. (8) Unit-II Network Theorems (Applications to ac networks): super-positio theorem, Thevenins theorem, Nortons theorem, maximum power transfer theorem, Reciprocity theorem. Millmans theorem, compensation theorem, Tellegens theorem. (8) Unit-III Network Functions: Concept of Complex frequency, Transform Impedances Network functions of one port and two port networks, concept of poles and zeros, properties of driving point and transfer functions, time response and stability from plot, frequency response and Bode plots. (9) Unit-IV Two Port Networks: Characterization of LTI two port networks , ZY, ABCD and hparameters, reciprocity and symmetry. Interrelationships between the parameters, interconnections of two port networks, Ladder and Lattice networks. T & Representation. (8) Unit-V Network Synthesis: Positive real function, definition and properties; Properties of LC, RC and RL driving point functions, synthesis of LC, RC and RL driving point immittance functions using Foster and Cauer first and second forms. (7) Reference Books: 1. Franklin F. Kuo, Network Analysis and synthesis, 2nd Edition, Wiley India 2. Network Analysis with Applications, 4/e (with CD), Stanley. pearson 3. Behrouz Peikari, Fundamentals of Network Analysis & synthesis, Jaico Publishing House, 2006. 4. M. E. Van Valkenberg, Network Analysis, 2nd Edition, Prentice Hall of India Ltd.Oliver and Cage, 5. N C Jagan, Network Analysis & Synthesis, B S Publication OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM Page 8
THU-301 ENGINEERING ECONOMICS
Unit-I Time value of money : Simple and compound interest, Time value equivalence, Compound interest factors, Cash flow diagrams, Calculation, Calculation of time value equivalences. Present worth comparisons, Comparisons of assets with equal, unequal and infinite lives, comparison of deferred investments, Future worth comparison, payback period comparison. (8) Unit-II Use and situations for equivalent annual worth comparison, Comparison of assets of equal and unequal life. Rate of return, Internal rate of return, comparison of IIR with other methods, IRR misconceptions. (8) Unit-III Analysis of public Projects: Benefit/ Cost analysis, quantification of project, cost and benefits, benefit/ cost applications, Cost effectiveness analysis. (9) Unit-IV Depreciation, computing depreciation charges, after tax economic comparison, Breakeven analysis; linear and non-linear models. Product and Process Costing, Standard Costing, cost estimation, Relevant Cost for decision making, Cost control and Cost reduction techniques. (8) Reference Book : 1. Horn gren, C.T., Cost Accounting, Prentice Hall of India 2. White, Engineering Economics, Wiley India 3. Riggs, J.L., Dedworth, Bedworth, D.B, Randhawa, S.U. Engineering Economics, McGraw Hill International Edition, 1996
Page 9
PEC 351 LTP 002
ELECTRONIC CIRCUITS LAB
The following experiments must be performed on Bread Board 1. Field Effect Transistors-Single stage Common source FET amplifier plot of gain in dB Vs frequency, measurement of bandwidth, input impedance, maximum signal handling capacity (MSHC) of an amplifier. 2. Bipolar Transistors- Design of single stage RC coupled amplifier design of DC biasing circuit using Potential divider arrangement Plot of frequency Vs gain in dB. Measurement of bandwidth of an amplifier , input impedance and Maximum Signal Handling Capacity of an amplifier. 3. Two stage Amplifier. Plot of frequency Vs gain. Estimation of Q factor, bandwidth of an amplifier. 4. Common Collector Configuration-Emitter Follower (using Darlington pair)-Gain and input impedance Measurement of the circuit. 5. Study of Series and shunt feedback amplifier and determination of voltage and current gain, Plot of gain in dB Vs frequency, measurement of bandwidth. 6. Study of Wein bridge oscillator (b) phase shift oscillator. 7. Study of Hartely & Colpitts oscillator. 8. Study of Mono and astable multivibrator using BJT transistor 9. Fabrication of DC unregulated power supply. 10. PCB Lab: (a) Artwork & printing of a simple PCB. (b) Etching & drilling of PCB. (c) Testing of power supply fabricated in Experiment No. 6 (d) Mini Project
PEC-352 LTP
DIGITAL ELECTRONICS LAB
Page 10
002 1. Bread-board implementation of various flip-flops. 2. Bread-board implementation of counters & shift registers. 3. Determination of Delay time and NAND, NOR, Ex-OR, AND & OR Gates. 4. Experiments with clocked Flip-Flop. 5. Design of Counters. 6. Implementation of Arithmetic algorithms. 7. Bread Board implementation of Adder/Subtractor (Half, Full) 8. Transfer characteristics of TTL inverters & TTL Schmitt Trigger inverter. 9. Transfer characteristics of CMOS inverters series and CD40 series and 10. Estimation of Gate delay of CD40 series CMOS inverter. 11. Monoshot multivibrators using 74121 and 74123. 12. Clock circuit realization using 555 and CMOS inverter and quartz crystal. 13. Demultiplexer / Decoder operation using IC-74138.
PEC 353
MEASUREMENT LAB
1. Study of semiconductor diode voltmeter and its us as DC average responding AC voltmeter. 2. Study of L.C.R. Bridge and determination of the value of the given components. 3. Study of distortion factor meter and determination of the % distortion of the given oscillator. 4. Study of the transistor tester and determination of the parameters of the given transistors. 5. Study of the following transducer (i) PT-100 Transducer (ii) J- type Transducer (iii) Ktype Transducer (IV) Presser Transducer 6. Measurement of phase difference and frequency using CRO (Lissajous Pattern) 7. Measurement of low resistance Kelvins double bridge. 8. Radio Receiver Measurements 9. Study of A to D convertor and its realization 10. Study of D to A convertor and its realization 11. Designing of some characters like A by alpha numeric Display.
Page 11
LECTURE PLAN OF CBNT SN LECT UNIT NO TOPIC Errors in numerical Computation, Representation of number Normalization, Representation. Bisection method, Iteration Method& Regular falsi Method. Raphson Method, Secant Method, Rate of Convergence of Iterative Methods. Gauss Elimination Direct Method, Gauss Seidal Iterative Method, Rate of convergence. Finite difference, Difference Table, Polynomial Interpolation. Newton Forward & Backward Formula BOOK/AUTHOR C.B.N.S.T/SANTOSH KUMAR,GUPTA, MALIK, MANISH GOYAL C.B.N.S.T/SANTOSH KUMAR,GUPTA, MALIK, MANISH GOYAL C.B.N.S.T/SANTOSH KUMAR,GUPTA, MALIK, MANISH GOYAL PAGE NO REMARK
L1-L2
7-52
L2-L4
53-57
L4-L6
60-95
L6-L8
C.B.N.S.T/SANTOSH KUMAR,GUPTA, MALIK, MANISH GOYAL
95105
L9L12
II
C.B.N.S.T/JAIN IYENGAR & JAIN, GUPTA,MALIK,
115158
L13L14
II
C.B.N.S.T/SANTOSH KUMAR,GUPTA, MALIK, MANISH GOYAL C.B.N.S.T/SANTOSH KUMAR,GUPTA, MALIK, MANISH GOYAL
159176
L15
II
192220
Page 12
L16L18
II
L18L20
II
10
L21L22
II
11
L23L25
III
12
L26L29
III
13
L30L32
14
L33L34
IV
Gauss, Stirlings Bessels & Evertts formula Langranges, Newton divided difference, Hermits Interpolation formula Approximation of function by Taylors Series & Chebyshev polynomial Trapezoidal rule, Simpsons 1/3 , 3/8 rule,Booles rule Weddles rule & EulerMaclaurian formula Picard smethod, Eulers method,Taylors method, Runge-Kutta Methods PredictorCorrector Method ,Automatic error monitoring & stability of solution Frequency Chart, Curve fitting by method of list Squares, fitting
223274
275312
OWN-NOTES
337368
381416
418433
436449
Page 13
15
L35L37
IV
16
L38L40
IV
17
L41L44
of Straight lines. Polynomials, Exponential curves etc. Cubic Spline, Regression analysis. Linear & nonlinear Regression, multiple Regression Smoothening of Curves, Forecasting Models & Methods, Statistical Quality Control methods.
453480
488522
524535
LECTURE PLAN OF EDC
Page 14
DEV BHOOMI INSTITUTE OF TECHNOLOGY,DEHRADUN LECTURE SEHEDULE NAME OF FACULTY: Swati Gurgust YEAR: 2012-13 BOOK NAME PAGE NO. SEM:3RD COVERED ON
DEPARTMENT-E.C.E DATE: 14/06/12
LEECTURE TOPIC NO. Unit-I L1 Crystal Properties and charge Carriers in Semiconductors: Elemental and compound L2 semiconductor materials, crystal lattice L3 structure L4 Magnetic material:Origin of magnetic dipoles in solids, permanent L5 magnetic dipoles, diamagnetic L6 paramagnetic, ferromagnetic antiferromagnetic and ferry-magnetic materials 5 . Unit-II Transistor amplifier Frequency response: Bipolar Transistor as L7 amplifier, L8 Ebers mole and h-parameter model L9 L10 high Frequency model) L11 high frequency response of common source, L12 common collector, L13 common base. L14 High frequency response of common source, L15 commongate, L16 common drain
J.B.GUPTA 1-30 R.K.SINGH 40-68
J.B.GUPTA R.K.SINGH
SANJAY SHARMA J.B.GUPTA
181-220
R.K.SINGH SANJAY SHARMA 220-249 J.B.GUPTA 305-398 R.K.SINGH
Page 15
L17 L18 L19 L20 L21 L22 L23 L24 L25 L26
Unit-III Feedback: Concept of feedback, classification feedback, Analysis of different type of feedback. Oscillators: Concept of oscillators, condition of oscillations, frequency and amplitude stability of oscillations, analysis of quartz, Hartely, colpitts, RC phase shift, Wein bridge and UJT oscillators Unit-IV Multistage and Tuned Amplifiers: Introduction to multistageamplifiers, cascade amplifiers, coupling of amplifiers, direct coupled, differential coupling, and transformer coupled amplifier, Darlington amplifier and its analysis, bootstrapping, tuned and double tuned voltage amplifiers Unit-V Multivibrator: Astable, mono-stable, and bi-stable multivibrators
SANJAY SHARMA
401-425
J.B.GUPTA 426-456 R.K.SINGH 459-500 SANJAY SHARMA 500-525 J.B.GUPTA R.K.SINGH
. L27 L28 L29 L30 L31 L32 L33 L34 L35 L36 L37
SANJAY SHARMA J.B.GUPTA 152-178 R.K.SINGH SANJAY SHARMA J.B.GUPTA R.K.SINGH
L38 L39 L40
SANJAY SHARMA J.B.GUPTA R.K.SINGH
198-250
LECTURE PLAN: DIGITAL ELECTRONICS& Aspect Design
Topic Unit-I: Introduction Characteristics of
Lect. No.
Books
Page No.
Remarks
digital L1-L3
M. Morris
1-2, Page 16
system, Types of Digital circuits, Number system: Direct conversion between bases Negative numbers & BCD and their arithmetics L4-L6 Boolean Algebra, Minimization of Boolean Functions: Map & Tabular method upto 6 variable and miltiple output L7-L8 circuits Error detecting & correcting codes, Hamming & cyclic codes.
Mano & A. 63-80, Kumar
103-111, 279-282, M. Morris Mano& A. Kumar 23-26,
M. Morris Mano& A. Kumar
Unit-II: Combinational Logic Circuits Design Procedure, Adders, L9-L11 subtractors & code conversion, Multiplexers/ Demultiplexers, encoder / decoders, decimal adders amplitude comparators, ROM L12-L13 as decoder, PLA & PAL. Unit-III: Sequential Logic Circuits Flip Flops and their conversions,
M. Morris Mano
128-136, 125-127, 142-151, 137-139, 141-142, 282-284, 287-291,
M. Morris Mano
L14-L16
M. Morris Mano M. Morris Mano
174-184,
L17-L19 Analysis and synthesis of synchronous sequential circuit, excitation table, state table & state diagram. L20-L22 Design of synchronous counters, shift registers and their applications. Unit-IV: Logic Families Diode, BJT & MOS as a L23-L25 switching element concept of
184-193, 248-254,
M. Morris Mano
220-233,
M. Morris Mano
377-382,
Page 17
transfer characteristics, Input characteristics and L26-L28 output characteristics of logic gates, Fan-in, Fan-out, Noise margin, circuit concept comparison of various logic families: TTL, IIL, ECL, NMOS, L29-L31 CMOS Tri-state logic, open collector output, Interfacing between logic L32-L33 families, packing density, power consumption & gate delay. 8 Unit-V: Hazard and Fault Detection Static and dynamic Hazards: L34-L35 Gate delay, Generation of spikes, L36 Determination of hazard in combinational circuits, L37-L39 Fault detection methods: Fault L40 L42 Table & Path sensitizing methods. Memories:Sequential, Random Access, NMOS & CMOS Static and Dynamic Memory L43-L46 elements one and multi-dimensional selection arrangement, Readonly memories, Formation of memory banks. M. Morris Mano 400-415
R.P. Jain,
105-125
A.K. Gautam
313-341
A.K. Gautam A.K. Gautam A.K. Gautam R.P. Jain,
431-432
430-441
433-434 413-414, 426-433,
R.P. Jain,
408-410, 419-426
Page 18
LECTURE PLAN: EMI Topic Lect. No. Books Page No. Remarks
Unit-I : Theory of Measurement Introduction, Performance L1-L3 Characteristics: static & dynamic standards, Error analysis: Sources, types L4 and statistical analysis
A.K. Sawhney
24-42, 60-72,
D. Cooper
1-18,
Unit-II: Transducers Passive transducers: Resistive, Inductive Capacitive Transducer
L5-L6
A.K. Sawhney A.K. Sawhney D. Cooper
9131009,
L7-L8
Active transducers: Thermoelectric, piezoelectric photoelectric: Bridges: Direct current and alternating current bridges, LCR bridges
L9-L10
10101089 337-360,
L11 L12 L13-L15
D. Cooper M. M. S. Anand
361-377 585-592
593-597 L16 L17 M. M. S. Anand
Unit-III: Analog Meters AC analog meters: Average, L18-L20 Peak and RMS responding voltmeters, voltmeters. sampling
M. M. S. Anand
3-27,
Electronics Analog meters: L21-L22 Electronics analog DC and AC voltmeter and
M. M. S. Anand
28-53,
Page 19
Ammeters, Electronic analog ohmmeter and multimeter
L23-L25
M. M. S. Anand M. M. S. Anand
57-77
Unit-IV: Digital Meters Analog to digital converter: L24-L25 Transfer characteristics, A/D Conversion techniques: L26-L28 Simple potentiometer & servo method,successive approximation, ramp type, Integrating & dual-slope integrating method. D/A Converter: Transfer L29- L30 characteristics, D/A conversion techniques Digital mode of operation, performance characteristics of D/A converters. Display devices: Decimal, L31-L32 BCD and straight binary number, indicating system, numeric & alpha number L33-L34 display using LCD & LED, specification of digital meters: display digit & counts resolution, L35 sensitivity, accuracy, speed & settling time etc. Unit-V: Oscilloscopes & RF Measurements Types of oscilloscopes, controls, Measurements voltage, frequency time & Phase. High frequency measurements RF impedance
80-118,
M. M. S. Anand
118-130
M. M. S. Anand
132-140
M. M. S. Anand
144-154
M. M. S. Anand
155-160
161-164 M. M. S. Anand
L36-L37
A.K. Swahney
784-839,
L38
A.K. Swahney
119-124,
Page 20
Probes: Types of probes, probe loading & measurement effect, probe specifications
L39-L40
A.K. Swahney
159-178
Unit-VI: Signal Generators & Analyzers Signal Generators: Sine- L41-L43 wave, nonsinusoidal &
A.K. Swahney
241-254, 295-337,
function generators, frequency synthesis techniques & digital signal generators. Signal Analyzers: Distortion, wave and Network spectrum analyzers L44-L46 D. Cooper 246-282
LECTURE PLAN: NAS Topic Unit I : Graph Theory : Graph of a Network, definitions, tree, co tree , link, basic loop and basic cut set, Incidence matrix, cut set matrix, Tie set matrix Duality, Loop and Node methods of analysis. Review lecturer OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM Page 21 Lect. No. BOOKS NAME Page NO. L1-L03 A Chakravarti
1125-1137 L4-L5 A Chakravarti
L6-L7
K M Soni.
Unit II : Network Theorems (Applications to ac networks): Super-position theorem, Thevenins theorem, Nortons theorem, maximum power transfer theorem, Reciprocity theorem. Millmans theorem, compensation theorem, Tellegens theorem. Review lecturer Unit III : Network Functions : Concept of Complex frequency , Transform Impedances Network functions of one port and two port networks, concept of poles and zeros, properties of driving point and transfer functions, time response and stability from pole zero plot, frequency response and Bode plots Review lecturer Unit IV : Two Port Networks: Characterization of LTI two port networks ZY, ABCD and h parameters, reciprocity and symmetry. Inter-relationships between the parameters, inter-connections of two port networks, Ladder and Lattice networks. T & Representation. Review lecturer Unit V : (a) Network Synthesis : Positive real function; definition and properties;
L8- L11
K M Soni. Sudhaker&Palli
105-120
L12-L15
L16-L18
A Chakravarti
622-627, 636-637, 534-588, 544-554,
L19-L20
L21-L22 L23-L25
Sudhaker&Palli K M Soni. A Chakravarti
528-530, 571-579, 738-741,
L26-L28 779-790, 805-812, D.R.Choudhary L29-L30
L31-L32
Sudhaker&Palli K M Soni.
597-633, 569-573,
L33-L35
L36-L38 A Chakravarti
788-869,
L39-L40
L41-L43
Sudhaker&Palli
737-759,
Page 22
properties of LC, RC and RL driving point functions, synthesis of LC, RC and RL L44-L46 driving point immittance functions using Foster and Cauer first and second L47-L48 forms. Review lecturer (b) Filters : Image parameters and L49-L50 characteristics impedance, passive and active filter fundamentals, low pass, highpass,band L51-L52 pass, band elimination filters. Review lecturer L53 Unit-VI: Memories Sequential, Random Access, NMOS & CMOS Static and Dynamic Memory elements one and multi-dimensional selection arrangement, Read-only memories, Formation of memory banks.
K M Soni.
A Chakravarti
Smarjit ghosh
645-671,
K M Soni. A Chakravarti
L40 L42
R.P. Jain,
413-414, 426433,
L43-L46
R.P. Jain,
408-410, 419426
LECTURE PLAN OF ENGINEERING ECONOMICS
LECTURE NO Unit-1
TOPIC
BOOK
PAGE NO
Page 23
LT-1
Time value of money Riggs Bedworth Randhawa
24
LT2-LT4
Simple and compound interest,
24-38 Dr. Himanshu Agarwal 33 Riggs Bedworth Randhawa 35-37 Riggs Bedworth Randhawa
LT5
Time value equivalence
LT6-LT7
Compound interest factors
LT8-LT10
LT11-LT12
Cash flow diagrams,Calculation of time value equivalences Riggs Bedworth Randhawa Present worth comparisons, Comparisons of assets with equal
50-61
58
90 Dr. Himanshu Agarwal Riggs Bedworth Randhawa
LT13-LT14
LT15
unequal and infite lives comparison of deferred investments Future worth comparison
Riggs Bedworth Randhawa
87
LT16-LT17
92 Riggs Bedworth Randhawa
LT18-LT19 pay back period
66 Page 24
comparison. LT20-LT21
Dr. Himanshu Agarwal Riggs Bedworth Randhawa
101
Unit-2 LT22-LT23
Riggs Use and situations for equivalent annual Bedworth Randhawa worth comparison,
121-125
LT24
Comparison of assets of equal and unequal life Riggs Bedworth Randhawa Rate of return
135-139
LT25-LT26 Internal rate of return Dr. Himanshu Agarwal
70
78 LT27-LT28 comparison of IIR with other methods IRR misconceptions. Riggs Bedworth Randhawa Dr. Himanshu Agarwal 173-176
LT29
LT30-L31
176-190
Riggs Bedworth Randhawa Unit-3 LT32 Analysis of public Projects: Benefit/ Cost analysis Riggs Bedworth Randhawa 289-296
Page 25
LT33
quantification of project
298 Riggs Bedworth Randhawa
cost and benefits, LT34 benefit/ cost applications, LT35 Cost effectiveness analysis LT36 Riggs Bedworth Randhawa Unit-4 LT37-LT38 LT-39 Depreciation Dr. Himanshu computing depreciation charges Agarwal after tax economic comparison LT40-LT41 Break-even analysis; LT42-LT43 linear and non-linear models. Riggs Bedworth Randhawa 372-385 124-127 Riggs Bedworth Randhawa 309 303
138-144 Dr. Himanshu Agarwal 477-493 LT-44 Riggs Product and Process Bedworth Costing Randhawa 145-177 Standard Costing LT-45 cost estimation, LT-46 Relevant Cost for decision Making Dr. Himanshu Agarwal 178-220
Dr. Himanshu Agarwal Page 26
LT47-LT48 LT-49
Cost control and Cost reduction techniques. Dr. Himanshu Agarwal
221-257
LT-50 Dr. Himanshu Agarwal
258-274
QUESTION BANK OF CBNT
Q1. Define truncation error ,absolute error ,relative error and percentage error?. Q2 Suppose 1.414 is used as an approximation to2.find the absolute and relative errors. Q3 . Evaluate the sum s=3+5+7 to 4 significant digits and find its absolute and relative errors. Q4. Find the absolute , relative and percentage errors if x is rounded off to three decimal digits .given x= 0.005998. Q5 If u = 4x2y3/z4 and errors in x y, z be 0.001,compute the relative max. Error in u when x=y=z=1. Q6 if r=3h(h6-2),find the percentage error in r at h=1,if the percentage error in h is 5. Q7 29=5.385 and 11=3.317 correct to four significant figures. Find the relative error in their sum and difference?. Q8. Find the number of terms of the exponential series such that their sum gives the value of ex correct to six decimal places at x=1. Q9. Use the series loge(1+x/1-x)=2(x+x3/3!+x5/5!+----) Page 27
To compute the value of log(1.2)correct to seven decimal places and fine the number of terms retained. Q10. For x=.4845 and y=.4800,calculate the value of x2-y2/x+y using normalized floating point arithmetic . Compare with the value of (x-y).indicate the error in the former. Q11 Construct the table of differences for the data below:
x: 0 f(x): 1.0 1 1.5 2 2.2 3 3.1 4 4.6
evaluate 3 f(2).
Q12. Evaluate :
2 (abx)
Q13 Find the unique polynomial P(x) of degree 2 such that: P(1)=1 , P(3)=27 , P(4)=64 with the use of Lagrange Method of interpolation. Also find P(2). Q14. Find a positive root of x-cosx = 0 by bisection method ,correct up to 4 decimal places between 0 and 1. Q15. Find a real root of x3-x=1 between 1 and 2 by bisection method .compute five iterations. Q16. Find a real root of the equation cosx =3x-1 correct to 3 decimal places using iteration method. Q17.Find a real root of 2x-log10x =7 correct to four decimal places using iteration method Q18 .Find the root of the equation xex=cosx in the interval (0,1) using regular falsi method correct to four decimal places . Q19 Solve x3 -5x+3 =0 by using regula falsi method. Q20. Use the method of false position to solve x3-x-4=0 Q21 . A real root of the equation f(x)=x3-5x+1=0 Lies in the interval (0,1). Perform four iteration of the secant method. Q22.Use newton-raphson method to find a root of the equation x3-3x-5=0 Q23.Using newtons raphson method ,find the real root of xlog10x=1.2 correct to five decimal places.
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Q24. Given the differential equation dy/dx=x2/y2+1 with the intial condition y=0 when x=0.Use Picards method to obtain y for x=0.25, 0.5 and 1.0 correct to three decimal places. Q25. Use Picards method to obtain y for x=0.2.given: dy/dx=x-y with intial condition y=1 when x=0 Q26 Approximate y and z by using Picards method for the particular solution of dy/dx=x+z, dz/dx=x-y2 given that y=2,z=1,when x=0. Q27. Solve the equation dy/dx=1-y with intial condition x=0,y=0 using Eulers algotithm and tabulate the solution at x=0.1, 0.2, 0.3. Q28 Use taylors series method to solve dy/dx=x+y: y(1)=0 numerically upto x=1.2 with h=0.1. compare the result with the value of explicit solution Q29. For the differential eqn., dy/dx= -xy2, y(0)=2.calculate y(0.2) by taylors series method retaining four non zero terms only. Q30. Solve the equation dy/dx=x+y with intial condition y(0)=1 by Runge Kutta rule, From x=0 to x=0.4with h=0.1 Q31 Given dy/dx=y-x,y(0)=2.find y(0.1)and y(0.2)correct to four decimal places.Use IV order Runge Kutta method. Q32.Tabulate by Milnes method the numerical solution of dy/dx=x + y with intial conditions x0=0,y0=1 from x=0.20 to 0.30 Q33 Using taylors series method, find the solution of diff. equation xy=x-y, Y(2)=2 at x=2.1 correct to five decimal places.
Q34. Solve dy/dx=1+xy with x0=2,y0=0.Using Picards method of successive approximations. Q35 Find the truncation error for ex at x=1/5 if First three terms are retained in expansion. Evaluate (i) tan-1x (ii) 2cos2x
Q36.
Q37. with usual notations,prove that nf(1/x)=(-1)n x n!hn/x(x+h)-----(x+nh) Q38. Prove that (i) (E1/2+E-1/2)(1+ )1/2=2+ OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM Page 29
(ii) =1/22+ 1+ 2/4 Q39 (i) Express y=2x3-3x2+3x-10. in factorial notation and hence show that 3=12. (ii) Evaluate n[cos(ax+b)] Q40. Express f(x)=x4-12x3+24x2-30x+9 and its successive differences in factorial notation. Hence show that 5f(x)=0 Q41. Find the missing figures in the following data X: 2 2.1 2.2 2.3 2.4 Y: 0.135 0.111 0.1000 -
2.5 0.082
2.6 0.074
Q42 .Find the cubic polynomial which take the following values; x: 0 1 2 3 f(x) 1 2 1 10 use equal distribution formula. Q43 The following table gives the marks secured by the 100 students in the numerical analysis subject: Range of marks : 30-40 40-50 50-60 60-70 70-80 No of students: 25 35 22 11 7 Use Newtons forwad differences formula to find (i) The number of students who get more then 55 marks.(x=55)
Q44. The population of a town was as given .Estimate the populationfor the year 1925 Year (x) : 1891 1901 1911 1921 1931 Population(y) : 46 66 81 93 101 (in thousands) Q45: Apply Gausss forward formula to find the value of U9,if U0=14,U4=24,U8=32,U12=35,U16=40 Q46 Apply Gausss forward formula to find a polynomial of degree four which takes the following values of the function f(x): x : 1 2 3 4 5 f(x) : 1 -1 1 -1 1 Q47 Find the value of cos51042 by gausss backward formula.Given that x: 500 510 520 530 540 Cosx: 0.6428 0.6293 0.6157 0.6018 0.5878 Q48. : Given: 0
50
100
150
200
25 Page 30
300
tan : 0 0.0875 0.1763 0.2679 0.5774 find the value of tan160 using stirling formula.
0.364
0.4663
Q49.Find the value of Y15, using bessels formula if Y0=2854,Y14=3162,Y18=3544,Y22=3992 Q50 Given that x: 4 6 8 f(x): 3.5460 5.0753 6.4632 Apply besssels formula to find the value of f(9). Q51. Obtain the value of Y25,given that Y20=2854,Y24= 3162,Y28=3544 and Y32=3992 Use everetts formula to find Y25. Q52. By means of Lagranges formula ,prove that Y1=Y3-0.3(Y5-Y-3)+0.2(Y-3-Y-5) Q53. The function y=f(x) is given out at the points (7,3)(8,1)(9,1)and (10,9).Find the value of y for x=9.5 Using Lagranges interpolation formula. Q54. Find the unique polynomial p(x) of degree 2 such that P(1)=1 ,P(3)=27,P(4)=64. Use Lagranges method of interpolation. Q55. If f(x)=1/x2 find the first divided differences f(a,b), f(a,b,c), f(a,bc,d) Q56. Using Newtons divided differences formula ,find a polynomial function satisfying the following data x: -4 -1 0 2 5 f(x) : 1245 33 5 9 1335 hence find f(1) Q57 .Given log10654= 2.8156, log10658=2.8182, log10659=2.8189 and log10661=2.8202, By divided difference formula find the value of log10656 Q58- Using Newtons divided differences formula ,calculate the value of f(6) from the following data. x: 1 2 7 8 F(x): 1 5 5 4 10 7.7217 12 8.8633 14 9.8986
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Q59.Apply Hermites interpolation formula to find a cubic polynomial which meets the following specification Xi Yi Yi 0 0 0 1 1 1
Q60.Find f(1) and f(1.1) from the follwing table x: 1.0 1.2 1.4 1.6 F(x): 0.0 0.1280 0.5540 1.2960
1.8 2.4320
2.0 4.000 in the following
Q61.The distance covered by an athlete for the 50metre race is given table. Time (in sec) 0 1 2 3 4 5 6 Distance(metre) 0 2.5 8.5 15.5 24.5 36.5 50 Determine the speed of athlete at t= 5sec.correct two decimals.
Q62. From the following table of values of x and y , obtain dy/dx and d2y/dx2 for x=1.2, and 2.2 x: 1.0 1.2 1.4 1.6 1.8 2.0 2.2 y: 2.7183 3.3201 4.0552 4.9530 6.0496 7.3891 9.0250
Q63. Find f(5)from the data given below. x: 2 4 9 13 f(x): 57 1345 66340 402052
16 118209
21 4287844
29 21242820
Q64. The tables given below revels the velocity v of a body during the time t specified Find its acceleration(f) at t=1.1 t: 1.1 1.1 1.2 1.3 1.4 v: 43.1 47.7 52.1 56.4 60.8 1 Q65.Use Trapezoidal rule to evaluate x3dx 0 Considering five sub-intervals(n=5) 1 Q66.Evaluate dx/1+x2 0 (i)Simpsonss 1/3 rule taking h=1/4 (iii) Weddles rule taking h=1/6 Hence comute an approximate value of in each case 6 Q66. Evaluate dx/1+x2 0 By using (1) Simpsonss 1/3 rule taking . (iii) Weddles rule taking. OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM Page 32
1/2 Q68. Evaluate dx/1-x2 0 Using Weddles rule.
Q69. Ariver is 80m wide . The depth yof the river at a distance x from one bank is given by the following table. x: 0 10 20 30 40 50 60 70 80 y:0 4 7 9 12 15 14 8 3 find the approximate area of cross-section of the river using (i) booles rule (ii) simpsons 1/3 rd rule.
Q70. Find n[sin(ax+b)] (i) (ii) Evaluate 2(5x+12/x2+5x+6);the interval of differences being unity(h=1). Q71 Fit a Straight line to the following data regarding x as the independent variable: x Y 0 1 1.0 1.8 6.3 2 3.3 3 4.5 4
Q72. If P is the pull required to lift a load W by means of a pulley block,find a linear law of the form P=mW + C, connecting P and W, using the data P W 12 50 15 70 21 100 25 120
Q73. Explain the principle of least squares for fitting a curve from given data. fit a parabola y=ax2 + bx + c,by the method of least square to the following data x Y 1 5 5 97 2 12 3 26 4 60
Q74.Determine the curve of the form y=axb which is the best fit to the following data according to least squares principle x Y 1.0 3.5 0.01 1.5 0.405 2.0 2.5 3.0
0.693 0.916 1.098 Page 33
1.252 Q75.Fit the following four points by the cubic splines x 1 2 3 4 Y 1 5 11 8 Use the end condition y(1)=0=y(4).Hence ,compute y(1.5). Q76. Evaluate 1 I= 1/1+x dx using the cubic spline method 0 Q77.Express the following polynomials as sums of the Chebyshev polynomials: (i) 1+ x - x2 + x3-x4 (ii) 1 - x2 + 2x4-4x6 Q78. Given that dy/dx=y-x/y+x with the initial condition that y=1 when x=0. Find y for x=0.1 using Eulers method. Q79. Find the value of 00.6 ex/1+x dx by Simpsons 3/8th rule. Q80. Using Bessels formula find f (7.5) from the following table: X: 7.47 F(x): 0.193 7.48 7.49 7.50 7.51 7.52 7.53
0.195 0.198 0.201 0.203 0.206 0.208
Q81.Calculate linear regression coefficient from the following x 8 Y 3 24 7 10 12 14 17 20 1 2 3 4 5 6 7
Q82.Fit a second degree curve of regression of y on x to the following data x Y 1.0 6.0 2.0 11.0 3.0 18.0 4.0 27.0
Q83.Obtain regression line of x on y for the given data x 1 2 3 4 5 Y 5.0 8.1 10.6 13.1 16.2 20.0 Q84.Write short notes on the following: (1) Use of Statistical methods in quality control. (2) Analysis of variance OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM
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Q85 Obtain a regression plane by using a multiple linear regression to fit the data given below x Z Y 1 0 12 2 1 18 3 2 24 4 3 30
Q86. Find the value of 04 dx/1+x2 by Booles rule.
Q87. Solve the following system of equations by gauss elimination method. x-y+z = 1 -3x+2y-3z = -6 2x-5y+4z = 5 Q88. Explain the order of convergence of a solution and obtain the order of convergence of Newton-Raphson Method. Q89. In partially destroyed laboratory record of an analysis correlation data ,the following result are legible: Variance of x = 9, Regression equation: 8x 10y + 66 =0, 40x 18y =214.then find (i) the mean value of x and y, (ii) the standard deviation of y and (iii) the coefficient of correlation between x and y Q90. Define multiple and partial correlation coefficients .Drive the equations of regression planes. Q91. Using Stirlings formula from the following table, find the value of x for which f(x) is a maximum. Also find the maximum value of f(x) from the table of values given below: x: f(x): 60 28.2 75 38.2 90 43.2 105 40.9 120 37.7
Q92. Approximate y and z by Picards method for the differential equations dy/dx=x+z, dz/dx=x-y2 with initial condition y=2, z=1 when x=0. Q93. Solve dy/dz=x+z , dz/dx= x-y2 by Runge-Kutta method of fourth order; given that y(0)=2, z(0)=1 for y(0.1) , z(0.1). Q94. Evaluate y(1.4) by Adams-Bashforth method, given dy/dx= x2(1+y) with y(1)=1, y(1.1)=1.233, y(1.2)=1.548, y(1.3)=1.979. OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM Page 35
Q95. Given y=x-y2, y(0.2)=0.2. Find y(0.4) by Eulers method correct to 3 decimal places taking h=0.2 Q96. How is linear regression extended in fitting exponential curve y = ae +bx ?Evaluate value of a and b Q97. for the given table ; X 0.1 0.2 0.3 0.4 0.5 0.6 Y 5.1 5.3 5.6 5.7 5.9 6.1 Compute a1 and a2 of line y=a2x+a1.write the algorithm/program for computation of regression coefficients Q98. Discuss various statistical methods used in quality control of an Industry .Give chart and figure,where you feel necessary. Q99. Name at least three application of Numerical method ,those are used in medicine /treatment in hospital. Discuss each in brief. Q100. Using Bessels formula estimate (46.24)1/3given: x: 41 45 49
y=x1/3: 3.4482 3.5569 3.6593
53
3.7563
Q101. Explain the Bisection Method to calculate the root of an equation. Q102 .Prove they the nth difference of a polynomial of nth degree are constant and all higher order difference are zero. Q103.Write short notes on (i) Frequency charts of statistical documentation (ii) Regression Analysis
Q104 Under what condition ,Newton Raphson method becomes linearly convergent?Explain. Q105. Prove that
Q106 .Explain the error in Trapezoidal rule of integration.

Q107. Use Mullers method to find a root of the equation x3 x2 x - 1= 0.
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QUESTION BANK OF ELECTRONICS DEVICES AND CIRCUITS(TEC-301) UNIT-1 1. Define Diamagnetism & Paramagnetism. 2. What is a Origin of permanent magnetic dipoles in matters? Describe briefly. 3. What are Ferromagnetism, Antiferromagnetism and Ferrimagnetism? 4. What is magnetostriction? 5. Distinguish b/w Ferromagnetism & Antiferromagnetism 6. What are Properties and application of electrical conducting materials? 7. What are semiconducting, insulating and magnetic materials. 8. What are soft and hard magnetic materials ? 9. Describe the mechanical properties of metals? 10. Explain the optical properties of solids ? 11. What is Ferro electricity? Discuss ferroelectric classifications. 12. Describe the feature of ferrite structures. 13. What are hard magnetic materials? List out their properties and application 14. Compare soft and hard magnetic materials on the basis of hystersis curves. 15. State any two properties and applications each for hard and soft magnetic ferrites.
UNIT-2 1. Deduce expressions for Av, Ai, Ri, and Ro in a Common Emitter BJT amplifier in terms of hparameters. 2. Draw the circuits of CB, CE and CC configurations using npn transistor. 3. Derive the expression for Ic versus Ib for common Emitter transistor configuration in the active region . 4. Why do we prefer CE configuration over other amplifier configurations? 5. Explain the Ebers-moll model of BJT. 6. Draw frequency response curve of RC coupled amplifier. Indicate high and low 3db frequencies. Define band-width. 7. Sketch the small signal high frequency circuit of CS amplifier. Derive the expression for voltage gain. 8. Draw the circuit of one stage RC coupled CE amplifier and derive the expression for current gain and voltage gain. 9. Define hybrid parameters of a transistor. 10. Draw and explain the equivalent circuit of a BJT. 11. Determine input impedance, current gain, voltage gain and output impedance of a transistor in terms of h parameters.
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12. Draw the circuit of transistor in common emitter configuration of BJT and sketch the output characteristics indicates the active, saturation and cutoff region. Derive the relationship between and for BJT. 13. The following test results were obtained in a CE amplifier circuit while measuring h parameters experimentally: a. With ac output shorted Ib=25 A, Ic=1.2 mA, Vbe=30 mV and Vce=0 b. With ac input open circuited Ib=0,Ic=32 A,Vbe=0.3 mV andVce=1.2 V Determine h parameters of the given transistor. 14. If hie=1500 6, hfe=99, what is hib. A BJT having hie=1500 6, hre=2*10-5, hfe=49 and hoe=50 A/V is used as an emitter follower with Rs=1000 6 and RL=500 6. Determine the current gain, voltage gain, input impedance and output impedance of the amplifier. 15. What are the limitations of h parameters? 16. Draw and Explain Complete hybrid- model of a bipolar junction transistor 17. Draw the equivalent circuit of BJT in CB configuration using hybrid parameters 18. The following low-frequency parameters are known for a given transistor at Ic =10MA , V CE = 10V and at room temp. hie =500(ohm) ,h = 4*10-5 A/V, hfe =100 , hre = 10-4 at the same operating point, ft = 50(MHZ) and Cob = 3pf , compute the values of all the hybrid parameters. 19. Draw the high frequency, low frequency equivalent circuit of FET amplifier in CS configuration and explain the frequency analysis. Draw the nature of frequency response and explain. 20. Draw the hybrid pi model of common emitter amplifier and explain i. 21. State and explain various resistances in hybrid pi model. 22. Draw the hybrid pi equivalent of a CE transistor valid for high frequency and explain the significance of each parameter. 23. Discuss the different types of coupling used and their effect on frequency response. 24. Sketch the small signal high frequency circuit of CS amplifier. Derive the expression for voltage gain. 25. Sketch the circuit of source follower. At low frequencies what is the maximum value of voltage gain. Also find the order of magnitude of output impedance. 26. Draw the circuit of one stage RC coupled CE amplifier and derive the expression for current gain and voltage gain. 24.Draw and explain input and output characteristics of CB configuration. 25.Give the relationship between Alpha and Beta.
UNIT 3 1. Explain the effect of negative feedback on gain and bandwidth of an amplifier. Deduce the expression for gain and bandwidth with negative feedback. OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM Page 38
2. Give the block diagram representation of a shunt series feedback amplifier and derive its input and output impedance. 3. Determine the condition for oscillations and frequency of oscillations of Hartley oscillator. 4. A Hartley oscillator is designed with L1=2mH and L2= 20 micro henry and a variable capacitor. Determine the range of capacitance values for the case where the frequency of oscillator is varied between 950 kHz and 2050 kHz. 5. Write a short note on analysis of stability in feedback amplifiers. 6. Write a short note on wein bridge oscillator. 7. Draw the negative feedback amplifier and positive feedback amplifier. An amplifier with a stage gain 200 is provided with negative feedback of feedback ratio 0.05. Find the new gain. 8. Draw the circuit diagram of wein bridge oscillator and explain it briefly. In the wein bridge oscillator, if the RC network consists of resistors of 200kohm and capacitors of 300picofarad, find its frequency of oscillations. 9. Derive the expression of effective input and output resistances of current shunt feedback topology. 10. Explain the properties of negative feedback. 11. Draw and explain the circuit that uses both current and voltage feedback. 12. Why do we use crystal in an oscillator? Obtain the expression of impedance and show its plot with respect to frequency. 13. Obtain the open loop gain of colpitt oscillator and obtain its frequency of oscillation. 14. Write a short note on a) Basic principle of sinusoidal oscillator b) Crystal oscillator c) Clap oscillator d) Hartley oscillator e) Phase shift oscillator f) Wein bridge oscillator 15. Draw the circuit of clap oscillator and derive the expression of its frequency of oscillation. 16. Obtain the frequency of oscillation of LC oscillator. The BJT has very large beta. Also obtain the condition of oscillations 17. Draw and explain all basic feedback topologies used for negative feedback. What happens to input resistance and output resistance in case of voltage series and current series feedback 18. Draw the circuit diagram of Hartley and colpitt oscillators and obtain the expression for the frequency of oscillation 19. Draw a transistor circuit with current series feedback and for this circuit derive the input impedence, output impedance, and transfer gain. 20. Explain why positive feedback and not negative feedback is necessary to produce oscillations 21. Explain electronic oscillator can be consider to be an amplifier with infinite gain. Explain where you get the staring signal voltage from. 22. Explain the properties of a quartz crystal which are responsible for its use in an oscillator OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM Page 39
23. Draw the schematic representation of Hartley oscillator. 24. Write note ona. Classification of feedback. B .Berkhousen criteria 25. Why is RC phase shift oscillator is preferred for the generation of low frequency ? Derive the frequency of oscillation for the same.
UNIT 4 1. What is a single tuned amplifier? 2. Define resonant frequency of a tuning circuit. Write down the expression for resonant frequency. 3. Define quality factor of a parallel tuned circuit. What is the effect of Q on the resonance curve? 4. What are tuned amplifiers and where are they used? 5. Discuss the advantages of tuned amplifiers. 6. Why are tuned circuits not used for low frequency applications? 7. Why is tuned amplifier operated in class-C operation? 8. List the differences between tuned amplifiers and other amplifiers. 9. Discuss briefly the frequency response of a tuned amplifier. 10. What is the relationship between Q and BW of a tuned amplifier? Explain the effect of Q on the resonance curve. 11. Write a short note on coil losses in a tuned circuit. 12. Classify tuned amplifiers. 13. Briefly discuss the need for parallel resonant circuits in tuned amplifiers? 14. Differentiate small signal and large signal tuned amplifiers. 15. Classify small signal tuned amplifiers. 16. Identify the differences among single tuned, double tuned and stagger tuned amplifiers. 17. The bandwidth of a single tuned amplifier is 10KHz. Calculate the bandwidth if 3 such stages are cascaded. Also calculate bandwidth for four stages. 18. What are the disadvantages of tuned amplifiers? 19 What are double tuned amplifiers? 20What the advantages are of stagger tuned amplifier? 21What is mean by Gain Bandwidth Product and a Tuned amplifier. 22Define f , f and f t and distinguish between f and f , f t and f . 23 What is a parallel tuned circuit? When resonance does occur in tuned circuit? 24 parallel tuned circuit has a capacitor of 100PF in one branch and an inductance of 100?H plus a resistance of 10 O in the second branch. The line voltage is 100V. Find (i) resonant frequency, (ii) circuit impedance at resonance, (iii) line current at resonance and (iv) Q factor.
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25 Explain how to improve gain single stage amplifier. Draw a typical diagram of a single tuned amplifier with a tapped inductor for impedance matching. Derive expressions for gain and bandwidth 26 With neat sketches of circuit diagram and frequency response curve, explain the operation of double tuned amplifier. 27 With the neat diagram explain the working of two-stage RC coupled amplifier 28. Explain the terms of amplifier I) frequency response II) decibel gain and III) bandwidth. 29. Explain RC coupled transistor amplifier with special reference to frequency response, advantages, disadvantages and application. 30 . With neat diagram explain the working of transformer coupled transistor amplifier. 31 A multistage amplifier consists of three stages; the voltage gain of the stages are 60,100 and 160 calculate the overall gain. 32. How will you achieve impedance matching with transformer coupling? 33. What are the merits of two-stage transformer coupled amplifier over RC coupled amplifier? 34. Draw the neat-labeled diagram of two-stage RC coupled amplifier and two-stage transformer coupled amplifier. 35.We are to match a 16 speaker load to an amplifier so that the effective load resistance is 10 K. What should be the transformer turn ratio? 36. We are to match a 24 speaker load to an amplifier so that the effective load resistance is 12 K. What should be the transformer turn ratio? 37. A single stage amplifier has collector load Rc=10K, input resistance Rin=1K and =100. If RL=100 find the voltage gain. 38. What is the application of two stage RC coupled amplifier? 39. Draw the block diagram of multistage amplifier. 40. A multistage amplifier employs 3 stages each of which has a power gain of 30. What is the total gain of the amplifier in db? 41. The gain of the second amplifier in case of two-stage amplifier is low. Comment. 42. What do you understand by multistage transistor amplifier? 43. What is need to of multistage transistor amplifier? 44. Explain the term frequency response with respect to two-stage transformer-coupled Amplifier.
UNIT 5 1. What is a monostable Multivibrator? OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM Page 41
2. What is a Multivibrator? 3. What is Astable Multivibrator? 4. Draw the schematic of mono stable multivibrator and explain its working. Draw its output waveform. 5. Draw and explain the working of a monostable multivibrator using BJT. 6. Draw and explain the working of a Astable multivibrator using BJT. 7. Draw and explain the working of a Bistable multivibrator using BJT. 8. Draw the schematic of Astable multivibrator and explain its working. Draw its output waveform. 9. Draw the schematic of bistable multivibrator and explain its working. Draw its output waveform. 10. Explain how a non symmetrical square can be obtained. 11. Draw and explain the operation of a square wave generator.
Question Bank for Digital Electronics and circuits(TEC-301) UNIT-1
1.
Prove followinga) A+A.B+A.B=A+B b) A.B+A.B+A.B=A+B c) ABC+ABC+ABC+ABC=AB+BC+AC Prove the following using Demorgans theorem a) AB + CD = [(AB).(CD)] b) (A+B).(C+D)=[(A+B)+(C+D)] Perform the following subtraction using 2s and 1s compliment method a) 01000-01001 b) -01100-00011 c) 0011.1001-0001.1110 Perform the following operation in 2s and 1s compliment form (UTU2009) i) +6 -3 ii) -2 - 6 Page 42
Convert following nos. from decimal to octal and then to binary a) 375 b) 249 c) 27.125
Encode the following decimal into BCD code a) 46 b) 327.89 c) 20.305 Simplify the following Boolean function using five variables K-map F(A,B,C,D,E) = (0,1,4,5,16,17,21,25,29) (UTU2009) Obtained the 15-bit Hamming code word for the 11-bit data word 11001001010. (UTU2009 & Special Back 2009) Show the Positive logic NAND gate is a negative logic NOR gate and vice versa. (UTU2009 & Special Back 2009) Explain with example how dont care are implemented in K-map minimization. (UTU Special Back 2009) Convert the following (UTU Special Back 2009) ( )12 i) (4433214)5 = ii) (100011.101)2 = ( )8 Perform the following operation in 10s and 9s compliment form i) +63 -3 ii) -29 6 For the following logic diagram, determine the function f 1 and f 2 if: f 1 = xz + xz and the overall transmission function is to be: (UTU2010-11) F(w, x, y, z ) = m (0, 4, 9, 10, 11, 12) Distinguish between prime implicants and essential implicants.Show all of these in the K-map for the following function:F (x , y, z) = m (0, 2, 3, 4, 5, 7). (UTU2010-11) In given series the same integer is expressed in different number systems. Determine the missing number of the series, 10, 000, 121, 100, ?, 24, 22, 20,.. (UTU2010-11) Reduce { (AB + ABC) + A(B + AB)} = 0. (UTU2010-11) Obtain Hamming code of 1101 using odd parity. During transmission of this code, if error occurs in MSB, how is it detected? (UTU2010-11) What are the disadvantages of K-map? Reduce the following function using Quine-Mc clusky method: F (w, x, y, z ) = m (0, 1, 4, 6, 7, 8, 9, 10, 11, 15) (UTU2010-11) Explain the single precision and double precision floating point representation of binary number. What are the advantages and disadvantages of having different values for base and radix in the floating point number format? (UTU2010-11) Implement the following function using dont care condition: F = BD + BC + ABCD (UTU2010-11) D = ABD + ABCD Page 43
8 9 10 11
12
12
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Simplify the Boolean function by means of tabulation method: F = ACE + ACDE + ACDE D = ADE + DE + ADE + ADE (UTU2010-11) Prove that the following Boolean expression: F = ABE + BCDE + BCDE + ABDE + BCDE Are they any dont care condition if so what are they? (UTU2010-11) What are the disadvantages of K-map? Reduce the following function using Quine Mc clusky method: F (w, x, y, z) = M (2, 3, 8, 12, 13). D (10, 14). ind the Base of the followings: (i) ( 113 / 3)? = (23)? (ii) (121 /3)? = (33)? erform the Arithmetic operations in BCD number (i) (-954.99)10 - (-787.45)10 (ii) (-893.78)10 (+647.99)10 btain Hamming code of 1101 using odd parity. During transmission of this code, if error occurs in MSB, how is it detected? In a given series for the same integer is expressed in different number systems. Determine the missing number of the series: 11110, 1010, 132, ?, 50, 42, 36, 33,.. Reduce the Boolean functions: (i) ABC+ABC+ABC+ABC=AB+BC+AC (ii) [(A+B)+(C+D)] (iii) { (AB + ABC) + A(B + AB)} Obtain the minimal POS and SOP expression for the following and implement using universal gates: F= M(0, 1, 4, 5, 9, 11, 13, 15, 16, 17, 25, 27, 28, 29, 31 ) .d(20, 21, 22, 30) and explain the prime implicants and essential prime implicant. Explain the cyclic codes for error detection and correction. Perform the following operation using 10s and 9s complements:
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(i) (- 663.01)10 ( +3.6)10 (ii) (-929.09)10 (- 6.1)10
UNIT - 2 COMBINATIONAL LOGIC CIRCUITS 31 32 33 What is combinational logic circuit? What are its important features? Explain Half Adder, Full Adder circuit with the help of truth table and logic diagram. Draw the K-map for full adder. Implement full adder circuit with a decoder and two OR gates only. Page 44
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Draw the logic circuit of 4X1 MUX and explain its working. What is multiplexer? Draw 4 lines to 1 line multiplexer and explain its working. Design a 3 to 8 line decoder using 2 to 4 line decoders. Explain the encoder and decoder circuit in detail? What is magnitude comparator? Design a logic circuit for 4 bit comparator and explain it. Design 4-bit binary to gray code converter. (UTU Special Back 2009) Implement the following function using 8X1 MUX F(A,B,C,D) = (0,2,3,6,8,9,12,14) (UTU Special Back 2009) Draw the internal circuit diagram of 2X4 decoder with enable pin. (UTU Special Back 2009) Draw the circuit of 9-bit comparator circuit which have three Outputs; A>B & A =B, where A & B are three bit numbers. (UTU Special Back 2009) Develop 32:1 MUX using 16:1 MUX and normal encoder. (UTU Special Back 2009) Differentiate between priority encoder and normal encoder. (UTU Special Back 2009) An 8X1 multiplexer has inputs A, B and C connected to selection inputs S2, S1 and S0 respectively. The data inputs I0 through are as follows: I1 =I2 =I7 =0; I3 =I5 =1; I0 =I4 =D; I6 =D. Determine the Boolean function that the multiplexer implements. (UTU2009) Design a combinational circuit that compares two 4-bit numbers to check if they are equal. The circuit output is equal to 1 if the two numbers are equal and 0 otherwise. (UTU2009) Design a combinational circuit that coverts a 4-bit Gray code to a 4-bit binary number. Implement the circuit with exclusive-OR gates. (UTU2009) Sketch neat and clean diagram of PLA and explain it. In what way PLA is different from ROM? (UTU2010-11) Implement the full adder circuit with the help of two half adder with proper justification S0 = Cin xor A xor B and C0ut = AB + BCin + Cin A (UTU2010-11) Realize the logic function: F(A,B,C,D) = m (2, 4, 6, 7, 9, 10, 11, 12,15) using (i) a 16 : 1 MUX- out is the inverted input (ii) a 8 : 1 MUX (UTU2010-11) Design a code converter that converts a decimal digit from the 8 4 2 1. Design a combinational logic ckt that accepts a three bit number and generates an output binary number equal to the square of the input number. Design & implement a BCD to seven segment decoder circuit. Design & Implement the following function by using 8: & 4:1 Mux(s).F (A, B, C, D) =m (0, 2, 7, 9, 3, 12, 13, 14, 15). Design & implement a octal-to-binary encoder circuit. Design & Implement the following function by using 8:1 and 4:1 Mux(s).Use C select line as a input: F (A, B, C, D) =m (0, 2, 7, 9, 3, 12, 13, 14, 15). Design & Implement the following function by using 8:1 and 4 :1 Mux(s). Use D select line as a input: F (A, B, C, D) =m (0, 2, 7, 9, 3, 12, 13, 14, 15). (UTU2010-11) What is a decoder? Implement the following using decoder Page 45
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(i) F (w, x , y, z) = m ( 0, 1, 2,3, 4, 8, 9, 10,). (ii) F (w, x , y, z) = m ( 1, 3, 5, 6, 7, 9, 11, 12, 13, 14,). Design & implement a circuit which gives the 9s complement of numbers which are in BCD from 0 to 9. A combinational circuit is defined by the following three functions:F1 = xy + xyz, F2 = x +y, F3 = xy +xy. Design the circuit with a decoder and external gates. (UTU2010-11) Design a circuit with mode control that can perform both 1-bit addition and subtraction. When the mode control = 0 it is an adder and when mode control = 1 it is a subtrator (UTU2010-11) Design & implement the 1 bit full subtractor with help of (i) two half subtractors (ii) using universal gates (iii) also by decoder or de-multiplexer with proper justification: Where bin is initial borrow and A & B are binary inputs D0ut = A XOR B XOR bin Bout = A B + (A XOR B) bin = A B + A bin + B bin
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Design & Implement the following function by using 4:1. Use C & D select lines as a input: F (A, B, C, D) =m (0, 2, 7, 9, 3, 12, 13, 14, 15) What is a decoder? Implement the followings using decoder F1 (w, x , y, z) = m ( 0, 1, 2,3, 4, 8, 9, 10,). F2 (w, x , y, z) = m ( 1, 3, 5, 6, 7, 9, 11, 12, 13, 14,). Design Decimal to BCD priority Encoder. Implement the following Boolean function using PAL with four inputs. F1 (w, x , y, z) = m ( 2,12,13). F2 (w, x , y, z) = m ( 7,8,9,10,11,12,13,14,15). F3 (w, x , y, z) = m (0,2,3,4,5,6,7,8,10,11,15).
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F4 (w, x , y, z) = m (1,2,8,12,13). combinational circuit is defined by the following three functions:F1 = xy + xyz, F2 = x +y, F3 = xy +xy. Design the circuit with a decoder and external gates. Design & implement the 1 bit full Adder with help of decoder or demultiplexer with proper justification: Where Cin is initial carry and A & B are binary inputs S0ut = A XOR B XOR Cin Cout = A B + (A XOR B) Cin
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= AB + A Cin + B Cin
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hat is magnitude comparator? Design a logic circuit that compare 4 bits and explain it. Design and implement a code convertor that convert 4 bit BCD to Excess-3 code converter.
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Design combinational circuits that coverts a 4-bit Gray code to a 4-bit binary number and vice versa. Implement the circuits with exclusive-OR gates. Design and implement 4 bit adder with look ahead carry.
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UNIT-3: SEQUENTIAL LOGIC CIRUITS 73 74 75 76 77 What is Flip Flops? Name some of its application? What is the difference between positive edge triggering and negative edge triggering? What is SR latch? Draw its logic circuit using a) NOR gates b) NAND gates. Explain its working. Draw the logic circuit of edge trigger JK flip flop and explain its working. Explain D flip flop and T flip flop? Draw its logic circuits and explain with truth table. Draw the neat and clean diagram of master slave JK flip flop and explain its working by giving truth table. How Master Slave JK-FF is different from JKFF?(UTU 2010-11) Discuss the working of shift left and shift right register in detail with figure. What is universal shift register and how it is differ from bidirectional shift register? Explain with suitable diagram. Explain the working of parallel in serial out shift register. Draw the circuit of a 4 bit binary ripple down counter using FF that trigger on the (i) Positive edge transition (ii) Negative edge transition. Explain its working. Draw its timing diagram.(UTU 2010-11) Draw the circuit of 4 bit up down counter. How are both up and down features obtained? What is Ring Counter? Draw its circuit and explain its working. Explain how Johnson counter differ from ring counter. Draw the circuit of a 3 bit Synchronous Counter and Explain its working. Show that the characteristics equation for the complement output of a JK-flip flop is Q(t+1) = JQ + KQ (UTU2009) Design a sequential circuit specified by the state by the state diagram given in the figure using JK-flip flops. (UTU2009)
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Derive the state table and state diagram of the sequential circuit shown in figure. Explain the function that the circuit performs, where ck is positive edge triggered clock. (UTU2009)
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Design a three bit synchronous counter using JK-flip flop. (UTU Special Back 2009) Describe and the operation of a D type flip-flop. (UTU Special Back 2009) Draw and explain the working of Master-Slave flip-flop. (UTU Special Back 2009) Page 48
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Design a counter with the following repeated binary sequence: 0, 1, 2, 4, 6. Use D flip flops. (UTU Special Back 2009) Draw the ASM chart for 2-bit counter having one enable input E such that, count is enable if E =1 and disabled if E =0. (UTU Special Back 2009) Design a sequential circuit with two D flip flop A and B, and one input x when x = 0, the state of the circuit remains the same. When x = 1, the circuit goes through the state transition from 00 to 01 to 11 to 10 back to back to 00, and repeats. .(UTU 2010-11) What is shift register? Draw the block diagram of 4-bit directional shift register showing all inputs and outputs. .(UTU 2010-11) The content of a 4-bit shit register is initially 1101. The register is shifted six times to the right with serial input being 101101. What is the content of the register after each shift? .(UTU 2010-11) What is locked out condition in counter? Design a synchronous counter that will count the clock pulse through states 0, 1, and 2 each time a start pulse is issued. Also examine the output with its timing diagram. (UTU 2010-11) What are the problems encountered in ripple counter? Design a BCD ripple counter using JK-FFs. (UTU 2010-11) Design a 4-bit shift register for HOLD, SHR, SHL and PARALLEL LOAD operation using MUX and D-FFs. (UTU 2010-11) Convert a JK- FF into SR- FF. (UTU 2010-11) Convert a D- FF into JK- FF. (UTU 2010-11) Convert a T- FF into SR- FF. (UTU 2010-11) Convert a D- FF into SR- FF. (UTU 2010-11) To shift Hexadecimal number A into 4 FF serial shift register, calculate time if clock frequency is : (i) 5 MHz (ii) 2 MHz. (UTU 2010-11) Data 1010 is input to a 4 bit PISO shift register. Draw a timing diagram to show the states of register after 1, 2, 3, 4 clock pulses. Describe a mod-5 synchronous counter with master-slave FFs to have following states only 011, 100, 101, 110, 111, and repeat through the states in the same sequence. Design & constructed a ripple counter with 4 FFs which is preset to skip initial 3 states. Find the modulus. Design & constructed a ripple counter with 5 FFs which is preset to skip initial 7 states. Find the modulus. A sequential ckt has two FFs (A & B ), two inputs (x & y ), and an output (z). The FF input functions and the ckt output function are as follows: JA = xB + yB , KA = xyB JB = xA, KB = xy + A, and z = xyA + xyB Obtain the logic diagram, state table, state diagram and state equations. Design and draw a 3bit gray code synchronous counter. Draw the timing diagrams of 4 bit Ring & Johnson counter. Explain & Draw the neat diagram of mod-10 asynchronous counter with JK FFs.
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Describe a mod-5 synchronous counter with master-slave FFs to have following states only 011, 100, 101, 110, 111, and repeat through the states in the same sequence. Draw the timing diagrams of 4 bit Ring & Johnson counter.
UNIT- 4: LOGIC FAMILIES 117 Draw a TTL circuit with totem pole output and explain its working. Why should it not be used for wire AND connection. 118 Explain the working of CMOS NAND, CMOS NOR gate in detail. 119 What is meant by open collector output of TTL gate? What is its utility? Draw the circuit showing open collector output and pull up resistor. 120 Explain the terms- a) Noise Immunity b) Figure of Merits c) Fan Out d) Current Hogging e) Propagation Delay f) Power Dissipation. 121 What are unipolar logic families? Define each separately with suitable diagram. 122 Sketch and explain a two input TTL NAND gate circuit. List the status of each transistor in the circuit when all inputs are one. 123 Draw the circuit diagram for two input ECL OR/NOR gate. 124 Draw and explain the circuit diagram of 3 input IIL NOR gate. 125 Write a brief note on interfacing TTL with CMOS. Draw the circuit for the CMOS inverter and show the waveform for the load line voltage transfer characteristics and drain current. Justify the waveform. 126 Draw and explain an output circuit arrangement for explaining Active Pull-Up in TTL gate. (UTU Special Back 2009) 127 Compare the current spikes in ECL and TTL gates. (UTU Special Back 2009) 128 Explain the parameters used to characterize logic families. (UTU Special Back 2009) 129 What is the meant by collector output of TTL gate? What is its utility? Draw the circuit showing open collector and pull up register. (UTU2009) 130 Design and implement:(UTU2009) i) 2-input NAND and NOR gate using CMOS ii) 2-input NOR and NAND gate using P-channel MOS iii) 2-input NOR andNAND gate using N -channel MOS iv) NOT gate using N channel, P-channel MOS and CMOS. 131 Compare all the standard logic families on the basis of designing parameters. UTU 2010-11) 132 Give the advantages and disadvantages of TOTEM-POLE output stage. Design a 2-input TTL NAND gate using TOTEM-POLE output stage. UTU 2010-11) 133 Design and implement the following function using CMOS: Y = AB + BC + CA. 134 What are the advantages of Tri-state buffer? Explain the designing of Tristate inverter using totem-pole output. OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM Page 50
UNIT- 5: HAZARD, FAULT DETDCTION and MEMORIES
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What is gate delay? What is Hazard and how it determined in Combinational Circuits? Explain the Fault Table method. Explain the Path Sensitizing method. Explain the various methods to detect faults. Define static 1 hazard, static 0 hazards, and dynamic hazard? Describe how to detect and eliminate hazards from an asynchronous network? HOW is ROM classified? Explain each of the classification? Draw a ROM array and explain its working. Using 256X4 RAM form a 1024X4 RAM. Draw a bipolar RAM cell and explain its working. Differentiate between static and dynamic RAM. Draw circuit of one cell of each and explain its working. Writes the short notes on (UTU2009) i) Static RAM ii) Dynamic RAM iii) Erasable ROM iv) NMOS RAM cell Design a combinational logic circuit using ROM that accepts 3-bit binary number and generates 3-bit Gray code. (UTU2009) Tabulate the truth table for an 8X4 ROM that implement the Boolean functions A(x, y, z) = (1, 2, 4, 6) B(x, y, z) = (0, 1, 6, 7) (UTU2009) C(x, y, z) = (2,6) D(x, y, z) = (1, 2, 3, 5, 6) Considering now the ROM as a memory, specify the memory contents at address 1 and 4. Implement the following two Boolean function using a PLA: F1(A, B, C) = (0, 1, 2, 4) (UTU2009) F2(A, B, C) = (0, 5, 6, 7) Draw the Architecture of 32X4 RAM and explain Read and Write operations. (UTU2009) Draw the circuit for one bit dynamic NMOC cell and explain the operation of Dynamic MOS inverter. (UTU Special Back 2009) Explain linear selection addressing. (UTU Special Back 2009) Write short notes on following:(UTU Special Back 2009) i) Formation of memory banks. ii) Static and Dynamic memories. Use 16 8 bit PROM to generate the following functions: F1 = m ( 0, 2, 6, 8, 12, 16). F2 = m ( 0, 1, 2, 6, 7, 9, 11, 13, 21, 23, 25). F3 = m(4, 6, 8, 12, 17, 19, 24, 30). Page 51
Design the following memories: (i) A 8 bit word length RAM by using 256 2 RAMs. (ii) 1024 4 RAM by using 256 4 RAMs. 134 A certain memory has capacity of 16K 32 . Find out the following (i)Number of address lines (ii)Number of output lines (iii)Number of memory locations (iv)Number of bits stored in the memory 135 What do you mean by DRAM? Explain the operation of simple DRAM cell for reading/writing operation. Why the refreshing does is needed?(UTU 2010-11) 136 Differentiate between SRAM and DRAM. How many 256 x 8 memory chips are required to obtain a 2048 x 8 memory? Also show the memory address associated with each memory. (UTU 2010-11) 136 Execute the fault detection technique for the function: Y = A + BC (UTU 2010-11) 137 Explain the following: (i) Carry look Ahead generator (ii) Sequence generator (iii) EPROM (iv) Hazards (UTU 2010-11) 138 A certain memory has capacity of 16K 32. Find out the following (i)Number of address lines (ii)Number of output lines (iii)Number of memory locations (iv)Number of bits stored in the memory. 139. Explain the Fault Table method. Execute the fault detection technique for the function: Y = AB + BC (UTU 2010-11)
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EMI Q-BANK What do you mean by true rms reading voltmeter? Discuss the method of using Multimeter for the measurement of resistance. Explain the working of A/D converter using voltage to frequency conversion. A 4 digit voltmeter is used for voltage measurement. Find : i. Find its resolution ii. How would 12.98 V appear in 10 V range? How would 0.6793 be displayed in 1 V range? iii. How would 12.98 V appear in 10 V range? How would 0.6793 be displayed in 10 V range? 5. What are the basic controls in a CRO? Explain each important function. 6. What is the basic principle of CST? Explain each component 7. Describe the functions of wave analyzers Explain with neat diagrams. 8. Draw the block diagram of a general purpose real time spectrum analysis and explain its principle of operation. 9. Explain the working of total harmonic distortion meter. 10. What are resistive transducers? Give the name of various resistive transducers. 11. Describe in detail potentiometers. Also give expression for its sensitivity. OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM Page 52 1. 2. 3. 4.
12. What are inductive transducers? Explain in detail the working principle of a variable inductive type transducer based on change in self inductance with change in geometric configuration. 13. With help of neat diagram explain how a dc potentiometer is standardized and used to measure the current flowing in the circuit. 14. Show the construction features / details of both types of moving iron instruments.Derive the torque equation ratio of any one type. 15. What is the procedure of standardization of dc potentiometer? 16. How can a dc potentiometer be used for calibration of ammeter and voltmeter? 17. Draw a neat diagram of a single phase energy meter of induction type.If the constant of energy meter is 600 rev / KWH and the meter is found to make 100 revolutions in 250 seconds for 2 KW load find the percentage of error in measurement.
18. Explain with sketches, the technique of p f measurement in a 3 phase electrodynamometer type of P F meter. Can it be used for unbalanced load. 19. Explain measurements and their significance. 20. Explain the applications of measurement systems. 21. What is sensitivity of an instrument explain. 22. A mercury thermometer has a capillary tube of dia 0.25 mm. If the bulb and capillary tube are made of zero expansion material, what volume must it have if a sensitivity of 2.5 mm/deg. C and the coefficient of volumetric ezpznsion of mercury is 0.181 x 10-3 deg C. 23. It is desired to measure the value of current in the 500 as shown in the diagram below by connecting a 100 find : i. Actual value of current ii. measured value of current iii. Percentage error in measurement and the accuracy. 24. Write a short technical note on: (a) Ratio-meter type of frequency meter (b) moving iron type of power factor meter. 25. Explain the working of power factor meter in 3 phase electrodynamometer type of PF meter. 26. What methods can be used for measurement of frequency? Explain the working of Vibration reed frequency meter with merits / demerits. 27. Explain the term burden in instrument transformer.At its rated load 25 VA and 100.5 amp transformer has an iron loss of 0.2watt and magnetic current of 1.5 A. Calculate its ratio error and phase angle when supplying rated output to a meter having a ratio of resistance to reactance of 6.0. 28. How is the power factor of a single phase circuit measured? Describe the working principle of an electrodynamic power factor meter with help of suitable diagram. 29. With help of neat diagram explain how a dc potentiometer is standardized and used to measure the current flowing in the circuit. OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM Page 53
30. Describe the working principle of strain gauges. Also derive the expression for gauge factor. 31. How does Kelvins Double bridge behave under unbalanced condition? 32. What is the electronic voltmeter? Explain their advantages. 33. What is a sampling voltmeter? Explain its operation. 34. Write short note on the following: (a) X10 probe (b) high voltage (c) high impedance probe ? 35. Describe / Draw block diagram of DFM and explain the principle f its working?How can the range of frequency be increased? 36. What are signal generator ? Explain with its block diagram. 37. What do you mean by Probes? why are they used specially in CRO? 38. What are the various types of oscillators? Explain. 39. What is the function of delay lines in CRO? 40. Explain the working of CRO as used in measurement of voltage & current. 41. Explain how measurement of unknown frequency is done by using a CRO? 42. Write short note on a frequency divider type of signal generator with frequency modulation. 43. What are sweep frequency generators/ sine wave generators? 44. What are square wave and pulse generators? 45. Explain pulse generators with block diagrams. 46. Why output of pulse generator is important consideration? Explain. Give the application of pulse generators. 47. Describe frequency synthesizers. Explain their characteristics. 48. Explain piezoelectric transducers with mathematical formulae of change in sensitivity. Also derive the formulae loading effectively. 49. Explain the working of a thermistors. Describe its various racteristics. Also give applications of thermistors.Explain the operation of Ammeter Voltmeter (VA) method of measurement of low resistance 50 - A current transformer with a bar has 300 turns in its secondary winding. The resistance and reactance of the secondary circuit are 1.5 & 1.0 respectively including the transformer winding. With 5 A current flowing in the secondary winding the magnetizing mmf is 100
QUESTION BANK OF NETWORK ANALYSIS AND SYNTHESIS Q1. Define following terms Graph, Sub-Graph, Directed Graph, Undirected Graph, Tree, Co-tree, Branch, Node, Twig, Link, Cut-set, Tie-set, Planner Network, Bilateral Network, Unilateral Network, Linear Network, Active Network, Passive Network, Lumped Network, Distributed Network. Page 54
Q2.
A network is shown in Fig.1. Draw the directed graph. Obtain complete & reduce Incident Matrix.
Q3.
A reduced incidence matrix of a graph is given below
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Draw directed graph and find number of possible trees. Q4 A network is shown in Fig. 2 Draw graph and write down the tie-set matrix.
Q5.
For network shown in Fig.3 Draw graph and tree of the network. Also develop the fundamental cut-set matrix and equilibrium equations an nodal basis.
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Q6.
Fig.3 A f-cut-set matrix of a graph is given below
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Draw the directed graph and find number of possible loops. Q7. Define Duality. Write steps of construction of dual network. Draw the dual of the network shown in Fig.4.
Q8.
A network has been shown in Fig.5. Write down the tie-set matrix and obtain network equilibrium equation in matrix from using KVL. Calculate loop current.
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Q9.
State superposition Theorem with Application. Also Determine the current I by using superposition theorem of network shown in Fig.6.
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Q10. State Thevenins Theorem. Obtain Thevenins equivalent of the network shown in Fig.7
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Q11. State Nortons Theorem. Obtain Nortons equivalent of the network shown in Fig.8
Q12. State and Proof Maximum Power Transfer Theorem for AC. Obtain value of RL for maximum power of the network shown in Fig.9.
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Q13. State and explain Tellegens theorem. Verify Tellegens theorem for the circuit shown in Fig.10.
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Q14. State and explain Millmans theorem. Using Millmans Theorem, find the current through (4+j3) in the network shown in Fig.11
Q15. State and explain Reciprocity theorem. Verify Reciprocity theorem for the network shown in Fig.12
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Q16. State and explain compensation theorem. In the network shown in Fig.13. 5054o volt source contains a current I. The 10 resistor is replaced by 5. Use the compensation theorem to find Vc and I shown in Fig.13
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Q17
Write necessary conditions for Transfer functions.
Q18. Obtain the pole-zero diagram of the given function I(s) and obtain i(t) I(S) = 2s (s+1) (s2+2s+4)
Q19. Draw the Bode plot of the following transfer function having unity feedback 10 system. s(1+0.01s) (1+0.1s) V(s) = Q20. Write necessary condition of stability of a Network function. Q21. For the given network function, draw the pole-zero diagram hence the time domain response v(t). V(s) = S2+4S +3 V2 Q22. Find the transfer function G(s)= (s for the given circuit shown in Fig.13. S2+2S ) Sketch the
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pole zero configuration. Show that G(j) >1 above a certain frequency o. Find o.
Q23. The characteristic equations of a feedback control systems is S4+ 20KS3 + 5S2 + 10S+15=0. Find the range of K for the system to be stable by using RouthHurwitiz Criterion. Q24. Draw the Bode Plot of the following transfer function having unity feedback. 1 S(1+0.5S) (1+0.05S) G(s) = . Find GM and PM.
Q25. Obtain Z- parameters of Fig. 14
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Q26. Obtain Y- parameters of the network shown in Fig.15
Q27. State and Explain Transmission Parameters. OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM Page 67
Q28. The Y-parameters of a two port network are Y11=0.4 and Y22 = 0.2 ; Y12= Y21= - 0.1 . Complete transmission parameters of the network and write equilibrium equations for network using these two types of parameters. Q29. Drive the condition of reciprocity and symmetry for Z,Y,h and ABCD parameters. Q30. Drive the equilibrium equation for series-series interconnection, series-parallel interconnection, parallel-parallel interconnection and cascade interconnection. Q31. A two port network has following open circuit and short circuit impedance Z10=900, Z20=1000 and Z1s=650. Find parameters of T-equivalent two port network. Q32 The network shown in Fig.16 represents two T-networks connected in cascade. Find the transmission parameters of the network. Determine the input impedance, when output terminal are shorted.
Q33. Check whether P(S) = 4S6+2S5+17S4+8S3+16S2+6S+3 is Hurwitz or not. Q34. Define Positive Real Functions. Write the necessary & Sufficient conditions of positive real functions. S3+5S2+9S Q35. A function is given by Z(S) = . Find the positive realness of +3 3 2 the function. S +4S +7S +9 Q36. Realise the following impedance functions in both the cauer forms of LC network. Z(S)= 12S4+10S2 +9 Q37. A driving point function is given by F(S)= show that the function S2+6S+8 3S3+2S 2 can be S +4S+3 realised in both the cauer RC and RL forms. Q38. An impedance function at the input of a network is represented S2+5S+ by Z(S)= . 4 Express it in both Foster forms. Q39. An admittance function is given by Y(S) = (S+6) . Find the RL (S+4) network (S+3)(S+5) Following forms of realisation. 4S(S2+4) Q40. The driving point impedances of a one port reactive network is given by Z(S)= (S2+3)(S2+1 6) Obtain the Foster forms of LC network realisation.
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QUESTION BANK SUBJECT: ENGINEERING ECONOMICS UNIT -I Q1 Discuss The Concept Of Time Value Of Money. Give Reasons For Time Preference Of Money. Q2 What Is Time Value Equivalence? Q3 Explain The Techniques Of Time Value. *Q4 Differentiate Between Simple Interest And Compound Interest. *Q5 What Is Cash Flow Diagram And Its Advantages? Q6 What Are The Different Categories Of Cash Flow Diagram? Q7 Explain The Concept Of Pay Back Period.Why Does The Pay Back Period Method Gets Popularity Among Bussinessmen? What Are Its Limitations? Q8 What Are The Conditions For Present Worth Comparisons? *Q9 What Do You Understand By Deffered Investment Give Examples. *Q10 Differentiate Between Future Worth And Present Worth. *Q11 Find The Worth Of Rs 5000 After Two Years If Interest Paid Is 1% Monthly Compounded Monthly. Q12 What Are The Two Prominent Methods Proposed To Accommodate Present Worth Comparisions Of Unequal Life Asset? Q13 If You Deposit Rs 20000 Annually ,At The End Of Each Year , For 10 Years And Interest Paid Is 10% Annual Compounded Annually , What Will Be The Maturity Amount? Q14 Determine Future Worth Of Rs 10000 After 5 Years ,If Interest Paid Is 12% Annual Compounded Monthly. Find The Same Again If Interest Paid Is Same But Compounded Quarterly Of A Year. Q15 Write Short Note On Compound Interest Factors. Q.16 If you deposit Rs 20,000 today at 12% rate of interest, in how many years will this amount grow to Rs 80000.Work out this problem by using Rule of 72. Q.17 A person has set up a sinking fund in order to have Rs 1,00,000 after 10 years for his childrens college education.How much amount should be set aside bi-annually into an accounting paying 5% p.a Compounded half yearly? Q.18 Find the principal, If the compound interest (compounded annually) for two years at the rate of 10% per annum is Rs 6615 Q.19 If the compound interest on a certain sum for 2 years @ 4% per annum is Rs 102. What would be the simple interest at the same rate for two years? Q.20 What will be the principal amount which makes a difference of Rs 15 in simple and compound interest @ 5% for 2 years? Unit II *Q1 Explain Irr And Its Advantages. *Q2 Discuss Misconception Of Irr. *Q3 Describe The Method Of Determining Irr Using A Suitable Example. Q4 Write A Short Note On Capitalised Cost. Q5 Define Asset Life And Compare Assets With Equal And Unequal Life. Q6 Writ A Note On Arr( Average Rate Of Return) OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM Page 69
Q7 List Out Advantages And Disadvantages Of Arr. Q8 Compare Nrv With Irr Method. Q9 Explain Present Value Index Or Profitability Index. Q10 Discuss The Importance Of Capital Budgeting. Q.11 The project requires an initial investment of Rs 20,000 and the annual cash inflow for 5years are Rs 6000,Rs 5000, Rs 4000 and Rs 4000 respectivelyFind the pay back period. Q.12 A machine is available for purchase at accost of Rs 80000, we expect it to have a life of 5 years and to have a scrap value of Rs 10000 at the end of five years period. We have estimated that it will earn additional profits over its life as follows: Year Profits 1 20000 2 40000 3 30000 4 15000 5 5000 Calculate accounting rate of return(ARR) Unit III Q1 What Are The Elements Of The Incremental Benefit Cost Ratio Method? Q2 What Are Various Criteria That Indicate Different Preferences Among The Alternatives Regarding Benefit / Cost Analysis. *Q3 Write A Detailed Note On Analysis Of Public Projects. *Q4 What Is Cost Benefit Analysis? Also Write Its Advantages. *Q5 What Do You Understand By Quantification Of Project? Q6 What Are The Applications Of Benefit/Cost Analysis? Q7 Explain Cost Effectiveness Analysis Citing An Example. Q8 How Public Projects Are Analysed? Q9 What Are Various Irregularities In B/C Comparisions Q10 What Is Consumer Surplus? Explain.
Unit IV Q1 Define Depriciation. What Are The Causes Of Depreciation? *Q2 Write Down Advantages Of Depriciation Calculation. *Q3 Explain Any Two Depreciation Calculation Methods In Detail. *Q4 How Depreciation And Tax Are Related .Explain With The Help Of Any Suitable Example?Write A Short Note On After Tax Economic Comparisions. *Q5write A Short Note On Relevant Cost Of Decision Making. *Q6 Explain Break Even Analysis. *Q7 Discuss Advantages Of Bea.Fixed Cost Of Manufacturing A Product Is Rs 2 Lacs.Cost Of Manufacturing Unit Product Is Rs20.If Manufacture Want To Break Even In One Year By Producing 25000 Units, What Should Be The Units Of Sales Price? Q8 What Is Process Costing? What Are The Conditions Which Favour Use Of Process Costing? Q9 Give Merits And Demerits Of Process Costing? OAA/HANDBOOK/2012-13/B.TECH/ECE/III-SEM Page 70
Q10 Definr Standard Cost.What Are The Preliminaries To Be Considered In Establishing A System Of Standard Costing? Q11 What Are The Various Advantages And Limitations Of Standard Costing? *Q12 Explain The Procedure Of Standard Costing In General. Q13 Differentiate Between Cost Control And Cost Reduction. Q14 Explain The Various Techniques Of Cost Reduction. Q15what Are The Various Areas Of Applications Of Cost Reduction. Q16 What Are The Various Tools That Business Firms Use For Cost Control? Q17 Discuss The Various Methods For The Estimation Of Cost Function.
Page 71

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Handbook 1 B.tech Ece III Sem Quantity 180

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(STUDENTS HANDBOOK)

FOR B.TECH ECE II YEAR- III Semester [Session- 2012-2013]

(Authorized proprietary of)

Dev Bhoomi Group of Institutions, Dehradun

With Best Wishes (Dev Bhoomi Group of Institutions)

UTTARAKHAND TECHNICAL UNIVERSITY, DEHRADUN

TCS-301 Computer Based Numerical Technique LTP 200

DIGITAL ELECTRONICS AND DESIGN ASPECT

THU-301 ENGINEERING ECONOMICS

PEC 351 LTP 002

ELECTRONIC CIRCUITS LAB

DIGITAL ELECTRONICS LAB

C.B.N.S.T/SANTOSH KUMAR,GUPTA, MALIK, MANISH GOYAL

C.B.N.S.T/JAIN IYENGAR & JAIN, GUPTA,MALIK,

C.B.N.S.T/SANTOSH KUMAR,GUPTA, MALIK, MANISH GOYAL

C.B.N.S.T/SANTOSH KUMAR,GUPTA, MALIK, MANISH GOYAL

C.B.N.S.T/SANTOSH KUMAR,GUPTA, MALIK, MANISH GOYAL

C.B.N.S.T/SANTOSH KUMAR,GUPTA, MALIK, MANISH GOYAL

LECTURE PLAN OF EDC

DEPARTMENT-E.C.E DATE: 14/06/12

J.B.GUPTA 1-30 R.K.SINGH 40-68

SANJAY SHARMA J.B.GUPTA

R.K.SINGH SANJAY SHARMA 220-249 J.B.GUPTA 305-398 R.K.SINGH

J.B.GUPTA 426-456 R.K.SINGH 459-500 SANJAY SHARMA 500-525 J.B.GUPTA R.K.SINGH

SANJAY SHARMA J.B.GUPTA 152-178 R.K.SINGH SANJAY SHARMA J.B.GUPTA R.K.SINGH

L38 L39 L40

SANJAY SHARMA J.B.GUPTA R.K.SINGH

LECTURE PLAN: DIGITAL ELECTRONICS& Aspect Design

Topic Unit-I: Introduction Characteristics of

Mano & A. 63-80, Kumar

103-111, 279-282, M. Morris Mano& A. Kumar 23-26,

M. Morris Mano& A. Kumar

128-136, 125-127, 142-151, 137-139, 141-142, 282-284, 287-291,

M. Morris Mano M. Morris Mano

A.K. Gautam A.K. Gautam A.K. Gautam R.P. Jain,

433-434 413-414, 426-433,

Unit-II: Transducers Passive transducers: Resistive, Inductive Capacitive Transducer

A.K. Sawhney A.K. Sawhney D. Cooper

L11 L12 L13-L15

593-597 L16 L17 M. M. S. Anand

Electronics Analog meters: L21-L22 Electronics analog DC and AC voltmeter and

Ammeters, Electronic analog ohmmeter and multimeter

1125-1137 L4-L5 A Chakravarti

622-627, 636-637, 534-588, 544-554,

Sudhaker&Palli K M Soni. A Chakravarti

528-530, 571-579, 738-741,

L26-L28 779-790, 805-812, D.R.Choudhary L29-L30

LECTURE PLAN OF ENGINEERING ECONOMICS

Time value of money Riggs Bedworth Randhawa

Simple and compound interest,

Time value equivalence

Compound interest factors

90 Dr. Himanshu Agarwal Riggs Bedworth Randhawa

Riggs Bedworth Randhawa

92 Riggs Bedworth Randhawa

LT18-LT19 pay back period

Dr. Himanshu Agarwal Riggs Bedworth Randhawa

LT25-LT26 Internal rate of return Dr. Himanshu Agarwal

298 Riggs Bedworth Randhawa

Dr. Himanshu Agarwal Page 26

Cost control and Cost reduction techniques. Dr. Himanshu Agarwal

LT-50 Dr. Himanshu Agarwal