Topic Video 03D

Assembly Language: Using it

3D

Monday, 31 August 2009

Structured Assembler Programming

An assembler program consists of the following in this order:
Program Header The program header should briey explain what the program does. The authors name should be listed so blame or praise can be passed on to the appropriate person. The program header should also contain the date and revision history, and list any additional les that are required to assemble the program. Example
; Program Header Example version 1.1 ; ;This is an example of a program header, it contains examples of the sort of information you would expect to nd in a program header. ;Source File: ALP2.ppt ;Author: Brett Wildermoth ;Created: 09/09/2002 ;Modications: version 1.1 xed spelling errors ; version 1.0 - None

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Structured Assembler Programming

Assembler Equates After the program header the assembler equates should be listed. These include all assembler related constants, that are substituted during the assembly process. Assembler equates can consist of three possible types:
System Equates: Equates such as equates to Monitor Routine or I/O ports. Constant Equates: Equates to constants used in the program Memory Map Equates: Equates dening the different sections of the memory map

Monitor Equates ;
ut2hex: o EQU $FE16 I/O Equates ; ORTA: P EQU $0000 DRA: D EQU $0002 Constant Equates ; NE: O EQU 1 Memory Map Equates ; RG P EQU $0D00 RAM S EQU $0800

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Structured Assembler Programming

Variables
Any data that may change its value during the lifetime of the software. Generally this section will be preceded by an ORG statement referring to RAM.

Program Location
The program location contains only one line with a single ORG pseudooperator, that denes the starting location of the program.

Program Initialisation
This section of the code contains instructions related to initialising system resources such as the stack pointer.

Main Program Body

This is the major section of any assembler program and contains the programs instructions.

Constants Vector Table

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Structured Assembler Programming

Example
;***************************************************************** ; Example Assembly Program version 1.1 ; ;This is an example of an assembly program, it contains examples of the sort of information you would expect to nd in an assembly program. ;Source File: main.asm ;Author: Brett Wildermoth ;Created: 11/02/2008 ;Modications: version 1.1 xed some errors ;***************************************************************** ; export symbols XDEF Entry ABSENTRY Entry

Program Header

Using an assembler directive to tell it were the start of the code is.

; export 'Entry' symbol ; for absolute assembly: mark this as application entry point

File full of Assembler Equates Assembler Equates

; include derivative specic macros INCLUDE 'mc9s12xdp512.inc' ROMStart EQU $4000 ; absolute address to place my code/constant data

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Structured Assembler Programming

Example
; variable/data section ORG RAMStart ; Insert here your data denition. ; code section ORG ROMStart Entry: LDS CLI MainLoop: #RAMEND+1

Variables go here.. Program Start Program Initialization Main Program Body

*

Spin: BRA Spin ;************************************************************** ;* Interrupt Vectors ;************************************************************** ORG $FFFE DC.W Entry ; Reset Vector

(more on this later)

Vector Table

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Structured Assembler Programming

The focus of structured assembly code is on readability. Example
; Enable Port A with 0-3 for input and 4-7 for output INIT: MOVB #%11110000,PortA

With higher level languages such as C, the program ow is dened using various structures, such as:
Functions While / Repeat-until structures For looping structures If-Then-Else structures

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Controlling the Program Flow

Functions

A function in an assembler program is commonly referred to as a subroutine. A subroutine consists of a series of instructions, terminated by the RTS instruction. A subroutine is called using the JSR (jump-to-subroutine) instruction. A subroutine is always preceded by subroutine or function header containing the following information:
Title Description, including relevant constants used, etc. Inputs Outputs Author, Date, and Revision

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Controlling the Program Flow

Functions

This would be replaced by JSR InitSCI in the assembly code.

BEGIN

InitSCI(IN: OUT:)

AMAP =1

InitSCI(IN: OUT:)

SCIACR1 =0 SCIACR2 =1
. . . This would be the place for the RTS command in the assembly code.

END

END

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Controlling the Program Flow

Functions: Subroutine Example
; Title: InitSCI ; Description: This routine will initialise the SCI interface with the following parameters: ; - 9600 Baud Rate ; - No Parity ; - 1 stop bit ; Inputs: None ; Outputs: None ; Author: Brett Wildermoth, 09/09/02, Rev 1.0 InitSCI: BSET SCISR2,AMAP MOVB #0,SCIACR1 MOVB #0,SCIACR2 ... RTS

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Controlling the Program Flow

While-Do Structures
C syntax:
while (A<10) { } Assembler syntax: ; while (A<10) BEGIN LOOP: CMPA #10 BEQ wend ;Do ;EndDo BRA LOOP wend: ; while END
A==10 BEGIN

T
END

F
Do something

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Controlling the Program Flow

Repeat-Until Structures
BEGIN

Example: Using a repeat-until structure repeat a section of code until the condition A>10 is no longer met.
; Repeat BEGIN LOOP: CMPA #10 BNE LOOP ; Until (i>10) Repeat END ; END_WHILE
Do something

A>10

END

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Controlling the Program Flow

For-loop Structures
BEGIN Label LOOP refers to this point on the owchart

Example
; FOR (B=10;B>0;B--) LDAB #10 LOOP: DBNE B,LOOP ;END_FOR
DBNE Instruction

B=10

Do something

B=B - 1

B!=0

F
END

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Controlling the Program Flow

If-Then-Else Structures
The If-Then-Else structure is the most commonly used method of changing the ow of a program. If statements are used to change the ow of the program when a condition is met.

CHK:

CMPB #10 ; IF (B==10) BEQ THEN ; Else do this ELSE: BRA END ; Then do this THEN: ;End of IF END:

Then Path

B==10

Else Path

Do something

Do something else

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Controlling the Program Flow

If-Then-Else Structures
CMPB #10 ;IF B<10 BGE CHK2 ;Then do this BRA END-IF CHK2: CMPB #10 ;IF B==10 BNE CHK3 ;Then do this BRA END-IF CHK3: CMPB #20 ;If B>20 BLE ELSE ;Then do this BRA END-IF ;Else do this ELSE: END-IF: ;END of IF

CHK2

B<10

Do this

CHK3

B==10

Or do this

ELSE

B>20

Or do this

Otherwise do this

ENDIF

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Dening Data and Data Types in Assembler

Data in assembler programs falls into two possible categories, either it is a constant or a variable. Constants can not be altered during normal program execution and remain at a constant value throughout the programs life. Variables on the other hand do not remain constant, they can be change by the program at any given time. The way constants and variables are dened in an assembler program depends on both the assembler directives used and the memory location in which the value is stored. Constants are dened using DC assembler directive and reside in the ROM region of memory, directly following the program. Variables on the other hand are dened using DCB and DS assembler directives and reside only in the RAM region of memory.

String Constant Example ;Following Program NAME: DC.B Timmy

Single Byte Variable Example ORG Data: DS RAMSTART 1

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Dening Data and Data Types in Assembler

Constants

Strings: A string is made up of a series of characters, used mainly for display purposes.
For example: STR: DC.B The temperature is

8 bit constants: A constant value in the range 0 to 255 or 127 to 127.

For example: Delay: DC.B Delay: DC.B Delay: DC.B 20 @12 $45

16 bit constants: A constant value in the range 0 to 65535 or 32767 to 32768.

For example: Delay: DC.B DC.B Delay: DC.B Delay: DC.W 20 01 20,10 $2345

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String Example
MainLoop: JSR LDX Loop: LDAB CMPB BEQ JSR INX BRA BEGIN InitSCI #Str 0,X #0 Spin PutChar Loop B==0 END InitSCI(IN: OUT:) X=Str B=M[X]

Spin: BRA Spin ;Base Address for SCI1 Serial_Base EQU $00D0 ;Add serial routines INCLUDE 'Serial.inc' ; Constants go here. Str DC.B 'Hello World',$00

PutChar(IN: B OUT:)

X=X+1

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Dening Data and Data Types in Assembler

Variables / Arrays

Single Variable Example

Single: Double: ORG $RAMSTART DS 1 ;a single 8bit variable location DS 2 ;a double 8bit or single 16bit variable location.

Array Example

Array:

ORG $RAMSTART DS 20 ; an array consisting of 20 bytes.

Accessing the Array

LDX LDAA LDAA STAA #Array 0,X ;Load array[0]. 1,X ;Load array[1]. 19,X ;Save to array[19]

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Lookup Tables
Preinitialised Arrays

Examples of lookup tables:

char: DC.B 123A456B789C 0.# k char: DCB $41 k DC.B $42 DC.B $23

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Dening Data and Data Types in Assembler

Variables: Static or Dynamic
; variable/data section ORG RAMStart ; Insert here your data definition. Buffer DS 200 ... mainLoop: JSR InitSCI LDAA #0 LDX #Buffer LOOP: JSR GetChar STAB 0,X INX INCA CMPA #200 BNE LOOP Spin: BRA Spin Serial_Base EQU $00D0 ;Base Address for SCI1 INCLUDE 'Serial.inc' ;Add serial routines

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Dening Data and Data Types in Assembler

Variables: Static or Dynamic

Example
Our program grabs a character from the serial port and stores it in consecutive memory locations starting at $2000 until a CR character is detected.
MainLoop: JSR Loop: InitSCI LDX #$2000 JSR GetChar STAB 0,X INX CMPB #$OD BNE LOOP BRA Spin EQU $00D0 INCLUDE 'Serial.inc'

Spin: Serial_Base

;Base Address for SCI1 ;Add serial routines

The string that is being stored at $2000 can be of any length and the size changes each time the program is executed.

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Debugging
Debugging software running on a microcontroller can be achieved using many different approaches including: In Circuit Emulator (ICE) ROM monitor systems Breakpoints Background Debugger JTAG Logic Analyser

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In-Circuit Emulator
The in-circuit emulator (ICE) was one of the most popular methods used in embedded system debugging. An in-circuit emulator is a device consisting of two components, an emulator running on a host system and an adapter connected to the host at one end and sitting in place of the actual MCU at the other, providing all the functionality of the real MCU. The emulator attempts to completely replace the MCU, allowing the user the ability to stop the ICE at anytime and view the internal registers and memory of the emulated MCU at each individual clock cycle. The user has access to all the data provided on the inputs of the ICE and can trace the ow of data. The benets of an ICE include:
Able to insert the debugger into the actual circuit and debugged programs in actual application situations. Allow the programmer the ability to debug MCUs which do not contain a built-in debugger.

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In-Circuit Emulator
The use of an ICE for debugging purposes is no longer worthwhile for the following reasons:
Modern day processors contained many pins at an extremely high pin density, making in-circuit emulators difcult, if not impossible to manufacture. The architecture of the modern processor is extremely difcult to emulate in real-time. Many modern processors contain instruction pipelines and multiple buses, that operate faster than any emulator ever could. Delays caused by the emulator create more problems in debugging the system. Connecting the emulator to the target via a cable consisting of many signal lines makes the debugging process difcult.

ICE debuggers are now a thing of the past since many prcoessors now contain on-chip debuggers.

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ROM Monitor Systems

Many modern day microcontrollers are shipped with a built-in debugger resident in the on-chip ROM area of the controller. The monitor communicates with the user through a terminal connected via an RS232 interface to the microcontroller. Monitor programs provide a prompt on the screen and many useful commands and built-in functions to aide in the development and testing of source code. The monitor allows a host computer to communicate with the processor. During development and testing of programs the debugger is used to load, execute and debug the source code. When debugging is complete, the monitor is overwritten by the developed source code.

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Background Debugger
Background Debug Module (BDM)
The BDM module has replaced the need for an in-circuit emulator. Using a BDM pod is it possible to read and write to the memory of the target system, view and modify registers in the target system and also trace a single instruction at a time. The BDM setup consists of single wire connection between the BDM pod and the target system, the connection is made to the BGND pin on each of the MCUs.

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Joint Test Action Group

Common name for the IEEE 1149.1 standard titled Standard Test Access Port and Boundary-Scan Architecture. Allows for easy programming and debugging of Target platforms.

JTAG

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BSC

BSC

Every JTAG enabled device contains Four dedicated JTAG pins (TMS TCK, TDO, TDI) Every pin on the device is connected to a single bit buffer. All single bit buffers are daisy-chained together from TDI to TDO. The values in these buffers can be serially read and modied.
Figure from Texas Instruments JTAG Primer.

Input Pins

Core Logic

BSC

BSC

Joint Test Action Group

OE

BSC

JTAG

Boundary-Scan Register

Output Pins
BSC

BSC

BSC

User Data Register TDI Bypass Resister Instruction Register TMS TCK TAP

TDO

Note: The boundary-scan register is shifted TDI to TDO.

Figure 3-2. Boundary-Scan Architecture

3-4

Boundary-Scan Architecture and IEEE Std 1149.1

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BSC

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Logic Analyzers
As time has progressed, electronic systems have become larger and more complex. The oscilloscope is a priceless tool for analyzing electronic circuits. However, the oscilloscope has it limitations:
The wave form must be repetitive for it to be displayed properly. Oscilloscopes are limited to only a small number of inputs, with four being the largest number of inputs found on an oscilloscope.

Due to these limitations the oscilloscope is not the best tool for analyzing digital or P circuitry. To successfully analyze a digital circuit built around an 8 bit P, a device would be required that would be capable of monitoring 8 data lines, 16 address lines and several control lines, such a device is known as a logic analyzer.

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Logic Analyzers

A basic logic analyzer system consists of many probes, which are connected to the electrical signals to be monitored on the P, a pod which interfaces the probes to the logic analyzer, and of course the logic analyzer itself. Each digital signal (0 or 1) is connected to a separate channel on the logic analyzer. The logic analyzer continually samples each channel and writes the data to its internal memory until a trigger event causes it to stop.
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Logic Analyzers
The logic analyzer can monitor the signals on many lines simultaneously. The data can be viewed in one of two possible ways:
The data or addresses can be displayed as binary, octal, or hexadecimal numbers. Or the data can be displayed as a timing diagram, where each signal forms a line across the screen represented by a series of pulses.

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Logic Analyzers
Both an oscilloscope and a logic analyzer rely on a trigger event, on an oscilloscope the signal can only be viewed after a trigger has occurred. The logic analyzer however allows the signal to be viewed before and after a trigger has occurred.

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