LIST OF FIGURES

S.No 1 2(a) Figure Name Principle of 3D technology Two variants of the stacked tape carrier vertical interconnect stacked TAB on PCB 2(b) two variants of the stacked tape carrier vertical interconnect stacked TAB on lead frame 3(a) Three variants of the solder edge conductors vertical interconnections-solder edge contacts 3(b) Three variants of the solder edge conductors vertical interconnections- solder filled via 3(c) Three variants of the solder edge conductors vertical interconnections stacked PCB lead frames 4 5 6 7 8 A photograph of an edge array with solder balls fabricated at MCNC Thin film metal T-connects for vertical interconnections Direct laser writing process for vertical interconnections 5 6 7 7 4 4 3 3 Page No 1

Texas Instruments array TAB leads soldered to bumps on a silicon substrate 8 Vertical interconnection method where a chip is flip bonded to the side of the stacked MCMs 9 Schematic diagram of a PCB solder to TSOPs and (b)a cross sectional view of the upper schematic 9 Schematic diagram showing how ICs are stacked and interconnected using a flex type material 10 11

9(a)

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11 12 (a)

Vertical interconnection approach using wire bonding techniques Schematic diagram of two chips stacked and interconnected using wire bonding and (b) a top view of the upper schematic diagram

11 12 13

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Schematic diagram of two chips stacked using flip-chip technology Schematic diagram of Hughes micro spring vertical interconnect method A soldered leads on stacked MCMs vertical interconnection method, which is a variant of the solder edge conductors method

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16(a)

GE method for stacking MCMs with edges interconnected on the sides of the cube; (b) cross-sectional view of (a) 15 16

17 (a) (b)

Schematic diagram of an MCM with the blind castellation method a schematic diagram of three MCMs stacked using the blind castellation method

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18(a) (b) 19

Schematic for an arrays of contacts between MCMs with through-hole via 18 two MCMs are stacked by applying a mating force Schematic diagram of TUB stacking technology showing the uses of elastomeric connections for vertical interconnections 19 18

20(a)

Schematic diagram of a vertical interconnection approach using an anisotropic conductive material 20 20 shows two MCMs stacked using this method Stacked MCM using solder balls arrays on top and button of substrate Layers 21 21

(b) 21

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Two wafers stacked using filled vias method A graphical illustration of the silicon efficiency between MCMs and 3-D technology

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A comparison between the wiring lengths in 2-D and 3-D structures A comparison between 2-D and 3-D packaging in terms of the accessibility and usability of interconnection

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A comparison between 3-D and 2-D structures in terms of the possible number of interconnections assuming one routing layer for the 2-D structure 26

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3D Technology used in various applications

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