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Cmosttl
Cmosttl
Cmosttl
June 6, 1997
Tony King University of Houston Electrical and Computer Engineering 4800 Calhoun Rd. Houston, TX 77204-4793 (713) 743-4423 (713) 743-4444 tking@uh.edu Project Four Weeks Lab/Home
Summary The project is to design, simulate and construct a CMOS-to-TTL converter and a TTL-toCMOS converter. Each team prepares an oral and written report in conjunction with their prototype demonstration.
ABET Descriptors Engr Sci Content: Type: Elements: Features: Constraints: Effort: Digital Electronics System Synthesis, analysis, construction, testing and evaluation Development of student creativity, use of open-ended problems, consideration of alternative solutions Performance Team
June 6, 1997
Design, simulate, build and demonstrate a CMOS-to-TTL interface circuit and a TTL-toCMOS interface circuit using common lab kit parts. The demonstration shall include using the circuit to drive a TTL (CMOS) logic gate with a CMOS (TTL) logic gate. Use a 74LS04 as your TTL gate and an inverter constructed from the CD4007 as your CMOS gate.
VDD CMOS v O
V vI
CMOS
Set VDD = 10 V. Plot the transfer characteristics of the two circuits. Measure the propagation delays for a 1 MHz input square wave. Verify that the circuits operate properly for the full range of VDD and the maximum frequency of the slower inverter.
Your formal report should be well organized and conform to the guidelines distributed in class [10%]. The report should include the following sections in addition to the abstract, introduction and references: Theory: What results do you anticipate? Perform the experiments mentally and document your expectations (estimates, sketches, etc.). I recommend doing this before setting foot in the lab. It can both enhance your understanding of the project and save time. [25%] What were the simulation results? Include the circuit drawings and data plots in your report. Create a folder named DP-(group name) containing all your files and submit them electronically. [25%] What were the experimental results? Include experimental procedures, circuit diagrams and data in tabular form. Data should also appear in graphical form where appropriate. [25%]
Simulation:
Experiment:
June 6, 1997
Analysis:
How do the experimental results compare with the simulation results and your expectations? How do you account for any discepancies? [15%]
A signup sheet will be posted for reserving time to present projects to the instructor. The written report must be submitted at least 24 hours prior to this presentation. After the presentation, questions will be directed to each student to assess familiarity with the project. Individual grades will be assigned based on these written and oral presentations. You will have 30 minutes to present your project. You will be expected to come to the presentation with a finished, working project. If the project is not functioning properly, your grade will be reduced accordingly.
June 6, 1997
Logic Converters
Engineering Notes: The instructor must specify in advance a set of acceptable parts and the final report format. Objectives/Comments: Be prepared to discuss CMOS and TTL logic.
Expected Outcomes: Students have an opportunity to use digital electronics to solve an open-ended design problem.