ADDRESSING

Addressing modes are an aspect of the instruction set architecture in most central processing unit (CPU) designs. The various addressing modes that are defined in a given instruction set architecture define how machine language instructions in that architecture identify the operand (or operands) of each instruction. An addressing mode specifies how to calculate the effective memory address of an operand by using information held in registers and/or constants contained within a machine instruction or elsewhere. addressing mode One of a set of methods for specifying the operand(s) for a machine code instruction. Different processors vary greatly in the number of addressing modes they provide. The more complex modes described below can usually be replaced with a short sequence of instructions using only simpler modes. The most common modes are "register" - the operand is stored in a specified register; "absolute" - the operand is stored at a specified memory address; and " immediate" - the operand is contained within the instruction. Most processors also have indirect addressing modes, e.g. "register indirect", "memory indirect" where the specified register or memory location does not contain the operand but contains its address, known as the " effective address". For an absolute addressing mode, the effective address is contained within the instruction. Indirect addressing modes often have options for pre- or post- increment or decrement, meaning that the register or memory location containing the effective address is incremented or decremented by some amount (either fixed or also specified in the instruction), either before or after the instruction is executed. These are very useful for stacks and for accessing blocks of data. Other variations form the effective address by adding together one or more registers and one or more constants which may themselves be direct or indirect. Such complex addressing modes are designed to support access to multidimensional arrays and arrays of data structures. The addressing mode may be "implicit" - the location of the operand is obvious from the particular instruction. This would be the case for an instruction that modified a particular control register in the CPU or, in a stack based processor where operands are always on the top of the stack. In IBM System 370/ XA the addressing mode bit controls the size of the effective address generated. When this bit is zero, the CPU is in the 24-bit addressing mode, and 24 bit instruction and operand effective addresses are generated. When this bit is one, the CPU is in the 31-bit addressing mode, and 31-bit instruction and operand effective addresses are generated.

Common Addressing Modes:

The common addressing modes are as follows:

 Immediate Addressing In immediate addressing, the instruction itself contains the value to be used. This is like using a constant like 7 or 39 in an expression in a higher level language. Direct Addressing In direct addressing, the instruction tells where the value can be found, but the value itself is out in memory. In a high level language, direct addressing is frequently used for things like global variables. Indirect Addressing If the AC register contained 1500 and if the location 1000 (DATA1) contained 2000 and if location 2000 contained 100, then AC would contain 1600 after completion of the operation. The 2000 contained in DATA1 was interpreted as the address of the operand rather than the operand itself. Register Addressing: add a,b The operands of the instruction refer to specific registers. The contents of register B are added to the accumulator a += b; Register Indirect Addressing: add a,[b] The operands of the instruction refer to specific registers Register b contains an address. The contents of this address are added to the accumulator. int x = 2; b = &x; a += *b; Displacement (Indexed) In displacement addressing mode there are 3 types of addressing mode. They are : 1) Relative addressing 2) Base register addressing 3) Indexing addressing.

This is a combination of direct addressing and register indirect addressing. The value contained in one address field. A is used directly and the other address refers to a register whose contents are added to A to produce the effective address.

Stack Addressing:

Stack is a linear array of locations referred to as last-in first out queue. The stack is a reserved block of location, appended or deleted only at the top of the stack. Stack pointer is a register which stores the address of top of stack location. This mode of addressing is also known as implicit addressing.

BIBLOGRAPHY:http://en.wikipedia.org/wiki/Addressing_mode http://umcs.maine.edu/~cmeadow/courses/cos335/COA11.pdf http://www.cs.nmsu.edu/~pfeiffer/classes/273/notes/immdirext.html http://cs-alb-pc3.massey.ac.nz/notes/59233/lect16.html http://www.ligaturesoft.com/cheap-computers/addressing-mode.html "IBM System/370 Extended Architecture Principles of Operation", Chapter 5., 'Address Generation', BiModal Addressing. (1995-03-30)