Incubated by Science and Technology Park, University of Pune, DST. www.imct.

in

Analog Layout
Course: Duration: Dates: Time: Eligibility: Objectives: Learn analog IC mask layout design concept. To know analog specific methodology for analog circuits. To know practical issues while fabrication especially in micron and deep sub-micron technologies. To understand Tanner Flow. Results: Expected results Trainee will be able to develop an intuitive fabrication oriented understanding of IC mask design and what special consideration one needs while developing mask for analog circuits in deep sub-micron technologies. To develop basic layout on Tanner. Skills developed: Understanding of chip fabrication steps. Understanding of mask layout on deep sub-micron technologies. Layout skills on Tanner. Analog layout (We recommend analog design course with this course) 2 days (5-6hrs/day) - 10:00 to 13:00 hrs and 14:00 to 17:00 hrs BE/ BTech/ ME/MTech (CSE / E&TC / Electronics)

Training Details
Part-1 What is layout? Revisit process for fabrication. LAB-1 Layout of NMOS and PMOS. Layout of Invertor. Layout of Current mirror

Part-2 Understanding the concept of design Rules and PDK. Understanding the concept of DRC, LVS. Review of layout of Invertor and current mirror with PDK Part-3 Understanding Understanding Understanding issues. Understanding Understanding Understanding Understanding LAB-3 Layout Layout Layout Layout

advance layout issues. gradient issues. Fingring and Matching (interdigitise, common centriod) guardrings issues. parasitics issues. Electromigration, antenna effect, Bird's beak. current density concepts.

for for for for

resistors and capacitors. single stage differential amplifier. two stage opamp. other typical blocks

Advantages of training: 1. It is necessary for all core electronics and communication engineers to have in depth knowledge and understanding of Analog design and layout. 2. iMCT experts will assist students to bring Analog design and layout knowledge to industry standard mark. 3. It will be added advantage for their curriculum and they could get good opportunities in the best organizations to work with. Though this activity will be added advantage, it is not out of syllabus and scope for students and trainee will get chance to learn edge over others to be a better designer and better overview of integration of Analog design and layout 4. More inclined towards real issues in deep sub micron technologies. 5. iMCT will help collages and universities to build high-tech Analog design and layout lab and use it effectively. 6. Training will be given by iMCTs highly experience engineering resource. 7. iMCT is the 1st organization who is delivering such training programs based on industry projects and not available in the educational system till the date in such a low cost.

Prerequisite: Understanding of device physics. Understanding of fabrication steps.

NOTE: The training will be conducted by iMCTs expertise and delivered to only college students, staff and industry people. Time for training can be extended if required. Training will be conducted in the premises of collage/University, it is expected that college will provide required logistics like classroom, lab room with all prerequisite like computer, software, LCD projector. If students want to take training in iMCT/STP premises need to intimate 15 days before the training schedule. We have other courses RTOS with ARM 7, Linux programming, Advance topics like Verilog HDL forIC design and Verification, Open Source Verification Technology for IC design Please contact us for more details on support@imct.in and sales@imct.in

Mrs. Prajakta Pathak

Head, iMCT, Pune Mobile: (+91) 9922441095 Mail-id: prajacta@imct.in Website : www.imct.in