EC 2205 - ELECTRONIC CIRCUITS I

(FOR III SEM ECE STUDENTS)

UNIT-I
PREPARED BY
S.REVATHI
DEPARTMENT OF ECE
S.A.ENGINEERING COLLEGE, CHENNAI-600077
ELECTRONIC CIRCUITS I
UNIT I : TRANSISTOR BIASING
BJT Need for biasing - Fixed bias circuit, Load line and quiescent point. Variation of
quiescent point due to h
FE
variation within manufacturers tolerance. Stability factors.
Different types of biasing circuits. Method of stabilizing the Q point to the extent
possible. Advantage of Self bias (voltage divider bias) over other types of biasing. Use
of Self bias circuit as a constant current circuit. Source self bias and voltage divider bias
for FET. Use of JFET as a voltage variable resistor.
UNIT II : MIDBAND ANALYSIS OF SMALL SIGNAL AMPLIFIERS
CE, CB and CC amplifiers. Method of drawing small-signal equivalent circuit. Midband
analysis of various types of single stage amplifiers to obtain gain, input impedance and
output impedance. Millers theorem. Comparison of CB, CE and CC amplifiers and their
uses. Darlington connection using similar and Complementary transistors. Methods of
increasing input impedance using Darlington connection and bootstrapping. CS, CG and
CD (FET) amplifiers. Multistage amplifiers.
Basic emitter coupled differential amplifier circuit. Bisection theorem. Differential gain.
CMRR. Use of constant current circuit to improve CMRR. Derivation of transfer
characteristic, Transconductance. Use as Linear amplifier, limiter, amplitude modulator.
UNIT III : FREQUENCY RESPONSE OF AMPLIFIERS
General shape of frequency response of amplifiers. Definition of cut off frequencies and
bandwidth. Low frequency analysis of amplifiers to obtain lower cut off frequency
Hybrid pi equivalent circuit of BJTs. High frequency analysis of BJT amplifiers to
obtain upper cut off frequency. High frequency equivalent circuit of FETs. High
frequency analysis of FET amplifiers. Gain-bandwidth product of FETs. General
expression for frequency response of multistage amplifiers. Calculation of overall upper
and lower cut off frequencies of multistage amplifiers. Amplifier rise time and sag and
their relation to cut off frequencies.
UNIT IV : LARGE SIGNAL AMPLIFIERS
Classification of amplifiers (Class A, B, AB, C&D), Efficiency of class A, RC coupled
and transformer-coupled power amplifiers. Class B complementary-symmetry, push-pull
power amplifiers. Calculation of power output, efficiency and power dissipation.
Crossover distortion and methods of eliminating it.
Heat flow calculations using analogous circuit. Calculation of actual power handling
capacity of transistors with and without heat sink. Heat sink design.
UNIT V : RECTIFIERS AND POWER SUPPLIES
Half-wave, full-wave and bridge rectifiers with resistive load. Analysis for Vdc and
ripple voltage with C, CL, L-C and C-L-C filters. Voltage multipliers Zenerdiode
regulator. Electronically regulated d.c power supplies. Line regulation, output resistance
and temperature coefficient. Switched mode power supplies. Power control using SCR.
UNIT I
TRANSISTOR BIASING
BJT.
Need for biasing.
Fixed bias circuit, Load line and quiescent point.
Variation of quiescent point due to h
FE
variation within manufacturers
tolerance.
Stability factors.
Different types of biasing circuits.
Method of stabilizing the Q point to the extent possible.
Advantage of Self bias (voltage divider bias) over other types of biasing.
Use of Self bias circuit as a constant current circuit.
Source self bias and voltage divider bias for FET.
Use of JFET as a voltage variable resistor.
2 MARKS QUESTIONS
1. What is an amplifier?
A circuit that increases the amplitude of the given input signal in an amplifier.
2. What is biasing?
The process of giving proper supply voltages and resistances for obtaining the Q
Point is called biasing.
3. What is a bias? What is the need for biasing?[MAY-2004]
The proper flow of zero signal collector current and the maintenance of
proper collector emitter voltage during the passage of signal is known as transistor
biasing. When a transistor is biased properly, it works efficiently and produces no
distortion in the output signal and thus operating point can be maintained stable.
4. What is meant by operating point Q?
The zero signal values of I
C
and V
CE
are known as operating point. It is
also called so because the variations of I
C
and V
CE
take place about this point,
when the signal is applied.
5. What are the factors to be considered for selecting the operating point?
While selecting the operating point the following factors are to be considered
Dc and AC loads at the output of the stages
The maximum transistor rating.
The available power supply.
The peak signal execution to be handled by the amplifier.
The tolerance distortion.
6. What do you understand by DC and AC load line?
DC load line:-
It is the line on the output characteristics of a transistor circuit
which gives the values of I
C
and V
CE
corresponding to zero signal (or) DC
conditions.
AC load line:-
This is the line on the output characteristics of a transistor circuit
which gives the values of I
C
and V
CE
when the signal is applied.

7. What are the types of biasing?
Fixed bias.
Collector to base bias or collector feedback bias.
Self bias or emitter bias.

8. Define stability factor S.[MAY-2005]
The stability factor is defined as the rate of change of collector current I
C

with respect to the reverse saturation collector current I
C0
, keeping V
BE
and
constant.

0 0 C
C
C
C
I
I
I
I
S

9. What are the disadvantages of collector feedback bias?

The collector current is high.
If AC signal voltage gain feedback into the resistor R
e
, it will reduce the
gain of the amplifier.
10.Why voltage divider bias is commonly used in amplifier circuit?
The operating point will be in stable position.
The stability will be considerably improved.
I
C
can be reduced to the collector leakage current I
C0
.
11.What are all the factors that affect the stability of the operating
point?
Change of due to replacement of transistors
Thermal variation
12.What are the transistor parameters that vary with the temperature?
, I
C0
, V
BE
are the parameters varying with the temperature.
13.Define the stability factors S and S.
The stability factor S is defined as the rate of change of I
C
with V
BE
,
keeping & I
C0
constant.

BE
C
BE
C
V
I
V
I
S

'
The stability factor S is defined as the rate of change of I
C
with ,
keeping V
BE
& I
C0
constant.

C C
I I
S"
14.Give the stability factor S for the fixed bias circuit
The stability factor for the fixed bias circuits is

+ 1 S

= current gain of the transistor
15.Why fixed bias circuit is not used in practice?
The stability of the fixed bias circuit is very less. Since the stability factor
+ 1 S
, is a large quantity, therefore stability is less. So it is not used in
amplifier circuit.
16.What are the compensation techniques used for bias stability?
Diode compensation
Thermister compensation
Sensistor compensation.
17.List the advantages of the fixed bias.[MAY-2003]
The stability of the operating pointers greatly improved when compared
with the other circuits.
Less cost and simple circuit.
18.How FET is known as voltage variable resistor?
In the region before pinch off , where V
DS
is small the drain to source
resistance r
d
can be controlled by the bias voltage V
GS
. Therefore FET is useful as
a voltage variable (VVR) or voltage dependent resistor (VDR).
19.Why the input impedance of FET is more than that of a BJT?
The input impedance of FET as more than that of BJT because the input
circuit of FET is reversed biased where as the input circuit BJT is forward biased.
20. How self bias circuit is used as constant current source?
In the self bias circuit if I
C
tends to increase, because of I
C0
has risen as a
result of temperature, the current in R
e
increases. As a consequence of increase
in voltage drop across R
e
, that provides negative feedback , the base current is
decreased hence constant I
C
values maintained in the self bias circuit .
21.What is meant by stabilization?
The maintenance of the operating point fixed stable is known as
stabilization.
22.What is thermal runaway?
The excess heat produced at the collector base junction may even burn
and destroy the transistor. This situation is called Thermal runaway of the
transistor.

23.Write the different types of FET biasing circuits.
Gate bias.
Self bias.
Voltage divider bias.
Current source bias.
Drain feedback bias.
Zero bias.
24.Write the use of JFET as a voltage variable resistor.
Ono of the application of voltage variable resistor (JFET) is to vary the gain
of a multistage amplifier; as the signal level is increased. This action is called
automatic gain control (AGC).

25.What are the consideration factors that are used for the selection of an
operating point for an FET amplifier?
The consideration factors are
Output voltage swing.
Distortion.
Power dissipation.
Voltage gain.
Drift or drain current.

23. What is meant by compensation techniques? [MAY-2004]
Compensation techniques use temperature sensitive devices such
as diodes, transitors, thermistors, etc. to maintain operating point constant.
24. Draw a circuit which uses a diode to compensate for changes in I
C0.
25. Draw a circuit that minimizes change in V
BE
due to temperature
variation.[DEC-2004]
8, 16 MARK QUESTIONS
1. Describe how AC and DC load lines are drawn.
DC load line:-
It is the line on the output characteristics of a transistor circuit
which gives the values of I
C
and V
CE
corresponding to zero signal (or) DC
conditions.
The transistor is biased with a common supply such that the base
emitter junction is forward biased and the collector base junction is reversed
biased, i.e. transistor is in the active region.
In the absence of ac signal, the capacitors provide very high
impedance, i.e. open circuit. Therefore, the equivalent circuit for common emitter
amplifier because, as shown fig.
Applying Kirchhoffs voltage law to the collector circuit shown in fig.
We get,
V
CC
-I
C
(R
C
+R
E
) V
CE
= 0
V
CC =
I
C
(R
C
+R
E
) + V
CE
---------- 1
Where I
C
(R
C
+R
E
) is the voltage drop across R
C
and R
E ,
and V
CE
is the collector emitter voltage. If we arrange the
terms in equation 1 as

( ) ( )
E C
CC
CE
E C
C
R R
V
V
R R
I
+
+
1
]
1

+

1
dc
CC
CE
dc
R
V
V
R
+
1
]
1

1

E C dc
R R R +
---------- 2
And compare this equation with equation of straight line y = mx +c, where m is
the slope of the line and c is the intercept on y axis, then we can draw a straight line
on the graph of I
C
V
s
V
CE
which is having slope (-1/R
dc
) & y intercept V
CC
/R
dc
. To
determine the two points on the line we assume V
CE =
V
CC
& V
CE
= 0.
1. When V
CE
= V
CC
; I
C
= 0 and we get a point A.
2. When V
CE
= 0; I
C
= V
CC
/R
dc
& we get a point B.

The output characteristics of a common emitter configuration with points A and B, and
line drawn between them. The line drawn between points A and B is called dc Load line.
I
C
=
dc
CC
R
V
V
CE
=V
CC
P
Q
R
A
B
AC Load line:-
2. Draw the circuit diagram of self bias circuit using CE configuration and
explain how it stabilizes operating point.
Biasing:-
The process of giving proper supply voltages and resistances for obtaining
the Q point is called biasing.
Self bias:-
In this circuit, the biasing is provided by three resistors: R
1
, R
2
and R
E
.
The resistors R
1
and R
2
act as a potential divider giving a fixed voltage to
point B which is base.
If collector current increases due to change in temperature or change in ,
the emitter current I
E
also increases and the voltage drop across R
E

increases, reducing the voltage difference between base and emitter (V
BE
).
Due to reduction in V
BE
, base current I
B
and hence collector current I
C
also
reduces. Therefore, we can say that negative feedback exits in the emitter
bias circuit.
This reduction in collector current I
C
compensates for the original change
in I
C
.
CIRCUIT ANALYSIS:-
Base circuit:-
Voltage across R
2
is the base voltage V
B
.
Applying the voltage divider thermo to find V
B
, we get,

( )
( )
CC B
V
I R I I R
I R
V
+ +

2 1
2
B
CC B
V
R R
R
V
+

2 1
2

B
I I >>
Collector circuit:-
Voltage across R
E
(V
E
) can be obtained as,

V
E
= I
E
R
E
= V
B
- V
BE

E
BE B
E
R
V V
I


Applying KVL to the collector circuit we get,
V
CC
- I
C
R
C
V
CE
I
E
R
E
= 0

E E C C CC CE
R I R I V V
Simplified circuit of voltage divider Bias:-
Here, R
1
and R
2
are replaced by R
B
and V
T
,
where R
B
is the parallel combination of R
1

and R
2
and V
T
is the Thevenins voltage. R
B
can be calculated as

2 1
2 1
R R
R R
R
B
+

Applying KVL to the base circuit,

V
T
= I
B
R
B
+V
BE
+I
E
R
E
V
T
= V
BE
+(R
B
+R
E
)I
B
+I
C
R
E

B c E
I I I +
V
BE
=V
T
-(R
B
+R
E
)I
B
-I
C
R
E
Stability factor S for Voltage divider Bias:-
For determining stability factor S for voltage divider bias we will consider
the Thevenins equivalent circuit for voltage divider bias.
Here Thevenins equivalent voltage V
T
is given by

2 1
2
R R
V R
V
CC
T
+

the R
1
and R
2
are replaced by R
B
which is the parallel combination of R
1
and R
2.

2 1
2 1
R R
R R
RB
+

Applying KVL to the base circuit we get,
V
T
= I
B
R
B
+V
BE
+

(I
C
+I
B
) R
E

Differentiating w.r.t. I
C
and considering V
BE
to be independent of I
C
we get,
E E
C
B
B
C
B
R R
I
I
R
I
I
+

0
E B E
C
B
R R R
I
I
+

) (

B E
E
C
B
R R
R
I
I
+

We have already seen the generalized expression for stability factor S given by

,
_

C
B
I
I
S

1
1
-------------1
Substituting value of
C
B
I
I

in the equation 1 we get,

,
_

+
+
+

B E
E
R R
R
S

1
1

( ) ( ) ( ) ( )
( )
E B
B E
E E B
B E
R R
R R
R R R
R R
S

+ +
+ +

+ +
+ +

1
1 1
Dividing each term by R
E
we get,

( )
( )
E
B
E
B
R
R
R
R
S
+ +
+
+

1
1
1
The ratio R
B
/R
E
controls value of stability factor S. If R
B
/R
E
<<1 then the above eqn
reduces to

( )
( )
1
1
1
1
+
+

S
3. Explain in details: (i). Thermal runaway
(ii). Stability factors.
Thermal runaway:-
The maximum average power P
D(max)
which a transistor can
dissipate depends upon the transistor construction and may lie in the range
from a few milliwatts to 200 W.
The power dissipated within a transistor is predominantly
the power dissipated at its collector base junction.
Thus maximum power is limited by the temperature that the
collector- base junction can withstand.
For silicon transistor this temperature is in the range 150 to
225
0
C, and for germanium it is between 60 to 100
0
C.
The collector-base junction temperature may rise because of
two reasons:
(i). Due to rise in ambient temperature.
(ii). Due to self heating.
Self heating:-
The increase in the collector current increases the power dissipated
at the collector junction.
This, in turn further increases the temperature of the junction and
hence increase in the collector current.The process is cumulative and
it is referred to as self heating.
The excess heat produced at the collector base junction may even
burn and destroy the transistor.The situation is called Thermal
runaway of the transistor.
Thermal resistance:-
The steady state temperature rise at the collector junction is proportional to
the power dissipated at the junction. It is given as

D A
P T Tj T
Where,
T
j
= Juction temperature in
0
C.
T
A
= Ambient temperature in
0
C.
P
D
= Power in watts dissipated at the collector junction.
=Constant of proportionality.
The , which is constant of proportionality is referred to as thermal resistance.

D
A J
P
T T

Stability factors:-
The stability factor is defined as the rate of change of collector current I
C
with respect to the reverse saturation collector current I
C0
, keeping V
BE
and
constant.
I
C
= I
B
+ I
CEO.
(or) I
C
= I
B
+ (1+ )I
CEO