Professional Documents
Culture Documents
CMFB AMP 2008 NM
CMFB AMP 2008 NM
VGS
VDS
CMFB
What is the effect of mismatch between the PMOS current source and an NMOS current sink? Effect of mismatch between N and P MOS device currents
ID
VGS
VDS
Verr due to the transistor mismatches, in ID1 and ID2 , is given by: Vo=(Ip - In) ro = IRo
VB
VB
VB
VB
VB1
Vcmfb
VB1 VB1'
Vin-
VB4' VB4
Why CMFB?
For the case of a FD amplifier with current source loads implemented by PMOS transistors the common-mode level is ill defined.
Ill defined
Why CMFB?
Ill defined M3a M3b Common Mode Level
ITail
ITail
CM Qpts depend on how close IDM3a and IDM3b match BOTH each other and ITail/2. Why Mismatch ITail/2. is implemented by a NMOS source and M3a and M3b by a PMOS sink. Given that we are expecting delta I >gm Vos = (IDxKPxW/L) AVT/(WL) encompassing the bias generator and OTA. There is little hope of practical matching even excluding PVT temperatures. As a result either one of both if M3 or Mtail enter triode! WHY?
Why CMFB?
Ill defined M3a M3b Common Mode Level
ITail ITail The high impedance node DC Q points are difficult/impossible to set. Single-Ended & FF Op Amps and OTAs Amplifiers Small mismatches, temperature, process shift etc. VQ approach VDD or VSS, Tail transistor in triode or M3s in triode. Solution, negative feedback use in single ended circuits. CMFB circuits are singled ended CMFB feedback circuitry fixes the DC Qpt.
CMFB
Solution, negative feedback use in single ended circuits. CMFB circuits are singled ended CMFB feedback circuitry fixes the DC Qpt.
VCM_SET VCM_SET
ITail
ITail
ZI ZF
VB3
CMFB
I/0 characteristics of a FD Amplifier.
VODIF VCM_SET
VB3
Vocm
VIN+ - VIN-
Desired Common Mode Set Level or Qpt. Max Gain Max Signal range
CMFB
Vocm is set by adding negative (Correction Amp & Sense Ckt) feedback circuit to maximize gain & Signal swing of FD OTA. FD Amp Vo Basic Operation 1) Sensing the output CM level, Vocm = Vo+ + Vo= [ Vdiff+ + Vcmo] +[ Vdiff- + Vcmo ] = Vcmo 2) Comparison with a voltage reference i.e., Vcmo VCM_SET Feed back error correcting level to the amplifier bias circuitry. 3) System Check for stability across corners.
Correction Amp
VCM_SET
Conceptual CMFB Architecture Stability - CL PHASE MARGIN for (H1(s)H2(s)H3(s) < 70 Avol Application driven
CMFB
Vocm is set by adding negative (Correction Amp & Sense Ckt) feedback circuit to maximize gain & Signal swing of FD OTA. 1 2 Basic Operation 1) Sensing the output CM level, Vocm = Io+ + Io= [ Idiff+ + Icmo] +[ Idiff- + Icmo ] = Icmo 2) Comparison with a current reference i.e., Vcmo VCM_SET Feed back error correcting level to the amplifier bias circuitry. 3) System Check for stability across corners.
Conceptual CMFB Architecture Stability - CL PHASE MARGIN for (H1(s)H2(s)H3(s) < 70 Avol Application driven
CMFB
CM Sense Circuits.
Vcmo = a1vodif + a2vodif + a3vodif
a1 = 1 for All, a2 =
, a3 =
1 2
CMFB
Correction Amp Circuits
VREF
Vo-
Structure 1 plus 1
Vo+ Vo-
ACM ADM
1 plus 2 1 plus 3 2 3
VREF
CMFB -example
Diff Amp
CMFB -example
VB1 Vcmfb VB1 VB1' VinVin+ VB1 As Required Identical Arch. Double Boosting NOT REQUIRED VB1' VinVout+ Vcmi = Vout- VB2p VB4 VB4' VB4 Iin Local Bias Generator VB1' VB2 VB3 VB4' VB4 Vin+ Vout+ VoutVout + VB4'
VB4
Diff Amp