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Cc ng dng ca demultiplexer PROM PLA PAL GAL k thut s logic thit k k thut in t

Thm vo Yu thch

Lin h vi chng ti

Tm kim
Qu hng L i n h | Ngh t hut Ki nh doanh Chng c h Thng m i Khoa hc m y t nh Khoa hc Tr it K t hut Anh

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Thit k logic k thut s

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CS302 - k thut s logic & Thit k

Bi hc s 19 Demultiplexer M t ghp knh c mt s yu t u vo. N la chn mt trong cc yu t u vo v cc tuyn ng cc d liu ti cc a. N c mt n u vo v nhiu u ra. Cc demultiplexer la chn mt trong cc mt s kt qu u ra v cc tuyn ng cc d liu ti cc n u vo cc la chn u ra. M t demultiplexer c cng c bit n nh mt d liu phn phi. Cc mch s ca mt 1-to-4 dng demultiplexer c hin th. Hnh 19.1. Cc mch nu so vi ca cc 2-to-4 gii m. Cc b gii m cho php u vo c s dng nh cc Gin knh d liu u vo. M t demultiplexer l khng c sn thng mi. M t demultiplexer l c sn nh mt b gii m / demultiplexer con chip m c th c cu hnh hot ng nh mt Demultiplexer hoc mt b gii m. Cc mch ca cc 1 n 4 demultiplexer l tng t vi cc 2-to-4 nh phn gii m m t trc con s 16.9. Cc ch s khc bit gia cc hai l s b sung ca cc d liu u vo dng, trong c s dng nh cho php dng trong cc 2-to-4 gii m mch con s 16,10. Gi s cc chn u vo ti 1 v ti 0 c thit lp 1 v 0 tng ng. Cc O 2 u ra c thit lp 1 nu cc d liu u vo l 1 hoc n c thit lp l 0 nu cc d liu u vo l 0.

Mc lc: 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. 24. 25. 26. 27. 28. 29. 30. 31. 32. 33. 34. 35.
TNG QUAN H THNG S &

Khoa hc c h nh t hc la chn u vo cho cc n u ra. demultiplexer c mt ngc li chc nng cho rng ca cc Khoa hc s c khe Qun l Ti p t h Khil ng Com m Khoa hc t nhi n

Nh phn Decimal chuyn i nh phn, s

Phm vi ca nhng con s v trn, Floating-Poin Bt phn s, Octal vo thp nh phn chuyn Cng logic: AND Gate, OR Gate, khng cng, c V HOC XOR XNOR NAND Cng thc hin

Cha nh s a c h khoa hc Khoa hc x hi | S t r ang web L i n kt

DC cung cp in p, mc logic TTL, n Margin

Ngoi ra boolean, php nhn, Lut giao hon, Lu n gin ha cc biu thc Boolean, tiu chun

Karnaugh MAP, bn mt biu thc SOP phi t

Chuyn i gia POS v SOP bng cch s dn

Snh: Quine-McCluskey n gin ho Phng p ODD-TH S d, t hp vi mch thc hin THC HIN AN ODD la PHT mch

BCD Adder: 2 ch s BCD Adder, A 4-bit Adder ALU 16-bit, MSI 4-bit snh, gii m

BCD n 7 b phn gii m, thp phn-to-BCD m

2-INPUT 4-BIT MULTIPLEXER, 8, 16-Input gh

Cc ng dng ca demultiplexer, PROM, PLA, P

OLMC t hp ch , m Tri-State, The GAL1

OLMC cho GAL16V8, m Tri-nh nc v OL Thc hin Quad MUX, cht v Flip-flops P DNG SR cht, Edge-do kch thch D flip-f

Hnh 19.1 Cc ng dng ca demultiplexer

1 n 4 demultiplexer

Demultiplexer c s dng kt ni mt n ngun cho nhiu im n. M t s dng ca cc demultiplexer l ti cc u ra ca cc ALU mch. Cc u ra ca cc ALU c c lu tr trong mt ca cc nhiu ng k hoc lu tr n v. Cc d liu u vo ca cc demultiplexer c kt ni cc u ra ca cc ALU. M i u ra ca cc demultiplexer c kt ni vi nhau ca cc nhiu ng k. bi la chn cc thch hp u ra d liu t cc ALU c chuyn n cc thch hp ng k lu tr. Cc th hai s dng ca cc demultiplexer l s ti thit ca song song d liu t cc n ni tip d liu dng. ni tip d liu n ti cc d liu u vo ca cc demultiplexer c nh thi gian khong thi gian. M t truy cp gn lin vi cc Chn u vo ca cc demultiplexer tuyn ng cc n ni tip bit tip kt qu u ra ni mi bit c lu tr. Khi tt c cc bit c lu tr, d liu c th c c ra trong song song. Hnh 19.2

Lu tr d liu s dng D-flip-flop, ng b h

Hai tch cc-Edge kch hot D flip-flop, JK flip-f

555 gi: Race iu kin, khng ng b, m Rip

Xung truy cp vi chui ct ngn, 4-bit ng b

Mod-n ng b m, m Cascading, Up-Down

Vi mch Up Down thp k thit k truy cp v

ng h k thut s: tc my nh nc ng

BNG TIP-NH NC: Flip-flop Bng chuy D FLIP-FLOP THC HIN TRN

178

Moore My S nh nc, Mealy my S n ng k thay i: Serial Trong / Shift tri, phi /

NG DNG CA SHIFT S: Serial-to-song son

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Cc ng dng ca demultiplexer PROM PLA PAL GAL k thut s logic thit k k thut in t

36.
CS302 - k thut s logic & Thit k

H thng iu khin thang my: Thang my nh

37. 38. 39. 40. 41. 42. 43. 44. 45.

H thng tn hiu iu khin giao thng: chuyn m H thng tn hiu iu khin giao thng: Phng

T chc b nh, nng lc, Mt , tn hiu v h

B nh c, Vit chu k, ng b Burst SRAM,

N, phn phi Lm mi, loi DRAM, ROM Read u tin In-First Out (FIFO) B nh CUI CNG TRONG U ra (LIFO) NH

Khi LOGIC: tng t chuyn i k thut s Tip-xp x ANALOGUE to Digital Converter

Hnh 19.2

Demultiplexer nh mt ni tip song song Chuyn i

Lp trnh logic thit b Lp trnh logic thit b c s dng trong nhiu ng dng thay th cc logic ca v M SI chip. PLDs tit kim mch khng gian v lm gim v tit kim cc chi ph ca cc thnh phn trong mt K thut s mch. PLDS bao gm cc mng ca V ca v OR ca m c th c lp trnh thc hin c th chc nng. Lp trnh Mng ca V Gates v OR Gates Cc mng l c bn mt li in ca dy dn m hnh thnh hng v ct vi mt cu ch kt ni mi ct dy dn vi mi hng dn. Cc cu ch c th c thi ngt kt ni mt c bit ct t mt c bit hng. Cc HOC cng mng bao gm ca cc li in v OR ca. Tng t nh vy cc V ca mng bao gm ca cc mng li v v Gates. Hnh 19.3 M i ct dy dn trong cc mng li i din cho mt n bin hoc ca n b sung. M t li in ca mt s ct dy dn i din cho mt s bin v h b sung. M i HOC v V ca trong cc mng c kt ni vi nhau ca cc bin thng qua ngang dy dn. Khi tt c cc cu ch l cn nguyn vn, tt c cc bin l hin ti cc u vo ca tt c cc HOC v V ca. Cc HOC v V ca c th c cu hnh c quy nh ch kt ni h u vo bng cch thi i thch hp cu ch c thi qua lp trnh. M t lp trnh hoc mng c tng cc iu khon ti cc u ra ca n hoc ca. Tng t nh vy mt lp trnh v mng c sn phm v ti ca n ra. Hnh 19.4

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CS302 - k thut s logic & Thit k

Mt

Mt

Nng chy c lin kt

X1

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Cc ng dng ca demultiplexer PROM PLA PAL GAL k thut s logic thit k k thut in t
X2

X3

Hnh 19.3a hoc cng mng

Mt

Mt

Nng chy c lin kt

X1

X2

X3

Hnh 19.3b v Cng mng

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CS302 - k thut s logic & Thit k

Mt

Mt

Mt + B

Mt + B

Mt + B

Hnh 19.4a lp trnh hoc cng mng

Mt

Mt

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Cc ng dng ca demultiplexer PROM PLA PAL GAL k thut s logic thit k k thut in t

AB

AB

AB

Hnh 19.4b lp trnh v Cng mng

M t thay th thc hin ca cc li in l vi khng cu ch, cc li ct v hng dy dn c khng kt ni n mi khc. M t c th ct dy dn c th c kt ni n mt hng dn bi shorting cc ct v hng dy dn. C hai cc phng php trong mt cu ch c thi ngt kt ni mt ct t mt hng v cc shorting phng php trong mt ct l kt ni vi mt hng c th ch c thc hin mt ln. V vy khi mt mng c cu hnh thc hin mt chc nng n c th khng c lp trnh li. Lp trnh logic thit b c mt mng ca V ca v mt mng ca OR ca mt trong hai hoc c hai trong c th c lp trnh. C l khc nhau cc loi ca PLDs, h l

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CS302 - k thut s logic & Thit k

phn loi theo h kin trc m cho php mt trong hai c cc mng c lp trnh hoc ch mt trong cc hai mng. 1. lp trnh Read-Only Memory (PROM) Cc PROM bao gm ca mt c nh khng th lp trnh v mng cu hnh nh mt b gii m v mt lp trnh hoc mng. Hnh 19.5. Cc PROM c s dng nh mt lu tr thit b m ca hng thng tin ti a ch a im. N c hn ch cc ng dng v l khng s dng nh mt l thit b. PROM kin trc v chi tit c tho lun trong sau bi ging. 2. lp trnh logic mng (PLA) Cc PLA bao gm ca mt lp trnh v mng v mt lp trnh hoc mng. Hnh 19.6. N c thit k khc phc cc hn ch ca mt PROM . PLA l cng c bit n nh mt trng-lp trnh logic mng nh n c th c lp trnh bi nhng ngi s dng v khng bng cc nh sn xut.

u vo 1

Sn lng 1

u vo 2

C nh V mng

Lp trnh

u ra 2

Hoc mng

u vo n

Ra m

Hnh 19.5

Khi s ca mt PROM

u vo 1

Sn lng 1

u vo 2

Lp trnh

Lp trnh

u ra 2

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Cc ng dng ca demultiplexer PROM PLA PAL GAL k thut s logic thit k k thut in t
V mng Hoc mng

u vo n

Ra m

Hnh 19.6 3. lp trnh mng logic (PAL)

Khi s ca mt qun i Trung Quc

Cc PAL c thit k vt qua cc cn chm tr v s phc tp mch kt hp vi cc PLA do hai lp trnh mng. Cc PAL c th lp trnh v mng v mt c nh hoc mng. Hnh 19.7

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CS302 - k thut s logic & Thit k

u vo 1

Sn lng 1

u vo 2

Lp trnh

C nh Hoc mng
v u ra l

u ra 2

V mng

u vo n

Ra m

Hnh 19.7 4. Chung mng logic (GAL)

Khi s ca mt PAL

Cc GAL c mt lp trnh li v mng v mt c nh hoc mng vi lp trnh u ra logic. Hnh 19.8. Cc chnh s khc bit gia GAL v PAL l cc lp trnh li V mng m c th c lp trnh mt ln na v mt ln na, khng ging nh PAL v mng c th c lp trnh mt ln. GAL s dng E 2 CM OS cng ngh l in Erasable CM OS thay v ca lng cc cng ngh v nng chy c lin kt. Cc khc khc bit l cc lp trnh kt qu u ra.

u vo 1

Sn lng 1

u vo 2

Lp trnh

C nh Hoc mng
v Lp trnh u ra l

u ra 2

V mng

u vo n

Ra m

Hnh 19.8

Khi s ca mt GAL

Tt c cc bn PLD cc thit b s dng v mng sau bng hoc mng. Do h tt c cho php thc hin ca Sum-of-Sn phm Boolean biu thc.

PAL mch v lp trnh M t n gin PAL cu trc c th hin ni cc V mng c lp trnh to ra ba sn phm v m c thm vo vi nhau bi cc hoc mng. Hnh 19.9

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Cc ng dng ca demultiplexer PROM PLA PAL GAL k thut s logic thit k k thut in t
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CS302 - k thut s logic & Thit k

Mt

Mt

AB

AB

AB + AB + AB

AB

Hnh 19.9

PAL lp trnh thc hin mt SOP chc nng

u vo dng

u vo m

Mt

Mt

Mt n dng vi du gch cho i din cho nhiu v cng u vo B

X
2

X
2

X
2

Fuse thi (Khng kt ni)

Cu ch cn nguyn vn (Kt ni)

Hnh 19.10 gin th s ca lp trnh PAL PALs c nhiu u vo v nhiu u ra kt ni thng qua mt ln s lng ca V ca v OR ca. V cc mch s ca mt PAL c nhiu ca mi c nhiu u vo tr nn kh khn. PALs c m cc u vo m sn xut cc thc t bin v n b sung. Cc nhiu u vo dng mt v cng mng l i din bi mt n dng vi mt du gch cho cho thy cc s ca u vo. Cc cho ch

184

CS302 - k thut s logic & Thit k

cc cu ch l nguyn vn cho thy mt kt ni gia cc dc ng v ngang dng ca

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Cc ng dng ca demultiplexer PROM PLA PAL GAL k thut s logic thit k k thut in t
cc v mng. Hnh 19.10 PAL u ra PALs thng c 8 hoc nhiu hn u vo cc V mng v 8 hoc t kt qu u ra t cc c nh hoc mng. M t s PALs kt hp u vo v u ra m c th c lp trnh nh hoc l u vo hoc u ra. PAL u ra l c th c cu hnh theo cc ng dng ca cc PAL. Cc sa i khi s i din cho mt PAL cho thy cc u ra ca cc HAY mng kt ni vi u ra l m cho php cc kt qu u ra c cu hnh c th hin trong hnh 19.11. Cc ba loi ca kt qu u ra l t hp u ra c s dng cho mt SOP chc nng v l c sn nh l mt hot ng cao hoc hot ng thp sn lng. Hnh 19.12a t hp u vo / u ra c s dng khi cc u ra c kt ni tr li cc u vo ca cc PAL hoc nu cc sn lng pin c s dng nh mt u vo ch. Hnh 19.12b lp trnh cc u ra c s dng hoc chn cc sn lng chc nng hay ca n b sung bng cch lp trnh mt XOR ca ti cc u ra. Hnh 19.12c

u ra L u ra L Sn lng 1

u vo 1

u vo 2

Lp trnh

C nh Hoc mng

u ra 2

V mng

u ra u vo n
Hnh 19,11 Khi s ca mt PAL vi lp trnh kt qu u ra

Ra m

T v cng mng

u ra

Hnh 19.12a t hp u ra vi hot ng thp sn lng Cc u ra ca cc HAY cng t cc HAY cng mng c th hin c kt ni vi mt trinh nc m u vo. Cc tri-nh nc m c th c kch hot hoc v hiu ha thng qua cc kim sot dng th hin kt ni n bn. Cc t hp u ra cho mt SOP chc nng c thc hin bi kch hot cc tri-nh nc m m cho php cc u ra ca cc HAY cng c o ngc bi cc trinh nc m v thng qua cc u ra ca cc PAL thit b. M t hot ng cao u ra c th c thu c nu cc PAL thit b c hot tnh cao sn lng tri-nh nc m.

185

CS302 - k thut s logic & Thit k

T v cng mng

u vo / u ra

Hnh 19.12b t hp u vo / u ra vi hot ng thp sn lng Cc t hp u vo / u ra chc nng c s dng khi cc u ra ca cc HAY cng c c kt ni tr li cc u vo ca cc V Gate. Nh th hin trong cc con s cc u ra ca cc trinh nc m c kt ni vi cc u vo ca mt o ngc v khng o ngc m m cho php cc

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Cc ng dng ca demultiplexer PROM PLA PAL GAL k thut s logic thit k k thut in t
mng. Th ngc v khng hai, bng o ngc cch kh kt hot qu u cc tri-nh ra ca cc nc HAY m cng kt ni c ti kt cc ni u vi ra cc cau cc vo OR ca Gate, cc V ca cc sn lng pin c cu hnh nh mt u vo pin. ngoi tn hiu kt ni vi cc u ra pin l thng qua cc u vo ca cc V mng.

T v cng mng

u vo /

u ra

Hnh 19.12c lp trnh cc u ra Cc lp trnh cc u ra c cc u ra ca cc HAY cng kt ni thng qua mt XOR ca cc tri-nh nc m. Cc XOR ca cho php cc u ra ca cc HAY cng c thit lp hot ng cao hoc hot ng thp. Khi cc th hai u vo ca cc XOR cng c kt ni vi mt t, cc u ra ca cc XOR cng l cc ging nh cc u ra ca cc HAY ca khu. Khi cc cu ch ca cc XOR cng u vo c thi thit lp cc u vo l cao, cc u ra ca cc XOR cng l i din ca cc Hoc cng u ra. PAL Xc nh PALs n trong khc nhau cu hnh chng c xc nh bi c o s. Cc s bt u vi cc tin t PAL theo sau bi hai ch s m ch ra cc s ca u vo theo sau bi mt th L hot ng thp, H hot ng cao hoc P lp trnh cc theo sau bi mt n hoc hai ch s m ch ra cc s ca kt qu u ra. Trong Ngoi ra cc tiu chun s c th c hu t ch nh cc tc , gi loi v nhit phm vi. Hnh 19.13

186

CS302 - k thut s logic & Thit k

PAL 10 L 8

Lp trnh mng logic Ten u vo

Tm u ra

Hot ng thp sn lng

Hnh 19.13 Tiu chun PAL nh s

PLA mch v lp trnh

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Cc ng dng ca demultiplexer PROM PLA PAL GAL k thut s logic thit k k thut in t

Hnh 19.14 A 4 x 3 PLA thit b Lp trnh logic mng nh cp trc c mt lp trnh v v OR mng. M t qun i Trung Quc c th c lp trnh thc hin bt k Sum-of-sn phm l cc biu thc, gii hn bi cc thng s ca cc PLA thit b. Cc hn ch c S ca u vo (n) S ca kt qu u ra (m)

187

CS302 - k thut s logic & Thit k

S lng ca sn phm v (p)

Nh mt thit b c m t nh mt nxm PLA thit b vi p sn phm v. Cc n gin s ca PLA 4 x 3 thit b c th hin trong cc con s 19.14. Cc bn u vo I1, I2, I3 v I4 l th hin kt ni thng qua u vo b m cc u vo ca cc V ca mng. Cc u vo b m cung cp nhng cha b sung v b sung u vo tn hiu. M i ca cc 6 v ca trong cung cp su sn phm v P1, P2, P3, P4 P5 v P6 c 8 u vo. Cc kt qu u ra ca mi ca cc su v cng c kt ni vi cc u vo ca cc HAY cng mng. M i ca cc ba HOC ca su u vo. M i hoc ca c th nh vy, thc hin mt s tin hot ng trn su sn phm v. Cc qun i Trung Quc cho php c ca n v cng mng v cc HAY cng mng c lp trnh c lp. Cc 4 x 3 PLA lp trnh vi ba ring bit chc nng l chng trnh trong con s 19.15. Cc sn phm v to ra c

P 1 = ti 1. ti 2. ti 4 P 2 = ti 1. ti 2. ti 3 P 3 = ti 1. ti 2. ti 3. ti 4 P 4 = ti 1. ti 3. ti 4 P 5 = ti 2. ti 4 P 6 = ti 1. ti 2. ti 3. ti 4
Cc u tin hoc cng s tin sn phm v P1, P2, P3 v P5, cc cu ch cho cc sn phm v c nhn thy c nguyn vn. Cc th hai hoc cng s tin cc sn phm v P2, P4 v P6. Cc th ba Hoc cng tng cc sn phm v P1, P3, P4 v P6. Cc ba tng cc sn phm v l

O 1 = ti 1. ti 2. ti 4 + ti 1. ti 2. ti 3 + ti 1. ti 2. ti 3. ti 4 + ti 2. ti 4 O 2 = ti 1. ti 2. ti 3 + ti 1. ti 3. ti 4 + ti 1. ti 2. ti 3. ti 4 O 3 = ti 1. ti 2. ti 4 + ti 1. ti 2. ti 3. ti 4 + ti 1. ti 3. ti 4 + ti 1. ti 2. ti 3. ti 4

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Cc ng dng ca demultiplexer PROM PLA PAL GAL k thut s logic thit k k thut in t

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CS302 - k thut s logic & Thit k

Hnh 19.15 theo chng trnh 3 4 x PLA thit b

189

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