Common Voltage Eliminating of SVM Diode

Clamping Three-level Inverter Connected to Grid

X ougui Guo, Ping Zeng, Jieqiong Zhu, Lijuan Li,
Wenlang Deng
College of Information Engineering
Xiangtan University
Xiangta, China
guoygxtu@gmail.com
HU8lruclA novel method of common voltage eliminating is
put forward for SV diode clamping three-level inverter
connected to grid by calculation of common voltage of its various
switching states. PLECS is used to model this three-level inverter
connected to grid and good results are obtained. First analysis of
common mode voltage for switching states of diode clamping 3-
level inverter is given in detail. Second the common mode voltage
eliminating control strategy of SV is described for diode
clamping three-level inverter. Third, PLECS is briefy
introduced. Fourth, the modeling of diode clamping three-level
inverter is presented with PLECS. Finally, a series of simulations
are carried out. The simulation results tell us PLECS is a very
powerful tool to real power circuits modeling. They have also
verifed that proposed common mode voltage eliminating control
strategy of SV is feasible to control the diode clamping three
level inverter. But further research has to be done to get rid of
the common mode voltage completely by controlling the voltages
of two capacitors at the input terminal.
0jOtdS-T0ree-level lnverter; PLECS; common voltage
eliminating; spacevectarmadulahan
I. INTRODUCTION
Wind power generation is developed well by many scholars
in the word as a sustainable energy resource. And they have
published lots of achievements with their great efforts
[
I
,
2
1
. It is
well known the inverter plays a very important role in the
generation system. It may be single-phase inverter or three
phase inverter by the requirements of users. It may also be
two-level, three-level or multilevel inverters according to the
output voltage levels between one output phase and zero point
of input terminal of the inverter. In addition, PLECS is very
convenient to simulate the various power circuits with LCL
flters which are difcult to simulate without it. We here try to
use the advanced tool of PLECS to simulate diode clamping
three-level inverter in use of its advantages
[
3
,
4
,
51
. And it is
becoming hotter and hotter in the research of renewable
energy.
II. ANALYIS OF COMMON MODE VOLTAGE FOR SWITCHIG
STATES OF DIODE CLAPING THREE-LEVEL IVERTER
The basic principle of this three-level inverter is briefy
summarized to output 3 kinds of voltage levels 0.5V DC, 0, -
0.5VDC respectively for one phase topology show in Fig.l
978-1-61284-752-8/11/$26.002011IEEE
2054
Frede Blaabjerg
Institute of Energy Technology
Aalborg University
Aalborg, Denmark
assuming common mode voltage V
N
O
= such as phase A
[51
.
And their switching states are defned as P, O, N respectively,
that is to say the corresponding switching-on states are S
I
A ad
S2A, S2A and S
3
A, S
3
A and S
4
A. Therefore there are 27 switching
states shown in Fig.i
3
,
51
. The common mode voltage can be
expressed by the following equation

VC
M
=
-(
VA

+ VBO + V
co)
(1)

The common mode voltage is produced by the switching

states. For example, switching states NOP produce a common

mode voltage VC
M
=
-(
- O.5V
DC + + O.5V
DC
)
= , and

VC
M
=
-(- O.5V
DC + - O.5V
DC )
=
--V
DC for switching

states NON. We can do the similar calculation for other
switching states and obtain all other common mode voltages
as shown in Table 1.
T bl 1 d r ' .
h
.
h' a e common mo e vo tage e Immatmg Wit some SWltc mg states
Switching Common mode
Common mode
Vector kind
states voltage VO = 0
voltage
VO>O or <0
000 0 Vo zero
PON
0
113 Vo medium
OPN
0 113 Vo medium
NPO
0 113 Vo medium
NOP
0 113 Vo medium
ONP
0 113 Vo medium
PNO
0 113 Vo medium
And [
=
VCl -VC2 ' it is zero when the DC-link voltage is
balanced. Assuing the DC-link voltage is balanced here.
Then a regular hexagon is obtained by 6 medium vectors PON,
OPN, NPO, NOP, ONP, PNO. They can produce zero
common mode voltage on the inverter output terminal in case
of balanced DC buses. And OOOis its zero vector.
III. SPACE VECTR MODULATON OF DIODE CLAPING
THREE-LEVEL IVERTER
Here the common mode voltage eliminating control strategy
of SVM is used for control of diode clamping 3-level inverter
because of its advantages which is analyzed in detail
[
3
,
51
. The
calculation of basic voltage space vector for Fig.2 is as follows
with sector! for example. Medium vector of with
switching states PON: obviously, its three-phase output
voltages of VA ' VB and Vc are O.5Voc, 0, -0.5Voc
respectively.
+
c,
Vo
C,
C
Fig.l The load is connected with Y for diode clamping tree-level inverter
Fig.2 Switching states and regions of SV 3-level inverter
And according to defnition of equal amplitude space vector,
/ (_ +VBe
-/
; +VcJ (2)
i=7, 8, 9, 10, 11, 12.
Substituting the values of VA' VB and Vc into (2), then
J j

-VDCe 6 (3)

Similarly with switching states OPN: VA' VB and Vc are

0, 0.5Voc, -0.5Voc respectively. Substituting them into (2),
then
p
=
( U+ U

n -/
;
- U

n/
;
J =
DC _'
(4)
2055
Finally the other 4 basic space vectors are calculated
similarly too. And a regular hexagon is obtained shown in
Fig.3 consisting of fom to ,
'
s
OPN
III n
PON
a
-.
PNO
V VI

Fig.3 The regular hexagon of medium vectors of3-level inverter

Space vector modulation for three-level inverter is shown in
FigA where the reference voltage can be synthesized by three
vectors , and ,when the reference voltage locates in
sector 1. According to volt-second balancing principle
following set of equations can be written.
I^ V7
Vo

I L
V12
Fig.4 The synthesis of voltage reference vector
j

j
+
j

+
j
,

(5)
Where: J_is sampling period, ef is reference voltage vector,
, 2 are three basic vectors consisting of sector 1. J_,
J_ , J are duration time of vectors , ,and
+

+ = Ts.
ve/
is used for a constant because Ts is
very short. Therefore (5) can be simplifed into
ve . Ts =
.
+
.
+ ,

(6)
} 1 OI J -
j

Substituting = =
J
VDC
.
e1 6 , ,= _ VDCe 6 ,
ve/
=
ve/ .
e
j
& into (6) and through simplifcation and
separation of real and imaginary parts of complex the
following two formulas (7) and (8) are obtained.
__ ' _ '' _ | _
.
a+_' b+_' c= ref
COS
.
S
(7)
J J .
-V
O
C
' --V
DC'
=
ve/sm
e
Ts

(8)
Solving (7) and (8) together with +

+ = j dwell
times are obtained as follows.
Ta =Ts --

= 1mSi{e)
.Ts (9)
T =2msi(7 -e)
.
T
c
J

s
Jve/ }
Where m = , the reference vector Vr
e/
rotates at an
VDC
angular speed ( = 2q
,
in the regular hexagon. Where
],
is output voltage fequency. In other sectors
e = e-{n _1)7 , n=l, 2, 3, 4, 5, 6.

(10)
IV. ITRODUCTION OF PLECS BLOCKSET
PLECS is a circuit simulator that makes it simple to model
and simulate complex electrical systems along with their
controls. Supporting a top-down approach, it lets you start
with ideal component models in order to focus on system
behavior. Low-level device details ca be added later to
account for parasitic effects.
With the intuitive, easy-to-use schematic editor, new
models are set up quickly. Thanks to a proprietary handling of
switching events, simulations of power electronic circuits are
fast and robust. Whether you are simulating a simple power
electronic converter or a complex electrical drive, PLECS is a
powerfl tool that will help you quickly obtain the results that
you need. Here we use PLECS tool model the main circuit of
the three-level inverter
[
2
1
.
V. MODELIG OF THE DIODE CLAMPING THREE
LEVEL IVERTER SYSTEM
The model mainly consists of two parts: SVM PWM
2056
generation and main circuit. We use PLECS tool box of
MATLAB/simulink to model the main circuit which is very
convenient to simulate the real power circuits. The modeling
of SVM is realized fom the analyses above.
VI. SIULATION OF THREE-LEVEL IVERTER SYSTEM
Here main parameters used: Nominal grid fequency, 50Hz.
DC-link voltage, 400V. Switching fequency, 5kHz. On the
basis of above discussion of several parts, simulation models
are integrated together consisting of the total system. On the
basis of the above decision of parameters the simulation
experiments are done.
The corresponding results are obtained shown in Fig.5-9
respectively.
0.1
Fig.5 Te phase to neutral voltage PW of 3-level inverter
Fig.6 The outut 3-phase currents of 3-level inverter
Us
Fig.7 The outut line to line voltage of 3-level inverter



----.---,-----..------, -------.----. .---------.-- ------------




---.-------. -------.---------------.-- --.--------.



Us
Fig.8 The common mode voltage of3-level inverter
4
-

.
.
.
j_] ......: ...... j ....... : ....... ...... : ...... j ...... ( ..... ...... : ...
.
.
`
j]]

--

. .
,
.
.
_]

]] ]|]]
4
] ]] ] ]_] ] ]]]] ]]]|
Us
Fig.9 The capacitor voltages at the input terminal
From the above simulated results, the common mode
eliminating of space vector modulation is suitable for the
control of the diode clamping 3-level inverter. And the
common mode voltage still exists but very smaller compaed
2057
with other methods shown in Fig.8. The reason is that the DC
voltages of two capacitors at the input terminal are not
balanced. If they are controlled well the common mode
voltage will be gotten rid of completely.
VII. CONCLUSION
The common mode eliminating of SVM proposed in this
paper is suitable for the control of diode clamping three-level
inverter; and PLECS is a powerfl tool to model the main
circuits of three-level inverter. The simulation models approach
to the real clamping three-level inverter by means of PLECS,
which have laid a good basis for frther reseach and the
development. But frther research has to be done in order to
get rid of the common mode voltage completely by controlling
the DC voltages of two capacitors at the input terminal.
ACKNOWLEDGMENT
I a very gratefl to my supervisor, professor Frede
Blaabjerg(lEEE fellow) giving me many good opportunities
and conditions while my staying in institute of energy
technology, Aalborg university for one and half years.
REFERENCES
[1] Frede Biaabjerg, Remus Teodorescu, Marco Liserre, Adrian V. Timbus.
Overview of Control and Grid Synchronization for Distributed Power
Generation Systems. IEE Transactions on Idustrial electronics, 2006,
Vol.53 No.5: 1398-1409
[2] Zhe Chen, Josep M. Guerer, Frede Blaabjerg. A Review of the State of
the A of Power Electronics for Wind Turbines. IEE Transactions on
power electronics, 2009, vol.24, no.8: 1859-1875
[3] Wu bin. High Power Converters and ac Drives, 2006, pp. 143-176
[4] J.H. Allmeling and W.P. Hammer, PLECS - Piecewise Linear Electrical
Circuit Simulator for Simulink, PEDS'99, Hong-Kong, July 1999, Vol.!.
pp.355-360
[5] Yongdong Li, Xi Xiao, Vue Gao. High power multilevel converter
principle, control and applications, science press, China, pp.8-9