CSCE 313 Embedded Systems Design

2004/1/12

Lecture 1 Overview of Embedded Systems & Architecture

2003 Dr. James P. Davis
Some figures from Tanenbaum 1999 Prentice Hall Publishers, Inc.

CSCE 313 Lecture 1 - Outline

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Introduction
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Why this course is important to Computer Engineering. Drivers for Embedded Systems. Example: Wireless Communications. The CPU is the Heart of an Embedded System.

Computer Architecture
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Computer Engineering Design Space (Y-chart). Abstraction Levels and Representation Domains. Organization of a Computing System. Organization of the CPU.

Course Drivers
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The CPU architecture and programming model. The layers of the virtual machine (the Instruction Set Architecture). The program development process. Operating at the Hardware-Software boundary.

2003 Dr. James P. Davis

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Embedded Systems - The New Realities

Telecomm

Computers

Consumer Electronics

VLSI Silicon "chip"

"At the root of cascading changes of modern economic life...devaluing resources in technology, business and geopolitics...overcoming the the constraints of material resources, the microchip has devalued most large accumulations of physical capital and made possible the launching of global economic enterprises...microchips find their value not in their substance but in their intellectual content: their design..." George Gilder, Microcosm, 1989
2003 Dr. James P. Davis

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Embedded Systems - Industry Drivers

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Many market and technology factors coming together to create pressure on electronics product engineering organizations worldwide.
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Increasing global competition and new markets. Increasing rate of product innovations and new product introductions. Decreasing time-to-market windows. Decreasing shelf life for products in many categories. Increasing pressure on competitive cost containment, profit margins. Increasing convergence: integrated functionality in single electronics devices and product packages. Increasing quality expectations: means for containing distribution and support costs. Increasing innovation in silicon process technology and wafer scale integration densities, also in embedded software technologies.

Increasing disparity: capacity of the underlying technologies versus capability of designers to manage increasing design complexity.
2003 Dr. James P. Davis

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The Capacity vs. Capability Gap

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Increasing capacity of the technology:

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The rate of new technology and associated silicon process changes has continued to follow Moores Law.

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10,000K

The capability of designers and design teams to use 9 this capacity isnt keeping Months up.
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Device Capacity
D esign Size

Product Tim e-to-Market The Capacity versus Capability Gap is widening. 1,000K Each set of technology and process changes requires 3 designers to manage ever Design Capability more complexity in the design 100K process. New architectures, 1985 1990 1995 2000 abstractions, methods and Source: Dataquest tools are required to address this increasing complexity.
2003 Dr. James P. Davis

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Example Wireless Communications

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Range

The market is seeking product technology options to cover different geography ranges and data rates.
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Bluetooth WPAN. IEEE 802.11 - WLAN. 2/3G Network WWAN.

WWAN

The opportunity for creating value chains encompassing product offerings, distribution and new service offerings hinges on the ability to get low cost solutions to market quickly.
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G2/G3 Network CDMA

WPAN WLAN

Deliver content to wireless handheld devices. Function convergence in the handset and at the base station. Requires large cross-functional design teams in varied disciplines.

Blue Tooth 802.11b

IEEE802.11a Data Rate

Source: Knowledge Edge KK
2003 Dr. James P. Davis

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Embedded System 802.11 WLAN NIC

C P U c o re D ie a re a
4 .9 m m 2 o n 0 .1 8 m e s tim a te d s ize w ith 1 6 K B in s tru c tio n & 4 K B d a ta c a c h e s a n d n o TCM s U s in g A rtis a n c e ll lib ra ry & R A M co m p ile r

Peak Pow er C o n s u m p tio n (m W /M H z )

M e m o ry S ys te m
S e le c ta b le I & D c a c h e s ize s : 0 , 4 K , 8 K ... 1 M S e le c ta b le I & D T C M size s : 0 , 4 K , 8 K ... 1 M

C lo c k fre q u e n c y & M IP S p e rfo rm a n c e

150M H z on TSM C 0 .1 8 m (w o rs t case) 230M H z on TSM C 0 .1 8 m (typ ic a l)

A R M 9 E / A R M 9 4 6 E -S c a c h e d p ro c e s s o r w ith tig h tly c o u p le d m e m o ry in te rfa c e s

1 .1 m W /M H z @ 1 .8 V (e s tim a te d )

M AC c o n tro lle r BUS in te rfa c e RF F ro n t End BBP M AC

d e v ic e d riv e r (b a s ic fu n c tio n c a ll, m e m o ry c o n tro l e tc .

P ro to c o l S ta c k & OS k e rn e l

C lie n t d riv e r Ap p lic a tio n AP d riv e r

T a rg e t B B P & M A C C o n tro lle r C h ip

S o ftd rive r

PHY

M AC

M e m o ry b lo c k (4 ~ 1 5 k B ) + c o n tro l b lo c k

O n c h ip m e m o ry d e p e n s o n firm w a re s iz e (1 0 0 ~ 2 0 0 K B ) th e F W s iz e d e p e n d s o n th e M A C fe a tu re 1 1 e & i?

1 0 K g a te s P C I/P C M C IA
Source: Knowledge Edge KK
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2003 Dr. James P. Davis

Computing System Design Space (Y-chart)

Most embedded systems exist at this level of systems design abstraction.

2003 Dr. James P. Davis

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Categories of Digital Systems Design

"Layered" Computing System
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Electronic systems today are of different types, depending on the (1) function, (2) application.
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VLSI hardware microcode machine code operating system application

ASICs and FPGAs

Classes of Electronic Systems

Embedded System
ROM RAM

uC
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I/O

On-chip System
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Computing system: CPU and hardware executing O/S, with applications running on top of O/S. Embedded system: fixedfunctions, instruction-based micro-controller with both hardware and software components. On-chip system: complete control and data functions implemented in "custom logic" VLSI package. On-chip systems can be components of embedded systems, which can be part of a layered "virtual" machine. All these systems do interface with the outside analog world.
2003 Dr. James P. Davis

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Continuum of Embedded System Types

We want the development productivity and existing code base using a standard CPU We want the higher speed and lower power consumption of a custom logic package.

Industry trends have us focusing on the use of CPU cores and EEPROM/Flash memory packaged with other logic in reconfigurable FPGA devices for small form-factor products (e.g., PDAs).
2003 Dr. James P. Davis

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Computer Structure & Organization-1

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Basic systems components of Computer:

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CPU, Memory, I/O Devices, Bus

CPU decomposes into basic components:

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Control unit, Arithmetic Logic Unit (ALU), Registers

Source: Tanenbaum, 4th ed. 1999, Prentice-Hall

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Computer Structure & Organization-2

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Von Neumann computer architecture:

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Developed in the late 1940s by John Von Neumann (Princeton U.) Combined the elements of stored program machine: one machine could run many programs. Program instructions stored in memory and fetched, in sequence, to be executed by CPU. Results of execution stored in Registers, later written back to memory.

Source: Tanenbaum, 4th ed. 1999, Prentice-Hall

2003 Dr. James P. Davis

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Computer Structure & Organization-3

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Instruction Sequencing 9 This CPU has the sequencing of data path operations by one or more state machines 9 The example shown is the data path for a small CPU, where microoperations based on program instructions are decoded and staged to execute multicycle instructions out of memory. 9 This example also used pipelining (discussed on next slide).

Source: Tanenbaum, 4th ed. 1999, Prentice-Hall

2003 Dr. James P. Davis

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Computer Structure & Organization-4

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N-Stage Pipeline
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Pipeline allows serial processing, in sequence, of instructions or data elements. Each n-element in the pipeline processes its task, then passes the element to the stage n+1 in the pipeline. Design structures that use pipelining: CPU Instruction Fetch Unit (IFU), Digital filters (e.g., FIR, IIR).

Source: Tanenbaum, 4th ed. 1999, Prentice-Hall

2003 Dr. James P. Davis

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Computer Structure & Organization-5

Pipelining Instructions
The sequence of figures show how pipelining works in the control path. The control pipelining is the Instruction Fetch, Decode, Execute cycle used in all CPU architectures. Each stage of the control pipeline is buffered by registers that provide setup of data. The different stages of the pipeline also use handshaking.
2003 Dr. James P. Davis

Source: Tanenbaum, 4th ed. 1999, Prentice-Hall

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Summary - What Youll Get in This Course

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This course is about analysis, architecture and programming of digital embedded systems.
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We assume the presence of a CPU, and therefore our primary task is to implement functionality using the CPUs Instruction Set. We are concerned about efficiencyin terms of execution speed of instructions, and in the amount of memory we consumeto get a specific programming task accomplished.

You will learn development process, assembler program design methods, and program verification framework, allowing you to take an embedded systems application, analyze it, and implement it.
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Iterative enhancement, top-down/bottom-up, stepwise refinement (stables of software engineering discipline) Additional heuristics in relating properties of the CPUs computer architecture (instruction set, bus structure, interrupt handling, etc.) to the embedded systems application, to make the systems planning process more effective.

You will learn how to evaluate the goodness of your embedded systems programs based on the use of tools, and by collecting and analyzing program execution data to tune your programs.
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Well use the WISM68K emulator/debugger, and the 68KMB hardware lab apparatus as our tools.
2003 Dr. James P. Davis

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