Professional Documents
Culture Documents
Workbench Structure: Workspace
Workbench Structure: Workspace
Workspace
Projects
Experiments
Process Recipe Wafer Flow Simulator Driver
Machines
Libraries
Modules
Command Builder
Spread Sheet
X. ZHOU
1997
Workspace
Projects Machines
Modules
Library
Tools Simulator Drivers
Experiment
X. ZHOU
1997
WorkBench Experiments
TCAD: Process and Device Simulation TMA WorkBench: Virtual IC Factory
Experiment
Process Recipe Wafer Flow Simulator Driver
Workspace
Root Module
Experiment
Modules
ToolKit
Module
X. ZHOU
1997
WorkBench Modules
TCAD: Process and Device Simulation TMA WorkBench: Virtual IC Factory
Module
Icon Driver Name Annotation
Module Concept
Module
0 1 2.1
Step_1 Step_2
Command Parameter_1 Parameter_2
How to do it
Command
(technology specific)
Step_3
X. ZHOU
1997
WorkBench Drivers
TCAD: Process and Device Simulation TMA WorkBench: Virtual IC Factory
Wafer
Module
% simulator <input_file> load in.file=<previous wafer> command parameter ... command parameter ... ...... save out.file=<current wafer>
Driver
unix load save
Wafer
X. ZHOU
1997
Process Recipe
Wafer Flow OK
Variable
Definition
unix tsuprem4 # load mask in.file= //|".tl1" initial in.file= . . tif save savefile out.file= . tif
field_ox
/
OK
the root wafer the child of the root wafer the input file the parent wafer the current wafer
// #
OK
OK
Module field_ox
Icon Driver Name field_ox
Wafer field_ox OK
Name field_ox Text
Wafer Components mask extract savefile in.file= //|".tl1" out.file=.|".ext" out.file=.|".out" field_ox:0_0 field_ox:0_0.ext field_ox:0_0.out field_ox:0_0.inp
principal component
X. ZHOU
1997
WorkBench ToolKit
TCAD: Process and Device Simulation TMA WorkBench: Virtual IC Factory
TMALayout TMAVisual
CurveTool
ToolKit Layout Mich Curve
X. ZHOU
1997
Command Builder
Manual TSUPREM-4 Command DIFFUSION Description
Workspace
Experiment
Module
Parameter TIME
X. ZHOU
1997
Mo du le
implant
ToolKit
Control
Ch_dose
Run Table
Run Table
Des Label Name
Ch_dose
dose tox
5e12
X. ZHOU
1997
Icon
1
Color
Yellow Purple Blue Black
Simulation Status
Module ready for simulation Module being simulated Module waiting for available CPU to be simulated Module simulation failed Module completed successfully
ok 1
Green
t To make a wafer green at the completion of the Module simulation, a Principal Component file with the name <module_name>:0_0 must be created
X. ZHOU
1997
Experiment
Process Recipe Wafer Flow Driver
drv
Name drv
Machines
unix
sim #
load
load in.file= . .
premod
mod:0_0.inp $driver drv $step load load in.file=premod:0_0 $module mod $step step-1 command-1 param-1 command-2 : $step-2 : $end module mod $step save save out.file=mod:0_0
save
save out.file= .
mod
ToolKit
drv
Name mod
step-1
command-1 command-2
step-2
param-1
Run
% sim mod:0_0.inp
X. ZHOU
1997
Creating a Tool
TCAD: Process and Device Simulation TMA WorkBench: Virtual IC Factory
Experiment
Process Recipe Wafer Flow Driver Name plot
Tool
Machines
unix
graph
step-1
mod
OK
ToolKit
plot
command-1 command-2 :
param-1
mod:0_0.plot.inp % graph mod:0_0.plot.inp $tool plot $step step-1 command-1 param-1 command-2 :
X. ZHOU
1997